Lines Matching refs:State
23 Hexagon_CCState &State,
32 Hexagon_CCState &State,
56 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
57 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
68 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
69 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
76 const Type* ArgTy = LocVT.getTypeForEVT(State.getContext());
78 State.getTarget().getTargetData()->getABITypeAlignment(ArgTy);
80 State.getTarget().getTargetData()->getTypeSizeInBits(ArgTy) / 8;
91 unsigned Offset3 = State.AllocateStack(Size, Alignment);
92 State.addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset3,
101 Hexagon_CCState &State,
112 if (unsigned Reg = State.AllocateReg(RegList1, 6)) {
113 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
124 if (unsigned Reg = State.AllocateReg(RegList2, 3)) {
125 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
131 const Type* ArgTy = LocVT.getTypeForEVT(State.getContext());
133 State.getTarget().getTargetData()->getABITypeAlignment(ArgTy);
135 State.getTarget().getTargetData()->getTypeSizeInBits(ArgTy) / 8;
137 unsigned Offset3 = State.AllocateStack(Size, Alignment);
138 State.addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset3,