Cross Reference: /external/qemu/tcg/arm/tcg-target.c

Lines Matching defs:addr_reg
958     int addr_reg, data_reg, data_reg2, bswap;
977     addr_reg = *args++;
986      *  shr r8, addr_reg, #TARGET_PAGE_BITS
994                     0, addr_reg, SHIFT_IMM_LSR(TARGET_PAGE_BITS));
1017                         0, addr_reg, (1 << s_bits) - 1);
1031         tcg_out_ld8_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1034         tcg_out_ld8s_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1037         tcg_out_ld16u_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1044             tcg_out_ld16u_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1047             tcg_out_ld16s_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1052         tcg_out_ld32_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1059             tcg_out_ld32_rwb(s, COND_EQ, data_reg2, TCG_REG_R1, addr_reg);
1064             tcg_out_ld32_rwb(s, COND_EQ, data_reg, TCG_REG_R1, addr_reg);
1074     if (addr_reg != TCG_REG_R0) {
1076                         TCG_REG_R0, 0, addr_reg, SHIFT_IMM_LSL(0));
1126             tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R8, addr_reg,
1128             addr_reg = TCG_REG_R8;
1134         tcg_out_ld8_12(s, COND_AL, data_reg, addr_reg, 0);
1137         tcg_out_ld8s_8(s, COND_AL, data_reg, addr_reg, 0);
1140         tcg_out_ld16u_8(s, COND_AL, data_reg, addr_reg, 0);
1147             tcg_out_ld16u_8(s, COND_AL, data_reg, addr_reg, 0);
1150             tcg_out_ld16s_8(s, COND_AL, data_reg, addr_reg, 0);
1155         tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0);
1163         if (data_reg == addr_reg) {
1164             tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, bswap ? 0 : 4);
1165             tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, bswap ? 4 : 0);
1167             tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, bswap ? 4 : 0);
1168             tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, bswap ? 0 : 4);
1181     int addr_reg, data_reg, data_reg2, bswap;
1200     addr_reg = *args++;
1209      *  shr r8, addr_reg, #TARGET_PAGE_BITS
1214                     TCG_REG_R8, 0, addr_reg, SHIFT_IMM_LSR(TARGET_PAGE_BITS));
1237                         0, addr_reg, (1 << s_bits) - 1);
1251         tcg_out_st8_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1256             tcg_out_st16_r(s, COND_EQ, TCG_REG_R0, addr_reg, TCG_REG_R1);
1258             tcg_out_st16_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1265             tcg_out_st32_r(s, COND_EQ, TCG_REG_R0, addr_reg, TCG_REG_R1);
1267             tcg_out_st32_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1);
1273             tcg_out_st32_rwb(s, COND_EQ, TCG_REG_R0, TCG_REG_R1, addr_reg);
1277             tcg_out_st32_rwb(s, COND_EQ, data_reg, TCG_REG_R1, addr_reg);
1288                     TCG_REG_R0, 0, addr_reg, SHIFT_IMM_LSL(0));
1366             tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R1, addr_reg,
1368             addr_reg = TCG_REG_R1;
1374         tcg_out_st8_12(s, COND_AL, data_reg, addr_reg, 0);
1379             tcg_out_st16_8(s, COND_AL, TCG_REG_R0, addr_reg, 0);
1381             tcg_out_st16_8(s, COND_AL, data_reg, addr_reg, 0);
1388             tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addr_reg, 0);
1390             tcg_out_st32_12(s, COND_AL, data_reg, addr_reg, 0);
1398             tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addr_reg, 0);
1400             tcg_out_st32_12(s, COND_AL, TCG_REG_R0, addr_reg, 4);
1402             tcg_out_st32_12(s, COND_AL, data_reg, addr_reg, 0);
1403             tcg_out_st32_12(s, COND_AL, data_reg2, addr_reg, 4);