Lines Matching defs:regPrev
96425 ** If regPrev>0 then it is the first register in a vector that
96426 ** records the previous output. mem[regPrev] is a flag that is false
96427 ** if there has been no previous output. If regPrev>0 then code is
96440 int regPrev, /* Previous result register. No uniqueness if 0 */
96454 if( regPrev ){
96456 j1 = sqlite3VdbeAddOp1(v, OP_IfNot, regPrev);
96457 j2 = sqlite3VdbeAddOp4(v, OP_Compare, pIn->iMem, regPrev+1, pIn->nMem,
96461 sqlite3ExprCodeCopy(pParse, pIn->iMem, regPrev+1, pIn->nMem);
96462 sqlite3VdbeAddOp2(v, OP_Integer, 1, regPrev);
96625 ** within the output subroutine. The regPrev register set holds the previously
96684 int regPrev; /* A range of registers to hold previous output */
96790 regPrev = 0;
96794 regPrev = sqlite3GetTempRange(pParse, nExpr+1);
96795 sqlite3VdbeAddOp2(v, OP_Integer, 0, regPrev);
96883 regPrev, pKeyDup, P4_KEYINFO_HANDOFF, labelEnd);
96892 regPrev, pKeyDup, P4_KEYINFO_STATIC, labelEnd);
96977 if( regPrev ){
96978 sqlite3ReleaseTempRange(pParse, regPrev, nOrderBy+1);