Lines Matching refs:IF
16 IF :LNOT::DEF:ARMCOMM_S_H
59 IF :DEF: OVERRIDECPU
71 IF :DEF:ARM1136JS:LOR::DEF:CortexA8:LOR::DEF:ARM_GENERIC
133 IF _Variant=""
143 IF "$var"=""
146 IF :LNOT::DEF:_ok$var
157 IF "$cpu"<>_CPU
169 IF _Variant=""
176 IF "$var"=""
179 IF (_Variant=""):LAND:$var
201 IF (_StOff:AND:($size-1))!=0
205 IF "$number"<>""
232 IF "$s"="L"
236 IF {CONFIG}=16
238 IF _SwLong
254 IF {CONFIG}=16
256 IF _SwLong
287 IF "$align"=""
328 IF (_SBytes:AND:1)!=0
340 IF (_SBytes:AND:3)!=0
352 IF (_SBytes:AND:7)!=0
367 IF (_SBytes:AND:7)!=0
381 IF (_SBytes:AND:7)!=0
414 IF _cst=0
423 IF _cst>=256
450 IF "$a0":LEFT:1="["
451 IF "$a1"=""
454 IF "$a0":RIGHT:1="]"
455 IF "$a2"=""
461 IF "$a2"=""
482 IF {CONFIG}=16 ;// Thumb
485 IF _offset:LEFT:1="+"
489 IF _offset:LEFT:1="-"
506 IF ({CONFIG}=16):LAND:(("$a1":RIGHT:2)="]!")
635 IF _RRegList<>""
641 IF _DRegList<>""
647 IF ((_SBytes:AND:7)!=0)
651 IF (_SBytes!=0)
666 IF "$rreg"=""
670 IF "$rreg"="lr":LOR:"$rreg"="r4"
675 IF "$rreg"="r5":LOR:"$rreg"="r6"
680 IF "$rreg"="r7":LOR:"$rreg"="r8"
685 IF "$rreg"="r9":LOR:"$rreg"="r10"
690 IF "$rreg"="r11":LOR:"$rreg"="r12"
701 IF "$dreg"=""
705 IF "$dreg"="d8"
710 IF "$dreg"="d9"
715 IF "$dreg"="d10"
720 IF "$dreg"="d11"
725 IF "$dreg"="d12"
730 IF "$dreg"="d13"
735 IF "$dreg"="d14"
740 IF "$dreg"="d15"
751 IF _DRegList<>""
754 IF _RRegList=""
767 IF _SBytes!=0
785 IF _SBytes!=0
820 IF DEBUG_ON
833 IF "$val2" <> ""
838 IF "$val1" <> ""
843 IF "$val0"<>""
850 IF nArgs=1
853 IF nArgs=2
856 IF nArgs=3
882 IF DEBUG_STALLS_ON
894 IF "$platstall"!=""
900 IF :DEF:$_pl
901 IF $_pl
930 IF {ENDIAN}="big"
939 IF {ENDIAN}="big"