Cross Reference: /system/core/libpixelflinger/codeflinger/ARMAssembler.cpp

Lines Matching defs:Rm
229         int Rd, int Rm, int Rs, int Rn) {
230     if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } 
231     LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn);
233                 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm;
236         int Rd, int Rm, int Rs) {
237     if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } 
238     LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs);
239     *mPC++ = (cc<<28) | (s<<20) | (Rd<<16) | (Rs<<8) | 0x90 | Rm;
242         int RdLo, int RdHi, int Rm, int Rs) {
243     LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi,
244                         "UMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
246                 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
249         int RdLo, int RdHi, int Rm, int Rs) {
250     LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi,
251                         "UMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
253                 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
256         int RdLo, int RdHi, int Rm, int Rs) {
257     LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi,
258                         "SMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
260                 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
263         int RdLo, int RdHi, int Rm, int Rs) {
264     LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi,
265                         "SMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
267                 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm;
355 void ARMAssembler::SWP(int cc, int Rn, int Rd, int Rm) {
356     *mPC++ = (cc<<28) | (2<<23) | (Rn<<16) | (Rd << 12) | 0x90 | Rm;
358 void ARMAssembler::SWPB(int cc, int Rn, int Rd, int Rm) {
359     *mPC++ = (cc<<28) | (2<<23) | (1<<22) | (Rn<<16) | (Rd << 12) | 0x90 | Rm;
377 void ARMAssembler::CLZ(int cc, int Rd, int Rm)
379     *mPC++ = (cc<<28) | 0x16F0F10| (Rd<<12) | Rm;
382 void ARMAssembler::QADD(int cc,  int Rd, int Rm, int Rn)
384     *mPC++ = (cc<<28) | 0x1000050 | (Rn<<16) | (Rd<<12) | Rm;
387 void ARMAssembler::QDADD(int cc,  int Rd, int Rm, int Rn)
389     *mPC++ = (cc<<28) | 0x1400050 | (Rn<<16) | (Rd<<12) | Rm;
392 void ARMAssembler::QSUB(int cc,  int Rd, int Rm, int Rn)
394     *mPC++ = (cc<<28) | 0x1200050 | (Rn<<16) | (Rd<<12) | Rm;
397 void ARMAssembler::QDSUB(int cc,  int Rd, int Rm, int Rn)
399     *mPC++ = (cc<<28) | 0x1600050 | (Rn<<16) | (Rd<<12) | Rm;
403                 int Rd, int Rm, int Rs)
405     *mPC++ = (cc<<28) | 0x1600080 | (Rd<<16) | (Rs<<8) | (xy<<4) | Rm;
409                 int Rd, int Rm, int Rs)
411     *mPC++ = (cc<<28) | 0x12000A0 | (Rd<<16) | (Rs<<8) | (y<<4) | Rm;
415                 int Rd, int Rm, int Rs, int Rn)
417     *mPC++ = (cc<<28) | 0x1000080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (xy<<4) | Rm;
421                 int RdHi, int RdLo, int Rs, int Rm)
423     *mPC++ = (cc<<28) | 0x1400080 | (RdHi<<16) | (RdLo<<12) | (Rs<<8) | (xy<<4) | Rm;
427                 int Rd, int Rm, int Rs, int Rn)
429     *mPC++ = (cc<<28) | 0x1200080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (y<<4) | Rm;
437 void ARMAssembler::UXTB16(int cc, int Rd, int Rm, int rotate)
439     *mPC++ = (cc<<28) | 0x6CF0070 | (Rd<<12) | ((rotate >> 3) << 10) | Rm;
510 uint32_t ARMAssembler::reg_imm(int Rm, int type, uint32_t shift)
512     return ((shift&0x1F)<<7) | ((type&0x3)<<5) | (Rm&0xF);
515 uint32_t ARMAssembler::reg_rrx(int Rm)
517     return (ROR<<5) | (Rm&0xF);
520 uint32_t ARMAssembler::reg_reg(int Rm, int type, int Rs)
522     return ((Rs&0xF)<<8) | ((type&0x3)<<5) | (1<<4) | (Rm&0xF);
526 // LDR(B)/STR(B)/PLD (immediate and Rm can be negative, which indicate U=0)
545 uint32_t ARMAssembler::reg_scale_pre(int Rm, int type,
549             (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) |
550             reg_imm(abs(Rm), type, shift);
553 uint32_t ARMAssembler::reg_scale_post(int Rm, int type, uint32_t shift)
555     return (1<<25) | (((uint32_t(Rm)>>31)^1)<<23) | reg_imm(abs(Rm), type, shift);
558 // LDRH/LDRSB/LDRSH/STRH (immediate and Rm can be negative, which indicate U=0)
583 uint32_t ARMAssembler::reg_pre(int Rm, int W)
585     return (1<<24) | (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | (abs(Rm)&0xF);
588 uint32_t ARMAssembler::reg_post(int Rm)
590     return (((uint32_t(Rm)>>31)^1)<<23) | (abs(Rm)&0xF);