| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1907 DAGCombinerInfo &DCI, DebugLoc dl) const {
1908 SelectionDAG &DAG = DCI.DAG;
1977 if (DCI.isBeforeLegalize() && N0->hasOneUse() &&
2015 if (DCI.isBeforeLegalize() &&
2107 if (DCI.isBeforeLegalizeOps() ||
2139 if (!DCI.isCalledByLegalizer())
2140 DCI.AddToWorklist(ZextOp.getNode());
2305 EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
2335 EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
2363 EVT ShiftTy = DCI
1905 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, DebugLoc dl) const argument
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7111 // @param DCI Context.
7116 TargetLowering::DAGCombinerInfo &DCI,
7118 SelectionDAG &DAG = DCI.DAG;
7142 TargetLowering::DAGCombinerInfo &DCI) {
7146 SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes);
7151 SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes);
7161 TargetLowering::DAGCombinerInfo &DCI,
7166 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON()
7220 SelectionDAG &DAG = DCI.DAG;
7255 TargetLowering::DAGCombinerInfo &DCI,
7115 combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp, TargetLowering::DAGCombinerInfo &DCI, bool AllOnes = false) argument
7141 combineSelectAndUseCommutative(SDNode *N, bool AllOnes, TargetLowering::DAGCombinerInfo &DCI) argument
7160 AddCombineToVPADDL(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7254 AddCombineTo64bitMLAL(SDNode *AddcNode, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7387 PerformADDCCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7399 PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7418 PerformADDCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7435 PerformSUBCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
7457 PerformVMULCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7485 PerformMULCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7569 PerformANDCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7613 PerformORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7803 PerformXORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
7824 PerformBFICombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
7846 PerformVMOVRRDCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
7907 PerformSTORECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
8060 PerformBUILD_VECTORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
8094 PerformInsertEltCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
8173 CombineBaseUpdate(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
8307 CombineVLDDUP(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
8386 PerformVDUPLANECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) argument
8451 PerformVCVTCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
8487 PerformVDIVCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument
[all...] |
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 473 TargetLowering::DAGCombinerInfo &DCI,
475 if (DCI.isBeforeLegalize())
486 TargetLowering::DAGCombinerInfo &DCI,
488 if (DCI.isBeforeLegalize())
499 TargetLowering::DAGCombinerInfo &DCI,
501 if (DCI.isBeforeLegalizeOps())
608 TargetLowering::DAGCombinerInfo &DCI,
610 if (DCI.isBeforeLegalizeOps())
641 TargetLowering::DAGCombinerInfo &DCI,
646 if (DCI
472 PerformADDECombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
485 PerformSUBECombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
498 PerformDivRemCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
607 PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
640 PerformANDCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
680 PerformORCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
734 PerformADDCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget *Subtarget) argument
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13388 TargetLowering::DAGCombinerInfo &DCI,
13445 return DCI.CombineTo(N, InsV);
13456 return DCI.CombineTo(N, InsV);
13463 return DCI.CombineTo(N, InsV);
13471 TargetLowering::DAGCombinerInfo &DCI,
13478 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType()))
13484 return PerformShuffleCombine256(N, DAG, DCI, Subtarget);
13501 /// DCI, PerformTruncateCombine - Converts truncate operation to
13506 DAGCombinerInfo &DCI) const {
13507 if (!DCI
13387 PerformShuffleCombine256(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget* Subtarget) argument
13470 PerformShuffleCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
13628 XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) argument
13722 PerformEXTRACT_VECTOR_ELTCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) argument
13809 PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
14289 PerformCMOVCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
14433 PerformMulCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) argument
14539 PerformShiftCombine(SDNode* N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
14666 CMPEQCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
14771 PerformAndCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
14847 PerformOrCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15030 PerformXorCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15070 PerformLOADCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15620 PerformBTCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) argument
15652 PerformSExtCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15747 PerformZExtCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15841 PerformSETCCCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15876 PerformBrCondCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget *Subtarget) argument
15967 PerformADCCombine(SDNode *N, SelectionDAG &DAG, X86TargetLowering::DAGCombinerInfo &DCI) argument
[all...] |