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Searched defs:Rt (Results 1 - 2 of 2) sorted by relevance

/external/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	1443 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 1451 // On stores, the writeback operand precedes Rt. 1468 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) 1471 // On loads, the writeback operand comes after Rt. 1502 if (writeback && (Rn == 15 \|\| Rn == Rt)) 1586 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 1595 unsigned Rt2 = Rt + 1; 1599 // For {LD,ST}RD, Rt must be even, else undefined. 1607 if (Rt & 0x1) S = MCDisassembler::SoftFail; 1619 if (writeback && (Rn == 15 \|\| Rn == Rt \|\| R 3124 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3261 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3537 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3561 unsigned Rt = fieldFromInstruction(Insn, 0, 4); local 3588 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3613 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3641 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 3666 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4240 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4266 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4315 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4352 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4410 unsigned Rt = fieldFromInstruction(Insn, 12, 4); local 4496 unsigned Rt = fieldFromInstruction(Val, 12, 4); local 4526 unsigned Rt = fieldFromInstruction(Val, 12, 4); local [all...]
/external/llvm/lib/Target/ARM/AsmParser/
H A D	ARMAsmParser.cpp	`3887 // Rt, Rt2 3906 // Rt, Rt2 4019 // Rt 4037 // Rt 4057 // Rt 4075 // Rt 4091 // Rt, Rt2 4110 // Rt, Rt2 5274 // Rt2 must be Rt + 1. 5275 unsigned Rt local 5284 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); local 5295 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg()); local [all...]`

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