Searched defs:ShiftAmount (Results 1 - 4 of 4) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 394 SDValue ShiftAmount = DAG.getConstant(NumBits, local 397 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); 552 SDValue ShiftAmount = DAG.getConstant(NumBits, local 554 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
|
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 612 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); local 619 if (Opc == ISD::SRL && ShiftAmount) { 623 ShiftAmount -= 1; 626 while (ShiftAmount--)
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 612 static bool Is_PostInc_S4_Offset(SDNode * S, int ShiftAmount) { argument 619 if (ShiftAmount > 0) { 620 m = v % ShiftAmount; 621 v = v >> ShiftAmount; 654 // ShiftAmount = number of left-shifted bits in the Hexagon instruction. 655 int ShiftAmount = VT.getSizeInBits() / 16; local 656 if (isLegal && Is_PostInc_S4_Offset(Offset.getNode(), ShiftAmount)) {
|
/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 102 unsigned &ShiftAmount); 3528 const MCExpr *ShiftAmount; local 3530 if (getParser().ParseExpression(ShiftAmount)) { 3534 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount); 3607 const MCExpr *ShiftAmount; local 3609 if (getParser().ParseExpression(ShiftAmount)) { 3613 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount); 3668 const MCExpr *ShiftAmount; local 3670 if (getParser().ParseExpression(ShiftAmount)) { 3674 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount); [all...] |
Completed in 2201 milliseconds