/external/stlport/test/eh/ |
H A D | test_bit_vector.cpp | 36 typedef EH_BIT_VECTOR BitVector; typedef 39 container_category(const BitVector&) argument 53 gTestController.SetCurrentTestName("BitVector::reserve()"); 56 void operator()( BitVector& v ) const 74 BitVector emptyVector; 75 BitVector testVector, testVector2; 93 StrongCheck(testVector, test_insert_one<BitVector>(testVector) ); 94 StrongCheck(testVector, test_insert_one<BitVector>(testVector,0) ); 95 StrongCheck(testVector, test_insert_one<BitVector>(testVector, (int)testVector.size()) ); 97 StrongCheck(testVector, test_insert_n<BitVector>(testVecto [all...] |
/external/v8/test/cctest/ |
H A D | test-dataflow.cc | 37 TEST(BitVector) { 42 BitVector v(15, zone); 49 BitVector w(15, zone); 57 BitVector v(64, zone); 62 BitVector::Iterator iter(&v); 75 BitVector v(15, zone); 77 BitVector w(15, zone); 85 BitVector v(15, zone); 87 BitVector w(15, zone); 91 BitVector [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | RegisterScavenging.h | 21 #include "llvm/ADT/BitVector.h" 60 BitVector CalleeSavedRegs; 64 BitVector ReservedRegs; 69 BitVector RegsAvailable; 73 BitVector KillRegs, DefRegs; 103 void getRegsUsed(BitVector &used, bool includeReserved); 107 BitVector getRegsAvailable(const TargetRegisterClass *RC); 146 void setUsed(BitVector &Regs) { 149 void setUnused(BitVector &Regs) { 154 void addRegWithSubRegs(BitVector [all...] |
H A D | RegisterClassInfo.h | 21 #include "llvm/ADT/BitVector.h" 58 BitVector Reserved;
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/external/v8/src/ |
H A D | data-flow.h | 41 class BitVector: public ZoneObject { class in namespace:v8::internal 43 // Iterator for the elements of this BitVector. 46 explicit Iterator(BitVector* target) 80 BitVector* target_; 85 friend class BitVector; 88 BitVector(int length, Zone* zone) function in class:v8::internal::BitVector 96 BitVector(const BitVector& other, Zone* zone) function in class:v8::internal::BitVector 107 BitVector& operator=(const BitVector [all...] |
H A D | data-flow.cc | 37 void BitVector::Print() { 52 void BitVector::Iterator::Advance() {
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H A D | lithium-allocator.h | 47 class BitVector; 427 BitVector* new_bits = new(zone) BitVector(new_length, zone); 432 BitVector* bits_; 497 BitVector* ComputeLiveOut(HBasicBlock* block); 498 void AddInitialIntervals(HBasicBlock* block, BitVector* live_out); 499 void ProcessInstructions(HBasicBlock* block, BitVector* live); 604 ZoneList<BitVector*> live_in_sets_;
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/external/llvm/include/llvm/ADT/ |
H A D | BitVector.h | 1 //===- llvm/ADT/BitVector.h - Bit vectors -----------------------*- C++ -*-===// 10 // This file implements the BitVector class. 27 class BitVector { class in namespace:llvm 39 friend class BitVector; 47 reference(BitVector &b, unsigned Idx) { 73 /// BitVector default ctor - Creates an empty bitvector. 74 BitVector() : Size(0), Capacity(0) { function in class:llvm::BitVector 78 /// BitVector ctor - Creates a bitvector of specified number of bits. All 80 explicit BitVector(unsigned s, bool t = false) : Size(s) { function in class:llvm::BitVector 88 /// BitVector cop 89 BitVector(const BitVector &RHS) : Size(RHS.size()) { function in class:llvm::BitVector 102 BitVector(BitVector &&RHS) function in class:llvm::BitVector [all...] |
H A D | PackedVector.h | 17 #include "llvm/ADT/BitVector.h" 30 static T getValue(const llvm::BitVector &Bits, unsigned Idx) { 37 static void setValue(llvm::BitVector &Bits, unsigned Idx, T val) { 47 static T getValue(const llvm::BitVector &Bits, unsigned Idx) { 56 static void setValue(llvm::BitVector &Bits, unsigned Idx, T val) { 77 llvm::BitVector Bits;
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H A D | SmallBitVector.h | 17 #include "llvm/ADT/BitVector.h" 32 // TODO: In "large" mode, a pointer to a BitVector is used, leading to an 88 BitVector *getPointer() const { 90 return reinterpret_cast<BitVector *>(X); 99 void switchToLarge(BitVector *BV) { 145 switchToLarge(new BitVector(s, t)); 153 switchToLarge(new BitVector(*RHS.getPointer())); 261 BitVector *BV = new BitVector(N, t); 274 BitVector *B [all...] |
/external/clang/include/clang/Analysis/Analyses/ |
H A D | ReachableCode.h | 24 class BitVector; 50 llvm::BitVector &Reachable);
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H A D | CFGReachabilityAnalysis.h | 19 #include "llvm/ADT/BitVector.h" 33 typedef llvm::BitVector ReachableSet;
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H A D | PostOrderCFGView.h | 22 #include "llvm/ADT/BitVector.h" 32 /// \brief Implements a set of CFGBlocks using a BitVector. 39 llvm::BitVector VisitedBlockIDs;
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/external/clang/include/clang/Analysis/Support/ |
H A D | BlkExprDeclBitVector.h | 22 #include "llvm/ADT/BitVector.h" 87 llvm::BitVector DeclBV; 111 llvm::BitVector::reference getBit(unsigned i) { 119 llvm::BitVector::reference 128 llvm::BitVector::reference getDeclBit(unsigned i) { return DeclBV[i]; } 129 const llvm::BitVector::reference getDeclBit(unsigned i) const { 130 return const_cast<llvm::BitVector&>(DeclBV)[i]; 207 llvm::BitVector BlkExprBV; 250 llvm::BitVector::reference 254 const llvm::BitVector [all...] |
/external/llvm/lib/CodeGen/ |
H A D | SpillPlacement.h | 36 class BitVector; 50 BitVector *ActiveNodes; 97 void prepare(BitVector &RegBundles);
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H A D | CriticalAntiDepBreaker.h | 26 #include "llvm/ADT/BitVector.h" 44 const BitVector AllocatableSet; 68 BitVector KeepRegs;
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H A D | AggressiveAntiDepBreaker.h | 28 #include "llvm/ADT/BitVector.h" 126 BitVector CriticalPathSet; 177 BitVector GetRenameRegisters(unsigned Reg);
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H A D | RegisterScavenging.cpp | 68 BitVector PR = MBB->getParent()->getFrameInfo()->getPristineRegs(MBB); 112 void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) { 224 void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) { 246 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) { 247 BitVector Mask(TRI->getNumRegs()); 262 BitVector &Candidates, 330 BitVector Candidates = 345 BitVector Available = getRegsAvailable(RC);
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.h | 37 BitVector getReservedRegs(const MachineFunction &MF) const;
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/external/llvm/lib/Target/MBlaze/ |
H A D | MBlazeRegisterInfo.h | 51 BitVector getReservedRegs(const MachineFunction &MF) const;
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.h | 41 BitVector getReservedRegs(const MachineFunction &MF) const;
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/external/llvm/lib/Target/Mips/ |
H A D | MipsRegisterInfo.h | 48 BitVector getReservedRegs(const MachineFunction &MF) const;
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/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
H A D | FunctionSummary.h | 21 #include "llvm/ADT/BitVector.h" 38 llvm::BitVector VisitedBasicBlocks; 76 llvm::BitVector &Blocks = I->second->VisitedBasicBlocks;
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/external/llvm/lib/Target/ARM/ |
H A D | ARMMachineFunctionInfo.h | 21 #include "llvm/ADT/BitVector.h" 82 BitVector GPRCS1Frames; 83 BitVector GPRCS2Frames; 84 BitVector DPRCSFrames;
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/external/clang/lib/Analysis/ |
H A D | CFGReachabilityAnalysis.cpp | 44 llvm::BitVector visited(analyzed.size());
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