Searched refs:CurCycle (Results 1 - 7 of 7) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGVLIW.cpp | 88 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 151 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { argument 152 DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: "); 156 assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!"); 157 SU->setDepthToAtLeast(CurCycle); 167 unsigned CurCycle = 0; local 189 if (PendingQueue[i]->getDepth() == CurCycle) { 197 assert(PendingQueue[i]->getDepth() > CurCycle && "Negative latency?"); 206 ++CurCycle; 237 scheduleNodeTopDown(FoundSUnit, CurCycle); [all...] |
H A D | ScheduleDAGFast.cpp | 94 void ReleasePredecessors(SUnit *SU, unsigned CurCycle); 155 void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigned CurCycle) { argument 168 LiveRegCycles[I->getReg()] = CurCycle; 177 void ScheduleDAGFast::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) { argument 178 DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: "); 181 assert(CurCycle >= SU->getHeight() && "Node scheduled below its height!"); 182 SU->setHeightToAtLeast(CurCycle); 185 ReleasePredecessors(SU, CurCycle); 517 unsigned CurCycle = 0; local 520 ReleasePredecessors(&ExitSU, CurCycle); [all...] |
H A D | ScheduleDAGRRList.cpp | 128 /// CurCycle - The current scheduler state corresponds to this cycle. 129 unsigned CurCycle; member in class:__anon8721::ScheduleDAGRRList 158 NeedLatency(needlatency), AvailableQueue(availqueue), CurCycle(0), 306 CurCycle = 0; 581 if (NextCycle <= CurCycle) 588 CurCycle = NextCycle; 591 for (; CurCycle != NextCycle; ++CurCycle) { 615 // Bump CurCycle to account for latency. We assume the latency of other 639 AdvanceToCycle(CurCycle [all...] |
/external/llvm/lib/CodeGen/ |
H A D | PostRASchedulerList.cpp | 178 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 626 void SchedulePostRATDList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { argument 627 DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: "); 631 assert(CurCycle >= SU->getDepth() && 633 SU->setDepthToAtLeast(CurCycle); 643 unsigned CurCycle = 0; local 677 if (PendingQueue[i]->getDepth() <= CurCycle) { 716 ScheduleNodeTopDown(FoundSUnit, CurCycle); 720 DEBUG(dbgs() << "*** Max instructions per cycle " << CurCycle << '\n'); 722 ++CurCycle; [all...] |
H A D | ScoreboardHazardRecognizer.cpp | 53 unsigned CurCycle = 0; local 56 unsigned StageDepth = CurCycle + IS->getCycles(); 58 CurCycle += IS->getNextCycles();
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/external/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAG.h | 462 unsigned CurCycle; member in class:llvm::SchedulingPriorityQueue 466 CurCycle(0), HasReadyFilter(rf) {} 509 CurCycle = Cycle; 513 return CurCycle;
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonMachineScheduler.h | 261 unsigned CurCycle; member in class:llvm::VLIWMachineScheduler
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