Searched refs:Insn (Results 1 - 25 of 33) sorted by relevance

12

/external/dexmaker/src/dx/java/com/android/dx/rop/code/
H A DInsnList.java22 * List of {@link Insn} instances.
43 public Insn get(int n) {
44 return (Insn) get0(n);
53 public void set(int n, Insn insn) {
63 public Insn getLast() {
72 public void forEach(Insn.Visitor visitor) {
82 * The blocks must have the same number of insns, and each Insn must
83 * also return true to {@code Insn.contentEquals()}.
118 Insn one = (Insn) get
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H A DSwitchInsn.java28 extends Insn {
76 public Insn withAddedCatch(Type type) {
82 public Insn withRegisterOffset(int delta) {
96 public boolean contentEquals(Insn b) {
102 public Insn withNewRegisters(RegisterSpec result,
H A DCstInsn.java25 extends Insn {
66 public boolean contentEquals(Insn b) {
69 * Insn.contentEquals compares classes of this and b.
H A DFillArrayDataInsn.java31 extends Insn {
96 public Insn withAddedCatch(Type type) {
102 public Insn withRegisterOffset(int delta) {
110 public Insn withNewRegisters(RegisterSpec result,
H A DThrowingInsn.java29 extends Insn {
98 public Insn withAddedCatch(Type type) {
105 public Insn withRegisterOffset(int delta) {
113 public Insn withNewRegisters(RegisterSpec result,
H A DInsn.java30 public abstract class Insn implements ToHuman { class in inherits:ToHuman
51 public Insn(Rop opcode, SourcePosition position, RegisterSpec result, method in class:Insn
225 public abstract Insn withAddedCatch(Type type);
234 public abstract Insn withRegisterOffset(int delta);
245 public Insn withSourceLiteral() {
250 * Returns an exact copy of this Insn
254 public Insn copy() {
271 * Compares Insn contents, since {@code Insn.equals()} is defined
272 * to be an identity compare. Insn'
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H A DPlainCstInsn.java63 public Insn withAddedCatch(Type type) {
69 public Insn withRegisterOffset(int delta) {
78 public Insn withNewRegisters(RegisterSpec result,
H A DThrowingCstInsn.java83 public Insn withAddedCatch(Type type) {
91 public Insn withRegisterOffset(int delta) {
100 public Insn withNewRegisters(RegisterSpec result,
H A DBasicBlock.java86 Insn lastInsn = insns.get(sz - 1);
200 public Insn getFirstInsn() {
210 public Insn getLastInsn() {
235 Insn lastInsn = insns.getLast();
250 Insn lastInsn = insns.getLast();
H A DPlainInsn.java31 extends Insn {
85 public Insn withAddedCatch(Type type) {
91 public Insn withRegisterOffset(int delta) {
99 public Insn withSourceLiteral() {
149 public Insn withNewRegisters(RegisterSpec result,
H A DLocalVariableInfo.java48 private final HashMap<Insn, RegisterSpec> insnAssignments;
67 new HashMap<Insn, RegisterSpec>(blocks.getInstructionCount());
190 public void addAssignment(Insn insn, RegisterSpec spec) {
211 public RegisterSpec getAssignment(Insn insn) {
H A DBasicBlockList.java138 Insn insn = insns.get(j);
173 public void forEachInsn(Insn.Visitor visitor) {
313 implements Insn.Visitor {
368 private void visit(Insn insn) {
H A DLocalVariableExtractor.java121 Insn insn = insns.get(i);
/external/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp203 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
205 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
208 unsigned Insn,
211 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
213 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
215 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
217 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
221 unsigned Insn,
224 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
226 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
1293 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1438 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1582 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1773 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1802 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1887 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1927 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1967 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1991 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2017 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2090 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2105 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2148 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2422 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2693 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2740 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2788 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2823 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2878 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2923 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2966 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3002 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3114 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3257 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3302 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3313 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3338 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3349 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3396 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3412 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3533 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3556 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3583 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3608 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3636 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3661 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3686 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3753 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3819 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3886 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3950 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4020 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4084 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4165 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4237 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4263 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4289 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4311 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4348 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4382 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument
4408 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4435 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4463 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
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/external/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp127 unsigned Insn,
137 unsigned Insn,
147 unsigned Insn,
153 unsigned Insn,
158 unsigned Insn,
162 static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn,
167 unsigned Insn,
172 unsigned Insn,
177 unsigned Insn,
182 unsigned Insn,
270 uint32_t Insn; local
295 uint32_t Insn; local
381 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
403 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
433 DecodeCondCode(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
476 DecodeBC1(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
486 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
497 DecodeSimm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
505 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
516 DecodeExtSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
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/external/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp55 CodeGenInstruction &Insn,
73 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, argument
92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
96 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
100 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
102 OpsAdded += Insn.Operands[i].MINumOperands;
111 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i);
139 CodeGenInstruction Insn(Operator);
141 if (Insn.isCodeGenOnly || Insn
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H A DFixedLenDecoderEmitter.cpp374 void insnWithID(insn_t &Insn, unsigned Opcode) const { argument
387 Insn.push_back(BIT_UNSET);
389 Insn.push_back(bitFromBits(Bits, i));
403 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
434 const insn_t &Insn) const;
511 insn_t Insn; local
514 Owner->insnWithID(Insn, Owner->Opcodes[i]);
518 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits);
926 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
931 if (Insn[StartBi
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/external/dexmaker/src/dx/java/com/android/dx/ssa/
H A DSsaInsn.java55 public static SsaInsn makeFromRop(Insn insn, SsaBasicBlock block) {
70 * Like {@link com.android.dx.rop.code.Insn getResult()}.
92 * Like {@link com.android.dx.rop.code.Insn getSources()}.
184 abstract public Insn getOriginalRopInsn();
192 * @see com.android.dx.rop.code.Insn#getLocalAssignment()
223 public abstract Insn toRopInsn();
H A DNormalSsaInsn.java26 private Insn insn;
34 NormalSsaInsn(final Insn insn, final SsaBasicBlock block) {
104 * Like rop.Insn.getSources().
120 public Insn toRopInsn() {
134 public Insn getOriginalRopInsn() {
166 * @see Insn#withSourceLiteral
H A DLiteralOpUpgrader.java22 import com.android.dx.rop.code.Insn;
96 Insn originalRopInsn = insn.getOriginalRopInsn();
147 Insn originalRopInsn = insn.getOriginalRopInsn();
189 Insn originalRopInsn = insn.getOriginalRopInsn();
191 Insn newRopInsn;
H A DPhiInsn.java183 public Insn getOriginalRopInsn() {
283 public Insn toRopInsn() {
H A DDeadCodeRemover.java26 import com.android.dx.rop.code.Insn;
/external/dexmaker/src/main/java/com/google/dexmaker/
H A DLabel.java20 import com.android.dx.rop.code.Insn;
32 final List<Insn> instructions = new ArrayList<Insn>();
/external/dexmaker/src/dx/java/com/android/dx/dex/code/
H A DBlockAddresses.java21 import com.android.dx.rop.code.Insn;
133 Insn insn = one.getInsns().get(0);
H A DRopTranslator.java24 import com.android.dx.rop.code.Insn;
189 method.getBlocks().forEachInsn(new Insn.BaseVisitor() {
271 Insn lastInsn = block.getLastInsn();
453 private static RegisterSpecList getRegs(Insn insn) {
467 private static RegisterSpecList getRegs(Insn insn,
495 private class TranslationVisitor implements Insn.Visitor {
675 Insn insn
714 "Insn with result/move-result-pseudo mismatch " +
753 "Insn with result/move-result-pseudo mismatch" + insn);
871 public void addIntroductionIfNecessary(Insn ins
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