Searched refs:ROTL (Results 1 - 22 of 22) sorted by relevance

/external/chromium/net/http/
H A Dmd4.cc65 #define ROTL(x,n) (((x) << (n)) | ((x) >> (0x20 - n))) macro
68 #define RD1(a,b,c,d,k,s) a += F(b,c,d) + X[k]; a = ROTL(a,s)
71 #define RD2(a,b,c,d,k,s) a += G(b,c,d) + X[k] + 0x5A827999; a = ROTL(a,s)
74 #define RD3(a,b,c,d,k,s) a += H(b,c,d) + X[k] + 0x6ED9EBA1; a = ROTL(a,s)
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h316 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
/external/dbus/dbus/
H A Ddbus-sha.c125 #define ROTL(n,X) ( ( ( X ) << n ) | ( ( X ) >> ( 32 - n ) ) ) macro
141 #define expand(W,i) ( W[ i & 15 ] = ROTL( 1, ( W[ i & 15 ] ^ W[ (i - 14) & 15 ] ^ \
147 a' = e + ROTL( 5, a ) + f( b, c, d ) + k + data;
149 c' = ROTL( 30, b );
159 ( e += ROTL( 5, a ) + f( b, c, d ) + k + data, b = ROTL( 30, b ) )
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp135 setOperationAction(ISD::ROTL , MVT::i64, Legal);
139 setOperationAction(ISD::ROTL , MVT::i64, Expand);
143 setOperationAction(ISD::ROTL , MVT::i32, Legal);
147 setOperationAction(ISD::ROTL , MVT::i32, Expand);
151 setOperationAction(ISD::ROTL , MVT::i16, Expand);
153 setOperationAction(ISD::ROTL , MVT::i8, Expand);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp174 case ISD::ROTL: return "rotl";
H A DLegalizeVectorOps.cpp190 case ISD::ROTL:
H A DSelectionDAG.cpp2228 case ISD::ROTL:
2727 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2852 case ISD::ROTL:
6020 case ISD::ROTL:
H A DDAGCombiner.cpp2995 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT))
2996 return DAG.getNode(ISD::ROTL, N->getDebugLoc(), VT, BSwap, ShAmt);
3173 bool HasROTL = TLI.isOperationLegalOrCustom(ISD::ROTL, VT);
3217 Rot = DAG.getNode(ISD::ROTL, DL, VT, LHSShiftArg, LHSShiftAmt);
3253 return DAG.getNode(ISD::ROTL, DL, VT,
3273 return DAG.getNode(ISD::ROTL, DL, VT,
3299 return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT,
3313 return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT,
H A DLegalizeIntegerTypes.cpp789 case ISD::ROTL:
2458 case ISD::ROTL:
H A DLegalizeDAG.cpp1260 case ISD::ROTL:
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp374 } else if (Opcode == ISD::ROTL) {
992 N->getOperand(0).getOpcode() != ISD::ROTL) {
/external/llvm/lib/Target/CellSPU/
H A DSPUISelLowering.cpp237 setOperationAction(ISD::ROTL, MVT::i32, Legal);
238 setOperationAction(ISD::ROTL, MVT::i16, Legal);
239 setOperationAction(ISD::ROTL, MVT::i8, Custom);
2233 case ISD::ROTL: {
2814 case ISD::ROTL:
/external/openssl/crypto/bn/asm/
H A Dppc.pl126 $ROTL= "rotlwi"; # rotate left by immediate
150 $ROTL= "rotldi"; # rotate left by immediate
1713 $ROTL r3,r11,`$BITS/2` # rotate by $BITS/2 and store in r3
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp101 setOperationAction(ISD::ROTL, MVT::i8, Expand);
103 setOperationAction(ISD::ROTL, MVT::i16, Expand);
/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp164 setOperationAction(ISD::ROTL, MVT::i32, Expand);
/external/valgrind/main/VEX/priv/
H A Dguest_ppc_toIR.c1356 // ROTL(src32/64, rot_amt5/6)
1357 static IRExpr* /* :: Ity_I32/64 */ ROTL ( IRExpr* src, function
4169 // tmp32 = (ROTL(rS_Lo32, Imm)
4172 r = ROTL( unop(Iop_64to32, mkexpr(rS) ), mkU8(sh_imm) );
4182 // rA = (ROTL(rS, Imm) & mask) | (rA & ~mask);
4184 r = ROTL(mkexpr(rS), mkU8(sh_imm));
4204 // tmp32 = (ROTL(rS_Lo32, Imm)
4206 r = ROTL( unop(Iop_64to32, mkexpr(rS) ), mkU8(sh_imm) );
4234 // rA = ROTL(rS, Imm) & mask
4236 ROTL(mkexp
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/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp773 setOperationAction(ISD::ROTL , MVT::i32, Expand);
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1370 setOperationAction(ISD::ROTL , MVT::i32, Expand);
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp109 setOperationAction(ISD::ROTL , MVT::i32, Expand);
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp216 setOperationAction(ISD::ROTL, MVT::i32, Expand);
217 setOperationAction(ISD::ROTL, MVT::i64, Expand);
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp623 // ARM does not have ROTL.
624 setOperationAction(ISD::ROTL, MVT::i32, Expand);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp756 setOperationAction(ISD::ROTL, (MVT::SimpleValueType)VT, Expand);

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