Searched refs:prefetch (Results 1 - 25 of 52) sorted by relevance

123

/external/linux-tools-perf/util/include/linux/
H A Dprefetch.h4 static inline void prefetch(void *a __attribute__((unused))) { } function
H A Dlist.h4 #include <linux/prefetch.h>
8 #include "prefetch.h"
/external/kernel-headers/original/asm-generic/
H A Dxor.h309 prefetch(p2);
313 prefetch(p2+8);
336 prefetch(p2);
337 prefetch(p3);
341 prefetch(p2+8);
342 prefetch(p3+8);
367 prefetch(p2);
368 prefetch(p3);
369 prefetch(p4);
373 prefetch(p
[all...]
/external/iptables/libiptc/
H A Dlinux_list.h30 #define prefetch(x) 1 macro
339 for (pos = (head)->next, prefetch(pos->next); pos != (head); \
340 pos = pos->next, prefetch(pos->next))
361 for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
362 pos = pos->prev, prefetch(pos->prev))
382 prefetch(pos->member.next); \
385 prefetch(pos->member.next))
395 prefetch(pos->member.prev); \
398 prefetch(pos->member.prev))
419 prefetch(po
[all...]
/external/kernel-headers/original/asm-arm/
H A Dprocessor.h107 #define prefetch(ptr) \ macro
117 #define prefetchw(ptr) prefetch(ptr)
/external/kernel-headers/original/linux/
H A Dlist.h8 #include <linux/prefetch.h>
362 for (pos = (head)->next; prefetch(pos->next), pos != (head); \
384 for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
405 prefetch(pos->member.next), &pos->member != (head); \
416 prefetch(pos->member.prev), &pos->member != (head); \
441 prefetch(pos->member.next), &pos->member != (head); \
453 for (; prefetch(pos->member.next), &pos->member != (head); \
527 prefetch(rcu_dereference(pos)->next), pos != (head); \
564 prefetch(rcu_dereference(pos)->member.next), \
582 prefetch(rcu_dereferenc
[all...]
/external/openssl/crypto/sha/asm/
H A Dsha1-s390x.pl50 $ctx="%r2"; $prefetch="%r2";
71 lg $prefetch,$stdframe($sp) ### Xupdate(16) warm-up
80 xgr $X[0],$prefetch ### Xupdate($i)
81 lg $prefetch,`$stdframe+4*(($i+2)%16)`($sp)
83 xgr $X[0],$prefetch
H A Dsha256-mips.s779 lw $8,0($29) # prefetch from ring buffer
832 lw $9,4($29) # prefetch from ring buffer
883 lw $10,8($29) # prefetch from ring buffer
951 lw $11,12($29) # prefetch from ring buffer
1016 lw $12,16($29) # prefetch from ring buffer
1081 lw $13,20($29) # prefetch from ring buffer
1146 lw $14,24($29) # prefetch from ring buffer
1211 lw $15,28($29) # prefetch from ring buffer
1276 lw $16,32($29) # prefetch from ring buffer
1341 lw $17,36($29) # prefetch fro
[all...]
H A Dsha512-586.pl71 my $prefetch=shift;
124 &movq ("mm6",&QWP(8*(9+16-14),"esp")) if ($prefetch);
127 &movq ("mm2",&QWP(8*(9+16-1),"esp")) if ($prefetch);
/external/linux-tools-perf/util/include/linux/added/
H A Dlist.h351 for (pos = (head)->next; prefetch(pos->next), pos != (head); \
373 for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
394 prefetch(pos->prev), pos != (head); \
405 prefetch(pos->member.next), &pos->member != (head); \
416 prefetch(pos->member.prev), &pos->member != (head); \
441 prefetch(pos->member.next), &pos->member != (head); \
455 prefetch(pos->member.prev), &pos->member != (head); \
467 for (; prefetch(pos->member.next), &pos->member != (head); \
635 for (pos = (head)->first; pos && ({ prefetch(pos->next); 1; }); \
651 pos && ({ prefetch(po
[all...]
/external/yaffs2/yaffs2/
H A Ddevextras.h54 #define prefetch(x) 1 macro
193 for (pos = (head)->next, prefetch(pos->next); pos != (head); \
194 pos = pos->next, prefetch(pos->next))
/external/kernel-headers/original/asm-mips/
H A Dprocessor.h21 #include <asm/prefetch.h>
251 static inline void prefetch(const void *addr) function
/external/oprofile/events/mips/r12000/
H A Devents20 event:0x10 counters:0,1,2,3 um:zero minimum:500 name:PREFETCH_INSTRUCTIONS_EXECUTED : Executed prefetch instructions
21 event:0x11 counters:0,1,2,3 um:zero minimum:500 name:PREFETCH_MISSES_IN_DCACHE : Primary data cache misses by prefetch instructions
34 event:0x1e counters:0,1,2,3 um:zero minimum:500 name:STORE_PREFETCH_EXCLUSIVE_TO_CLEAN_SC_BLOCK : Store/prefetch exclusive to clean block in secondary cache
35 event:0x1f counters:0,1,2,3 um:zero minimum:500 name:STORE_PREFETCH_EXCLUSIVE_SHARED_SC_BLOCK : Store/prefetch exclusive to shared block in secondary
/external/llvm/test/MC/X86/
H A D3DNow.s73 // CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00]
75 prefetch (%rax) label
/external/oprofile/events/mips/vr5432/
H A Devents6 event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Load, prefetch/CacheOps execution (no sync)
/external/oprofile/events/mips/vr5500/
H A Devents8 event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction
/external/clang/test/CodeGen/
H A Dbuiltins.c29 V(prefetch, (&N));
30 V(prefetch, (&N, 1));
31 V(prefetch, (&N, 1, 0));
/external/oprofile/events/i386/atom/
H A Devents25 event:0x24 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_IN : L2 cache misses
27 event:0x26 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_OUT : L2 cache lines evicted
28 event:0x27 counters:0,1 um:core,prefetch minimum:500 name:L2_M_LINES_OUT : Modified lines evicted from the L2 cache
30 event:0x29 counters:0,1 um:core,prefetch,mesi minimum:6000 name:L2_LD : L2 cache reads
33 event:0x2E counters:0,1 um:l2_rqsts,core,prefetch,mesi minimum:6000 name:L2_RQSTS : L2 cache requests
34 event:0x30 counters:0,1 um:core,prefetch,mesi minimum:500 name:L2_REJECT_BUSQ : Rejected L2 cache requests
H A Dunit_masks111 name:prefetch type:bitmask default:0x60
113 0x20 hw Hardware prefetch only
114 0x00 exclude_hw Exclude hardware prefetch
/external/oprofile/events/i386/westmere/
H A Dunit_masks115 0x01 requests L1D hardware prefetch requests
116 0x02 miss L1D hardware prefetch misses
117 0x04 triggers L1D hardware prefetch requests triggered
148 0x04 prefetch_clean L2 lines evicted by a prefetch request
149 0x08 prefetch_dirty L2 modified lines evicted by a prefetch request
161 0x40 prefetch_hit L2 prefetch hits
162 0x80 prefetch_miss L2 prefetch misses
170 0x08 prefetch L2 prefetch transactions
/external/openssl/crypto/aes/asm/
H A Daes-sparcv9.pl370 ldx [$tbl+2048+0],%g0 ! prefetch te4
373 ldx [$tbl+2048+32],%g0 ! prefetch te4
376 ldx [$tbl+2048+64],%g0 ! prefetch te4
379 ldx [$tbl+2048+96],%g0 ! prefetch te4
382 ldx [$tbl+2048+128],%g0 ! prefetch te4
385 ldx [$tbl+2048+160],%g0 ! prefetch te4
388 ldx [$tbl+2048+192],%g0 ! prefetch te4
391 ldx [$tbl+2048+224],%g0 ! prefetch te4
916 ldx [$tbl+2048+0],%g0 ! prefetch td4
919 ldx [$tbl+2048+32],%g0 ! prefetch td
[all...]
H A Daes-parisc.pl321 ldw 1024+0($tbl),%r0 ; prefetch te4
324 ldw 1024+32($tbl),%r0 ; prefetch te4
327 ldw 1024+64($tbl),%r0 ; prefetch te4
330 ldw 1024+96($tbl),%r0 ; prefetch te4
333 ldw 1024+128($tbl),%r0 ; prefetch te4
336 ldw 1024+160($tbl),%r0 ; prefetch te4
339 ldw 1024+192($tbl),%r0 ; prefetch te4
342 ldw 1024+224($tbl),%r0 ; prefetch te4
790 ldw 1024+0($tbl),%r0 ; prefetch td4
793 ldw 1024+32($tbl),%r0 ; prefetch td
[all...]
/external/oprofile/events/i386/nehalem/
H A Dunit_masks90 0x40 prefetch_hit Counts L2 prefetch hits for both code and data
91 0x80 prefetch_miss Counts L2 prefetch misses for both code and data
101 0x10 i_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the I (invalid) state, i
102 0x20 s_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the S (shared) state
103 0x40 e_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the E (exclusive) state
104 0x80 m_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the M (modified) state
105 0xF0 mesi Counts all L2 prefetch requests
162 0x01 nta Counts number of SSE NTA prefetch/weakly-ordered instructions which missed the L1 data cache
165 0x01 requests Counts number of hardware prefetch requests dispatched out of the prefetch FIF
[all...]
/external/oprofile/events/mips/r10000/
H A Devents9 event:0x02 counters:0 um:zero minimum:500 name:LOAD_PREFETC_SYNC_CACHEOP_ISSUED : Load / prefetch / sync / CacheOp issued
10 event:0x02 counters:1 um:zero minimum:500 name:LOAD_PREFETC_SYNC_CACHEOP_GRADUATED : Load / prefetch / sync / CacheOp graduated
/external/chromium/chrome/browser/ui/login/
H A Dlogin_prompt_browsertest.cc168 const char* kPrefetchAuthPage = "files/login/prefetch.html";
177 // Confirm that <link rel="prefetch"> targetting an auth required
184 // prefetch resource requires authorization.
192 explicit SetPrefetchForTest(bool prefetch) argument
194 ResourceDispatcherHost::set_is_prefetch_enabled(prefetch);

Completed in 980 milliseconds

123