Searched refs:SH (Results 1 - 25 of 32) sorted by relevance

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/external/skia/gm/
H A Dstrokes.cpp21 static const SkScalar SH = SkIntToScalar(H); member in namespace:skiagm
60 canvas->translate(0, SH * y);
63 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
120 canvas->translate(0, SH * y);
124 SH - SkIntToScalar(2)));
130 rotate(SkIntToScalar(15), SW/2, SH/2, canvas);
H A Dstrokerects.cpp21 static const SkScalar SH = SkIntToScalar(H); member in namespace:skiagm
58 canvas->translate(SW * x, SH * y);
61 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
/external/llvm/lib/Target/PowerPC/InstPrinter/
H A DPPCInstPrinter.cpp34 unsigned char SH = MI->getOperand(2).getImm(); local
38 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
41 if (SH <= 31 && MB == (32-SH) && ME == 31) {
43 SH = 32-SH;
49 O << ", " << (unsigned int)SH;
67 unsigned char SH = MI->getOperand(2).getImm(); local
69 // rldicr RA, RS, SH, 6
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp87 unsigned &SH, unsigned &MB, unsigned &ME);
348 bool isShiftMask, unsigned &SH,
382 SH = Shift & 31;
406 unsigned Value, SH = 0; local
438 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value;
445 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value;
451 SH &= 31;
452 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB),
977 unsigned Imm, Imm2, SH, MB, ME; local
983 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, M
347 isRotateAndMask(SDNode *N, unsigned Mask, bool isShiftMask, unsigned &SH, unsigned &MB, unsigned &ME) argument
1036 unsigned Imm, SH, MB, ME; local
1048 unsigned Imm, SH, MB, ME; local
[all...]
H A DPPCJITInfo.cpp33 #define BUILD_RLDICR(RD,RS,SH,ME) \
34 ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \
35 (((ME) & 63) << 6) | (1 << 2) | ((((SH) >> 5) & 1) << 1))
/external/qemu/tcg/ppc/
H A Dtcg-target.c400 #define SH(s) ((s)<<11) macro
559 | SH (32 - (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS))
574 | SH (0)
755 | SH (32 - (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS))
770 | SH (0)
807 | SH (0)
815 | SH (0)
1152 | SH (27)
1219 | SH (sh)
1239 | SH (3
[all...]
/external/srec/config/en.us/dictionary/
H A Dc0.650 "!EXCLAMATION-POINT EH2 K S K L AH0 M EY1 SH AH0 N P OY2 N T
58 #SHARP-SIGN SH AA1 R P S AY1 N
94 -DASH D AE1 SH
102 /SLASH S L AE1 SH
159 ABASH AH0 B AE1 SH
160 ABASHED AH0 B AE1 SH T
191 ABBREVIATION AH0 B R IY2 V IY0 EY1 SH AH0 N
192 ABBREVIATIONS AH0 B R IY2 V IY0 EY1 SH AH0 N Z
206 ABDICATION AE2 B D IH0 K EY1 SH AH0 N
221 ABDUCTION AE0 B D AH1 K SH AH
[all...]
/external/llvm/include/llvm/Analysis/
H A DScalarEvolutionExpander.h137 Value *expandCodeFor(const SCEV *SH, Type *Ty, Instruction *I);
220 Value *expandCodeFor(const SCEV *SH, Type *Ty = 0);
/external/v8/src/mips/
H A Dconstants-mips.cc331 case SH:
H A Dconstants-mips.h289 SH = ((5 << 3) + 1) << kOpcodeShift,
/external/strace/linux/
H A Dsyscall.h176 # elif defined SH
329 #if defined M68K || defined SH
/external/qemu/tcg/ppc64/
H A Dtcg-target.c397 #define SH(s) ((s)<<11) macro
445 sh = SH (sh & 0x1f) | (((sh >> 5) & 1) << 1);
578 | SH (32 - (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS))
588 | SH (0)
1086 | SH (27)
1154 | SH (sh)
1409 | SH (args[2])
1423 | SH (32 - args[2])
1434 tcg_out32 (s, SRAWI | RS (args[1]) | RA (args[0]) | SH (args[2]));
1479 int sh = SH (arg
[all...]
/external/strace/
H A Ddefs.h407 || defined(SH) || defined(SH64) || defined(S390) || defined(S390X) \
607 && !defined(SH))
H A Dsock.c41 #if defined (ALPHA) || defined(SH) || defined(SH64)
H A Dio.c274 #if defined(SH)
H A Dsyscall.c720 #elif defined(SH)
1231 # elif defined(SH)
1294 #elif defined(SH)
1678 # elif defined(SH)
1930 # elif defined(SH)
2187 #elif defined(SH)
2764 #elif defined(SH)
H A Dmem.c292 #elif defined(SH) || defined(SH64)
293 /* SH has always passed the args in registers */
H A Dnet.c1838 #if defined(LINUX) && !defined(SPARC) && !defined(SPARC64) && !defined(SH) && !defined(IA64)
1845 #elif defined(SPARC) || defined(SPARC64) || defined(SH) || defined(SVR4) || defined(FREEBSD) || defined(IA64)
H A Dutil.c1171 # elif defined(SH)
1426 # elif defined (SH)
/external/libffi/
H A DMakefile.am150 if SH
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/
H A Dorg.apache.lucene.analysis_1.9.1.v20100518-1140.jarMETA-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ...
/external/llvm/lib/Target/MBlaze/Disassembler/
H A DMBlazeDisassembler.cpp56 MBlaze::SB, MBlaze::SH, MBlaze::SW, UNSUPPORTED, //34,35,36,37
398 case 0x0: return MBlaze::SH;
484 case MBlaze::SH: return decodeSH(insn);
/external/llvm/lib/Analysis/
H A DScalarEvolutionExpander.cpp1478 Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty, argument
1481 return expandCodeFor(SH, Ty);
1484 Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty) { argument
1486 Value *V = expand(SH);
1488 assert(SE.getTypeSizeInBits(Ty) == SE.getTypeSizeInBits(SH->getType()) &&
/external/qemu/
H A Dppc-dis.c753 /* The SH field in an X or M form instruction. */
754 #define SH RSO + 1
757 #define EVUIMM SH
760 /* The SH field in an MD form instruction. This is split. */
761 #define SH6 SH + 1
765 /* The SH field of the tlbwe instruction, which is optional. */
883 /* SH field starting at bit position 16. */
1479 /* The SH field in an MD form instruction. This is split. */
1693 /* An M_MASK with the SH and ME fields fixed. */
1703 /* An MD_MASK with the SH fiel
750 #define SH macro
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2551 SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1, local
2554 DCI.AddToWorklist(SH.getNode());
2555 return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
2574 SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0, local
2577 DCI.AddToWorklist(SH.getNode());
2578 return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);

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