1c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 2c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * linux/include/asm-arm/cacheflush.h 3c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 4c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Copyright (C) 1999-2002 Russell King 5c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 6c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * This program is free software; you can redistribute it and/or modify 7c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * it under the terms of the GNU General Public License version 2 as 8c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * published by the Free Software Foundation. 9c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 10c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#ifndef _ASMARM_CACHEFLUSH_H 11c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define _ASMARM_CACHEFLUSH_H 12c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 13c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <linux/sched.h> 14c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <linux/mm.h> 15c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 16c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <asm/glue.h> 17c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <asm/shmparam.h> 18c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 19c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) 20c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 21c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 22c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Cache Model 23c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * =========== 24c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 25c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#undef _CACHE 26c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#undef MULTI_CACHE 27c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 28c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) 29c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# ifdef _CACHE 30c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 31c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# else 32c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define _CACHE v3 33c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# endif 34c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 35c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 36c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_ARM720T) 37c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# ifdef _CACHE 38c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 39c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# else 40c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define _CACHE v4 41c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# endif 42c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 43c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 44c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ 45c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) 46c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 47c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 48c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 49c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_ARM926T) 50c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# ifdef _CACHE 51c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 52c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# else 53c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define _CACHE arm926 54c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# endif 55c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 56c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 57c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) 58c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# ifdef _CACHE 59c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 60c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# else 61c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define _CACHE v4wb 62c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# endif 63c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 64c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 65c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_XSCALE) 66c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# ifdef _CACHE 67c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 68c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# else 69c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define _CACHE xscale 70c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# endif 71c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 72c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 73c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_XSC3) 74c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# ifdef _CACHE 75c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 76c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# else 77c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define _CACHE xsc3 78c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# endif 79c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 80c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 81c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_V6) 82c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru//# ifdef _CACHE 83c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru# define MULTI_CACHE 1 84c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru//# else 85c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru//# define _CACHE v6 86c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru//# endif 87c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 88c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 89c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if !defined(_CACHE) && !defined(MULTI_CACHE) 90c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#error Unknown cache maintainence model 91c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 92c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 93c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 94c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * This flag is used to indicate that the page pointed to by a pte 95c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * is dirty and requires cleaning before returning it to the user. 96c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 97c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define PG_dcache_dirty PG_arch_1 98c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 99c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 100c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * MM Cache Management 101c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * =================== 102c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 103c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files 104c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * implement these methods. 105c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 106c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Start addresses are inclusive and end addresses are exclusive; 107c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * start addresses should be rounded down, end addresses up. 108c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 109c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * See Documentation/cachetlb.txt for more information. 110c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Please note that the implementation of these, and the required 111c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * effects are cache-type (VIVT/VIPT/PIPT) specific. 112c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 113c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * flush_cache_kern_all() 114c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 115c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Unconditionally clean and invalidate the entire cache. 116c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 117c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * flush_cache_user_mm(mm) 118c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 119c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Clean and invalidate all user space cache entries 120c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * before a change of page tables. 121c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 122c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * flush_cache_user_range(start, end, flags) 123c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 124c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Clean and invalidate a range of cache entries in the 125c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * specified address space before a change of page tables. 126c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - start - user start address (inclusive, page aligned) 127c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - end - user end address (exclusive, page aligned) 128c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - flags - vma->vm_flags field 129c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 130c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * coherent_kern_range(start, end) 131c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 132c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Ensure coherency between the Icache and the Dcache in the 133c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * region described by start, end. If you have non-snooping 134c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Harvard caches, you need to implement this function. 135c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - start - virtual start address 136c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - end - virtual end address 137c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 138c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * DMA Cache Coherency 139c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * =================== 140c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 141c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * dma_inv_range(start, end) 142c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 143c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Invalidate (discard) the specified virtual address range. 144c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * May not write back any entries. If 'start' or 'end' 145c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * are not cache line aligned, those lines must be written 146c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * back. 147c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - start - virtual start address 148c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - end - virtual end address 149c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 150c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * dma_clean_range(start, end) 151c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 152c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Clean (write back) the specified virtual address range. 153c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - start - virtual start address 154c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - end - virtual end address 155c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 156c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * dma_flush_range(start, end) 157c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 158c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Clean and invalidate the specified virtual address range. 159c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - start - virtual start address 160c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * - end - virtual end address 161c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 162c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 163c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct cpu_cache_fns { 164c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*flush_kern_all)(void); 165c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*flush_user_all)(void); 166c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*flush_user_range)(unsigned long, unsigned long, unsigned int); 167c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 168c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*coherent_kern_range)(unsigned long, unsigned long); 169c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*coherent_user_range)(unsigned long, unsigned long); 170c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*flush_kern_dcache_page)(void *); 171c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 172c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*dma_inv_range)(unsigned long, unsigned long); 173c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*dma_clean_range)(unsigned long, unsigned long); 174c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*dma_flush_range)(unsigned long, unsigned long); 175c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 176c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 177c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 178c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Select the calling method 179c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 180c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#ifdef MULTI_CACHE 181c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 182c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern struct cpu_cache_fns cpu_cache; 183c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 184c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_kern_all cpu_cache.flush_kern_all 185c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_user_all cpu_cache.flush_user_all 186c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_user_range cpu_cache.flush_user_range 187c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range 188c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_coherent_user_range cpu_cache.coherent_user_range 189c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_dcache_page cpu_cache.flush_kern_dcache_page 190c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 191c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 192c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * These are private to the dma-mapping API. Do not use directly. 193c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Their sole purpose is to ensure that data held in the cache 194c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * is visible to DMA, or data written by DMA to system memory is 195c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * visible to the CPU. 196c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 197c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define dmac_inv_range cpu_cache.dma_inv_range 198c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define dmac_clean_range cpu_cache.dma_clean_range 199c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define dmac_flush_range cpu_cache.dma_flush_range 200c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 201c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#else 202c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 203c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) 204c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) 205c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) 206c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) 207c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) 208c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cpuc_flush_dcache_page __glue(_CACHE,_flush_kern_dcache_page) 209c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 210c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void __cpuc_flush_kern_all(void); 211c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void __cpuc_flush_user_all(void); 212c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); 213c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void __cpuc_coherent_kern_range(unsigned long, unsigned long); 214c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void __cpuc_coherent_user_range(unsigned long, unsigned long); 215c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void __cpuc_flush_dcache_page(void *); 216c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 217c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 218c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * These are private to the dma-mapping API. Do not use directly. 219c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Their sole purpose is to ensure that data held in the cache 220c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * is visible to DMA, or data written by DMA to system memory is 221c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * visible to the CPU. 222c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 223c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define dmac_inv_range __glue(_CACHE,_dma_inv_range) 224c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define dmac_clean_range __glue(_CACHE,_dma_clean_range) 225c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define dmac_flush_range __glue(_CACHE,_dma_flush_range) 226c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 227c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void dmac_inv_range(unsigned long, unsigned long); 228c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void dmac_clean_range(unsigned long, unsigned long); 229c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void dmac_flush_range(unsigned long, unsigned long); 230c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 231c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 232c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 233c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 234c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * flush_cache_vmap() is used when creating mappings (eg, via vmap, 235c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * vmalloc, ioremap etc) in kernel space for pages. Since the 236c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * direct-mappings of these pages may contain cached data, we need 237c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * to do a full cache flush to ensure that writebacks don't corrupt 238c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * data placed into these pages via the new mappings. 239c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 240c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_cache_vmap(start, end) flush_cache_all() 241c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_cache_vunmap(start, end) flush_cache_all() 242c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 243c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 244c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Copy user data from/to a page which is mapped into a different 245c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * processes address space. Really, we want to allow our "user 246c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * space" model to handle this. 247c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 248c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 249c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru do { \ 250c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru memcpy(dst, src, len); \ 251c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru flush_ptrace_access(vma, page, vaddr, dst, len, 1);\ 252c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru } while (0) 253c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 254c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 255c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru do { \ 256c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru memcpy(dst, src, len); \ 257c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru } while (0) 258c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 259c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 260c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Convert calls to our calling convention. 261c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 262c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_cache_all() __cpuc_flush_kern_all() 263c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#ifndef CONFIG_CPU_CACHE_VIPT 264c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustatic inline void flush_cache_mm(struct mm_struct *mm) 265c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru{ 266c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) 267c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cpuc_flush_user_all(); 268c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} 269c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 270c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustatic inline void 271c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruflush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) 272c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru{ 273c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) 274c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), 275c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru vma->vm_flags); 276c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} 277c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 278c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustatic inline void 279c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruflush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) 280c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru{ 281c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { 282c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long addr = user_addr & PAGE_MASK; 283c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); 284c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru } 285c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} 286c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 287c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustatic inline void 288c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruflush_ptrace_access(struct vm_area_struct *vma, struct page *page, 289c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long uaddr, void *kaddr, 290c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long len, int write) 291c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru{ 292c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { 293c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long addr = (unsigned long)kaddr; 294c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cpuc_coherent_kern_range(addr, addr + len); 295c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru } 296c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} 297c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#else 298c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void flush_cache_mm(struct mm_struct *mm); 299c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); 300c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); 301c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 302c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long uaddr, void *kaddr, 303c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long len, int write); 304c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 305c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 306c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 307c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * flush_cache_user_range is used when we want to ensure that the 308c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Harvard caches are synchronised for the user space address range. 309c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * This is used for the ARM private sys_cacheflush system call. 310c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 311c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_cache_user_range(vma,start,end) \ 312c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) 313c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 314c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 315c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Perform necessary cache operations to ensure that data previously 316c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * stored within this range of addresses can be executed by the CPU. 317c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 318c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_icache_range(s,e) __cpuc_coherent_kern_range(s,e) 319c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 320c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 321c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Perform necessary cache operations to ensure that the TLB will 322c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * see data written in the specified area. 323c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 324c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define clean_dcache_area(start,size) cpu_dcache_clean_area(start, size) 325c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 326c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 327c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * flush_dcache_page is used when the kernel has written to the page 328c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * cache page at virtual address page->virtual. 329c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 330c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * If this page isn't mapped (ie, page_mapping == NULL), or it might 331c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * have userspace mappings, then we _must_ always clean + invalidate 332c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * the dcache entries associated with the kernel mapping. 333c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 334c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Otherwise we can defer the operation, and clean the cache when we are 335c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * about to change to user space. This is the same method as used on SPARC64. 336c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * See update_mmu_cache for the user space part. 337c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 338c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void flush_dcache_page(struct page *); 339c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 340c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_dcache_mmap_lock(mapping) \ 341c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru write_lock_irq(&(mapping)->tree_lock) 342c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_dcache_mmap_unlock(mapping) \ 343c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru write_unlock_irq(&(mapping)->tree_lock) 344c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 345c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_icache_user_range(vma,page,addr,len) \ 346c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru flush_dcache_page(page) 347c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 348c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 349c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * We don't appear to need to do anything here. In fact, if we did, we'd 350c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * duplicate cache flushing elsewhere performed by flush_dcache_page(). 351c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 352c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define flush_icache_page(vma,page) do { } while (0) 353c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 354c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cacheid_present(val) (val != read_cpuid(CPUID_ID)) 355c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cacheid_vivt(val) ((val & (15 << 25)) != (14 << 25)) 356c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cacheid_vipt(val) ((val & (15 << 25)) == (14 << 25)) 357c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cacheid_vipt_nonaliasing(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25)) 358c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __cacheid_vipt_aliasing(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23)) 359c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 360c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) 361c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 362c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vivt() 1 363c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt() 0 364c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt_nonaliasing() 0 365c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt_aliasing() 0 366c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 367c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#elif defined(CONFIG_CPU_CACHE_VIPT) 368c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 369c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vivt() 0 370c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt() 1 371c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt_nonaliasing() \ 372c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru ({ \ 373c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 374c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_vipt_nonaliasing(__val); \ 375c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru }) 376c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 377c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt_aliasing() \ 378c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru ({ \ 379c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 380c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_vipt_aliasing(__val); \ 381c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru }) 382c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 383c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#else 384c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 385c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vivt() \ 386c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru ({ \ 387c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 388c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru (!__cacheid_present(__val)) || __cacheid_vivt(__val); \ 389c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru }) 390c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 391c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt() \ 392c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru ({ \ 393c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 394c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_present(__val) && __cacheid_vipt(__val); \ 395c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru }) 396c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 397c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt_nonaliasing() \ 398c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru ({ \ 399c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 400c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_present(__val) && \ 401c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_vipt_nonaliasing(__val); \ 402c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru }) 403c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 404c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define cache_is_vipt_aliasing() \ 405c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru ({ \ 406c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 407c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_present(__val) && \ 408c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru __cacheid_vipt_aliasing(__val); \ 409c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru }) 410c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 411c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 412c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 413c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif 414