1c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#ifndef __HDLC_IOCTL_H__ 2c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __HDLC_IOCTL_H__ 3c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 4c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 5c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int clock_rate; /* bits per second */ 6c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int clock_type; /* internal, external, TX-internal etc. */ 7c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned short loopback; 8c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} sync_serial_settings; /* V.35, V.24, X.21 */ 9c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 10c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 11c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int clock_rate; /* bits per second */ 12c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int clock_type; /* internal, external, TX-internal etc. */ 13c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned short loopback; 14c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int slot_map; 15c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} te1_settings; /* T1, E1 */ 16c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 17c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 18c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned short encoding; 19c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned short parity; 20c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} raw_hdlc_proto; 21c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 22c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 23c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int t391; 24c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int t392; 25c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int n391; 26c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int n392; 27c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int n393; 28c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned short lmi; 29c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned short dce; /* 1 for DCE (network side) operation */ 30c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} fr_proto; 31c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 32c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 33c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int dlci; 34c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} fr_proto_pvc; /* for creating/deleting FR PVCs */ 35c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 36c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 37c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int dlci; 38c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru char master[IFNAMSIZ]; /* Name of master FRAD device */ 39c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}fr_proto_pvc_info; /* for returning PVC information only */ 40c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 41c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef struct { 42c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int interval; 43c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int timeout; 44c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} cisco_proto; 45c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 46c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* PPP doesn't need any info now - supply length = 0 to ioctl */ 47c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 48c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif /* __HDLC_IOCTL_H__ */ 49