1/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
21#ifdef __KERNEL__
22#include <linux/cdev.h>
23#endif
24#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
30#include <linux/ion.h>
31
32#define BIT(nr)   (1UL << (nr))
33
34#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37	_IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40	_IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43	_IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46	_IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE  \
49	_IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52	_IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55	_IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58	_IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61	_IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64	_IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67	_IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70	_IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73	_IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76	_IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79	_IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82	_IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85	_IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88	_IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91	_IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94	_IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97	_IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100	_IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103	_IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106	_IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109	_IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112	_IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115	_IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118	_IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121	_IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124	_IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127	_IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130	_IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133	_IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136	_IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139	_IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142	_IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145	_IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148	_IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151	_IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
154	_IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
155
156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
157	_IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
158
159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
160	_IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
161
162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
163	_IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
166	_IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
169	_IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
170
171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
172	_IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
173
174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
175	_IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
178	_IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
179
180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
181	_IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
182
183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
184	_IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
187	_IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
188
189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
190	_IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
191
192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193	_IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196	_IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
198#define MSM_CAM_IOCTL_STATS_REQBUF \
199	_IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202	_IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205	_IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
207#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
208	_IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
209
210#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
211	_IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
212
213#define MSM_CAM_IOCTL_GET_INST_HANDLE \
214	_IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
215
216#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
217	_IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
218
219
220struct msm_stats_reqbuf {
221	int num_buf;		/* how many buffers requested */
222	int stats_type;	/* stats type */
223};
224
225struct msm_stats_flush_bufq {
226	int stats_type;	/* enum msm_stats_enum_type */
227};
228
229struct msm_mctl_pp_cmd {
230	int32_t  id;
231	uint16_t length;
232	void     *value;
233};
234
235struct msm_mctl_post_proc_cmd {
236	int32_t type;
237	struct msm_mctl_pp_cmd cmd;
238};
239
240#define MSM_CAMERA_LED_OFF  0
241#define MSM_CAMERA_LED_LOW  1
242#define MSM_CAMERA_LED_HIGH 2
243#define MSM_CAMERA_LED_INIT 3
244#define MSM_CAMERA_LED_RELEASE 4
245
246#define MSM_CAMERA_STROBE_FLASH_NONE 0
247#define MSM_CAMERA_STROBE_FLASH_XENON 1
248
249#define MSM_MAX_CAMERA_SENSORS  5
250#define MAX_SENSOR_NAME 32
251#define MAX_CAM_NAME_SIZE 32
252#define MAX_ACT_MOD_NAME_SIZE 32
253#define MAX_ACT_NAME_SIZE 32
254#define NUM_ACTUATOR_DIR 2
255#define MAX_ACTUATOR_SCENARIO 8
256#define MAX_ACTUATOR_REGION 5
257#define MAX_ACTUATOR_INIT_SET 12
258#define MAX_ACTUATOR_TYPE_SIZE 32
259#define MAX_ACTUATOR_REG_TBL_SIZE 8
260
261
262#define MSM_MAX_CAMERA_CONFIGS 2
263
264#define PP_SNAP  0x01
265#define PP_RAW_SNAP ((0x01)<<1)
266#define PP_PREV  ((0x01)<<2)
267#define PP_THUMB ((0x01)<<3)
268#define PP_MASK		(PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
269
270#define MSM_CAM_CTRL_CMD_DONE  0
271#define MSM_CAM_SENSOR_VFE_CMD 1
272
273/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
274#define MAX_PLANES 8
275
276/*****************************************************
277 *  structure
278 *****************************************************/
279
280/* define five type of structures for userspace <==> kernel
281 * space communication:
282 * command 1 - 2 are from userspace ==> kernel
283 * command 3 - 4 are from kernel ==> userspace
284 *
285 * 1. control command: control command(from control thread),
286 *                     control status (from config thread);
287 */
288struct msm_ctrl_cmd {
289	uint16_t type;
290	uint16_t length;
291	void *value;
292	uint16_t status;
293	uint32_t timeout_ms;
294	int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
295	int vnode_id;  /* video dev id. Can we overload resp_fd? */
296	int queue_idx;
297	uint32_t evt_id;
298	uint32_t stream_type; /* used to pass value to qcamera server */
299	int config_ident; /*used as identifier for config node*/
300};
301
302struct msm_cam_evt_msg {
303	unsigned short type;	/* 1 == event (RPC), 0 == message (adsp) */
304	unsigned short msg_id;
305	unsigned int len;	/* size in, number of bytes out */
306	uint32_t frame_id;
307	void *data;
308	struct timespec timestamp;
309};
310
311struct msm_pp_frame_sp {
312	/* phy addr of the buffer */
313	unsigned long  phy_addr;
314	uint32_t       y_off;
315	uint32_t       cbcr_off;
316	/* buffer length */
317	uint32_t       length;
318	int32_t        fd;
319	uint32_t       addr_offset;
320	/* mapped addr */
321	unsigned long  vaddr;
322};
323
324struct msm_pp_frame_mp {
325	/* phy addr of the plane */
326	unsigned long  phy_addr;
327	/* offset of plane data */
328	uint32_t       data_offset;
329	/* plane length */
330	uint32_t       length;
331	int32_t        fd;
332	uint32_t       addr_offset;
333	/* mapped addr */
334	unsigned long  vaddr;
335};
336
337struct msm_pp_frame {
338	uint32_t       handle; /* stores vb cookie */
339	uint32_t       frame_id;
340	unsigned short buf_idx;
341	int            path;
342	unsigned short image_type;
343	unsigned short num_planes; /* 1 for sp */
344	struct timeval timestamp;
345	union {
346		struct msm_pp_frame_sp sp;
347		struct msm_pp_frame_mp mp[MAX_PLANES];
348	};
349	int node_type;
350	uint32_t inst_handle;
351};
352
353struct msm_cam_evt_divert_frame {
354	unsigned short image_mode;
355	unsigned short op_mode;
356	unsigned short inst_idx;
357	unsigned short node_idx;
358	struct msm_pp_frame frame;
359	int            do_pp;
360};
361
362struct msm_mctl_pp_cmd_ack_event {
363	uint32_t cmd;        /* VPE_CMD_ZOOM? */
364	int      status;     /* 0 done, < 0 err */
365	uint32_t cookie;     /* daemon's cookie */
366};
367
368struct msm_mctl_pp_event_info {
369	int32_t  event;
370	union {
371		struct msm_mctl_pp_cmd_ack_event ack;
372	};
373};
374
375struct msm_isp_event_ctrl {
376	unsigned short resptype;
377	union {
378		struct msm_cam_evt_msg isp_msg;
379		struct msm_ctrl_cmd ctrl;
380		struct msm_cam_evt_divert_frame div_frame;
381		struct msm_mctl_pp_event_info pp_event_info;
382	} isp_data;
383};
384
385#define MSM_CAM_RESP_CTRL              0
386#define MSM_CAM_RESP_STAT_EVT_MSG      1
387#define MSM_CAM_RESP_STEREO_OP_1       2
388#define MSM_CAM_RESP_STEREO_OP_2       3
389#define MSM_CAM_RESP_V4L2              4
390#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
391#define MSM_CAM_RESP_DONE_EVENT        6
392#define MSM_CAM_RESP_MCTL_PP_EVENT     7
393#define MSM_CAM_RESP_MAX               8
394
395#define MSM_CAM_APP_NOTIFY_EVENT  0
396#define MSM_CAM_APP_NOTIFY_ERROR_EVENT  1
397
398/* this one is used to send ctrl/status up to config thread */
399
400struct msm_stats_event_ctrl {
401	/* 0 - ctrl_cmd from control thread,
402	 * 1 - stats/event kernel,
403	 * 2 - V4L control or read request */
404	int resptype;
405	int timeout_ms;
406	struct msm_ctrl_cmd ctrl_cmd;
407	/* struct  vfe_event_t  stats_event; */
408	struct msm_cam_evt_msg stats_event;
409};
410
411/* 2. config command: config command(from config thread); */
412struct msm_camera_cfg_cmd {
413	/* what to config:
414	 * 1 - sensor config, 2 - vfe config */
415	uint16_t cfg_type;
416
417	/* sensor config type */
418	uint16_t cmd_type;
419	uint16_t queue;
420	uint16_t length;
421	void *value;
422};
423
424#define CMD_GENERAL			0
425#define CMD_AXI_CFG_OUT1		1
426#define CMD_AXI_CFG_SNAP_O1_AND_O2	2
427#define CMD_AXI_CFG_OUT2		3
428#define CMD_PICT_T_AXI_CFG		4
429#define CMD_PICT_M_AXI_CFG		5
430#define CMD_RAW_PICT_AXI_CFG		6
431
432#define CMD_FRAME_BUF_RELEASE		7
433#define CMD_PREV_BUF_CFG		8
434#define CMD_SNAP_BUF_RELEASE		9
435#define CMD_SNAP_BUF_CFG		10
436#define CMD_STATS_DISABLE		11
437#define CMD_STATS_AEC_AWB_ENABLE	12
438#define CMD_STATS_AF_ENABLE		13
439#define CMD_STATS_AEC_ENABLE		14
440#define CMD_STATS_AWB_ENABLE		15
441#define CMD_STATS_ENABLE  		16
442
443#define CMD_STATS_AXI_CFG		17
444#define CMD_STATS_AEC_AXI_CFG		18
445#define CMD_STATS_AF_AXI_CFG 		19
446#define CMD_STATS_AWB_AXI_CFG		20
447#define CMD_STATS_RS_AXI_CFG		21
448#define CMD_STATS_CS_AXI_CFG		22
449#define CMD_STATS_IHIST_AXI_CFG		23
450#define CMD_STATS_SKIN_AXI_CFG		24
451
452#define CMD_STATS_BUF_RELEASE		25
453#define CMD_STATS_AEC_BUF_RELEASE	26
454#define CMD_STATS_AF_BUF_RELEASE	27
455#define CMD_STATS_AWB_BUF_RELEASE	28
456#define CMD_STATS_RS_BUF_RELEASE	29
457#define CMD_STATS_CS_BUF_RELEASE	30
458#define CMD_STATS_IHIST_BUF_RELEASE	31
459#define CMD_STATS_SKIN_BUF_RELEASE	32
460
461#define UPDATE_STATS_INVALID		33
462#define CMD_AXI_CFG_SNAP_GEMINI		34
463#define CMD_AXI_CFG_SNAP		35
464#define CMD_AXI_CFG_PREVIEW		36
465#define CMD_AXI_CFG_VIDEO		37
466
467#define CMD_STATS_IHIST_ENABLE 38
468#define CMD_STATS_RS_ENABLE 39
469#define CMD_STATS_CS_ENABLE 40
470#define CMD_VPE 41
471#define CMD_AXI_CFG_VPE 42
472#define CMD_AXI_CFG_ZSL 43
473#define CMD_AXI_CFG_SNAP_VPE 44
474#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
475
476#define CMD_CONFIG_PING_ADDR 46
477#define CMD_CONFIG_PONG_ADDR 47
478#define CMD_CONFIG_FREE_BUF_ADDR 48
479#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
480#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
481#define CMD_VFE_BUFFER_RELEASE 51
482#define CMD_VFE_PROCESS_IRQ 52
483#define CMD_STATS_BG_ENABLE 53
484#define CMD_STATS_BF_ENABLE 54
485#define CMD_STATS_BHIST_ENABLE 55
486#define CMD_STATS_BG_BUF_RELEASE 56
487#define CMD_STATS_BF_BUF_RELEASE 57
488#define CMD_STATS_BHIST_BUF_RELEASE 58
489#define CMD_VFE_SOF_COUNT_UPDATE 59
490#define CMD_VFE_COUNT_SOF_ENABLE 60
491
492#define CMD_AXI_CFG_PRIM               BIT(8)
493#define CMD_AXI_CFG_PRIM_ALL_CHNLS     BIT(9)
494#define CMD_AXI_CFG_SEC                BIT(10)
495#define CMD_AXI_CFG_SEC_ALL_CHNLS      BIT(11)
496#define CMD_AXI_CFG_TERT1              BIT(12)
497#define CMD_AXI_CFG_TERT2              BIT(13)
498
499#define CMD_AXI_START  0xE1
500#define CMD_AXI_STOP   0xE2
501#define CMD_AXI_RESET  0xE3
502
503
504#define AXI_CMD_PREVIEW      BIT(0)
505#define AXI_CMD_CAPTURE      BIT(1)
506#define AXI_CMD_RECORD       BIT(2)
507#define AXI_CMD_ZSL          BIT(3)
508#define AXI_CMD_RAW_CAPTURE  BIT(4)
509#define AXI_CMD_LIVESHOT     BIT(5)
510
511/* vfe config command: config command(from config thread)*/
512struct msm_vfe_cfg_cmd {
513	int cmd_type;
514	uint16_t length;
515	void *value;
516};
517
518struct msm_vpe_cfg_cmd {
519	int cmd_type;
520	uint16_t length;
521	void *value;
522};
523
524#define MAX_CAMERA_ENABLE_NAME_LEN 32
525struct camera_enable_cmd {
526	char name[MAX_CAMERA_ENABLE_NAME_LEN];
527};
528
529#define MSM_PMEM_OUTPUT1		0
530#define MSM_PMEM_OUTPUT2		1
531#define MSM_PMEM_OUTPUT1_OUTPUT2	2
532#define MSM_PMEM_THUMBNAIL		3
533#define MSM_PMEM_MAINIMG		4
534#define MSM_PMEM_RAW_MAINIMG		5
535#define MSM_PMEM_AEC_AWB		6
536#define MSM_PMEM_AF			7
537#define MSM_PMEM_AEC			8
538#define MSM_PMEM_AWB			9
539#define MSM_PMEM_RS			10
540#define MSM_PMEM_CS			11
541#define MSM_PMEM_IHIST			12
542#define MSM_PMEM_SKIN			13
543#define MSM_PMEM_VIDEO			14
544#define MSM_PMEM_PREVIEW		15
545#define MSM_PMEM_VIDEO_VPE		16
546#define MSM_PMEM_C2D			17
547#define MSM_PMEM_MAINIMG_VPE    18
548#define MSM_PMEM_THUMBNAIL_VPE  19
549#define MSM_PMEM_BAYER_GRID		20
550#define MSM_PMEM_BAYER_FOCUS	21
551#define MSM_PMEM_BAYER_HIST		22
552#define MSM_PMEM_MAX            23
553
554#define STAT_AEAW			0
555#define STAT_AEC			1
556#define STAT_AF				2
557#define STAT_AWB			3
558#define STAT_RS				4
559#define STAT_CS				5
560#define STAT_IHIST			6
561#define STAT_SKIN			7
562#define STAT_BG				8
563#define STAT_BF				9
564#define STAT_BHIST			10
565#define STAT_MAX			11
566
567#define FRAME_PREVIEW_OUTPUT1		0
568#define FRAME_PREVIEW_OUTPUT2		1
569#define FRAME_SNAPSHOT			2
570#define FRAME_THUMBNAIL			3
571#define FRAME_RAW_SNAPSHOT		4
572#define FRAME_MAX			5
573
574enum msm_stats_enum_type {
575	MSM_STATS_TYPE_AEC, /* legacy based AEC */
576	MSM_STATS_TYPE_AF,  /* legacy based AF */
577	MSM_STATS_TYPE_AWB, /* legacy based AWB */
578	MSM_STATS_TYPE_RS,  /* legacy based RS */
579	MSM_STATS_TYPE_CS,  /* legacy based CS */
580	MSM_STATS_TYPE_IHIST,   /* legacy based HIST */
581	MSM_STATS_TYPE_SKIN,    /* legacy based SKIN */
582	MSM_STATS_TYPE_BG,  /* Bayer Grids */
583	MSM_STATS_TYPE_BF,  /* Bayer Focus */
584	MSM_STATS_TYPE_BHIST,   /* Bayer Hist */
585	MSM_STATS_TYPE_AE_AW,   /* legacy stats for vfe 2.x*/
586	MSM_STATS_TYPE_MAX  /* MAX */
587};
588
589struct msm_stats_buf_info {
590	int type; /* msm_stats_enum_type */
591	int fd;
592	void *vaddr;
593	uint32_t offset;
594	uint32_t len;
595	uint32_t y_off;
596	uint32_t cbcr_off;
597	uint32_t planar0_off;
598	uint32_t planar1_off;
599	uint32_t planar2_off;
600	uint8_t active;
601	int buf_idx;
602};
603
604struct msm_pmem_info {
605	int type;
606	int fd;
607	void *vaddr;
608	uint32_t offset;
609	uint32_t len;
610	uint32_t y_off;
611	uint32_t cbcr_off;
612	uint32_t planar0_off;
613	uint32_t planar1_off;
614	uint32_t planar2_off;
615	uint8_t active;
616};
617
618struct outputCfg {
619	uint32_t height;
620	uint32_t width;
621
622	uint32_t window_height_firstline;
623	uint32_t window_height_lastline;
624};
625
626#define VIDEO_NODE 0
627#define MCTL_NODE 1
628
629#define OUTPUT_1	0
630#define OUTPUT_2	1
631#define OUTPUT_1_AND_2            2   /* snapshot only */
632#define OUTPUT_1_AND_3            3   /* video */
633#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
634#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
635#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
636#define OUTPUT_1_2_AND_3 7
637#define OUTPUT_ALL_CHNLS 8
638#define OUTPUT_VIDEO_ALL_CHNLS 9
639#define OUTPUT_ZSL_ALL_CHNLS 10
640#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
641
642#define OUTPUT_PRIM              BIT(8)
643#define OUTPUT_PRIM_ALL_CHNLS    BIT(9)
644#define OUTPUT_SEC               BIT(10)
645#define OUTPUT_SEC_ALL_CHNLS     BIT(11)
646#define OUTPUT_TERT1             BIT(12)
647#define OUTPUT_TERT2             BIT(13)
648
649
650
651#define MSM_FRAME_PREV_1	0
652#define MSM_FRAME_PREV_2	1
653#define MSM_FRAME_ENC		2
654
655#define OUTPUT_TYPE_P    BIT(0)
656#define OUTPUT_TYPE_T    BIT(1)
657#define OUTPUT_TYPE_S    BIT(2)
658#define OUTPUT_TYPE_V    BIT(3)
659#define OUTPUT_TYPE_L    BIT(4)
660#define OUTPUT_TYPE_ST_L BIT(5)
661#define OUTPUT_TYPE_ST_R BIT(6)
662#define OUTPUT_TYPE_ST_D BIT(7)
663#define OUTPUT_TYPE_R    BIT(8)
664#define OUTPUT_TYPE_R1   BIT(9)
665
666
667
668struct fd_roi_info {
669	void *info;
670	int info_len;
671};
672
673struct msm_mem_map_info {
674	uint32_t cookie;
675	uint32_t length;
676	uint32_t mem_type;
677};
678
679#define MSM_MEM_MMAP		0
680#define MSM_MEM_USERPTR		1
681#define MSM_PLANE_MAX		8
682#define MSM_PLANE_Y			0
683#define MSM_PLANE_UV		1
684
685struct msm_frame {
686	struct timespec ts;
687	int path;
688	int type;
689	unsigned long buffer;
690	uint32_t phy_offset;
691	uint32_t y_off;
692	uint32_t cbcr_off;
693	uint32_t planar0_off;
694	uint32_t planar1_off;
695	uint32_t planar2_off;
696	int fd;
697
698	void *cropinfo;
699	int croplen;
700	uint32_t error_code;
701	struct fd_roi_info roi_info;
702	uint32_t frame_id;
703	int stcam_quality_ind;
704	uint32_t stcam_conv_value;
705
706	struct ion_allocation_data ion_alloc;
707	struct ion_fd_data fd_data;
708	int ion_dev_fd;
709};
710
711enum msm_st_frame_packing {
712	SIDE_BY_SIDE_HALF,
713	SIDE_BY_SIDE_FULL,
714	TOP_DOWN_HALF,
715	TOP_DOWN_FULL,
716};
717
718struct msm_st_crop {
719	uint32_t in_w;
720	uint32_t in_h;
721	uint32_t out_w;
722	uint32_t out_h;
723};
724
725struct msm_st_half {
726	uint32_t buf_p0_off;
727	uint32_t buf_p1_off;
728	uint32_t buf_p0_stride;
729	uint32_t buf_p1_stride;
730	uint32_t pix_x_off;
731	uint32_t pix_y_off;
732	struct msm_st_crop stCropInfo;
733};
734
735struct msm_st_frame {
736	struct msm_frame buf_info;
737	int type;
738	enum msm_st_frame_packing packing;
739	struct msm_st_half L;
740	struct msm_st_half R;
741	int frame_id;
742};
743
744#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
745
746struct stats_buff {
747	unsigned long buff;
748	int fd;
749};
750
751struct msm_stats_buf {
752	uint8_t awb_ymin;
753	struct stats_buff aec;
754	struct stats_buff awb;
755	struct stats_buff af;
756	struct stats_buff ihist;
757	struct stats_buff rs;
758	struct stats_buff cs;
759	struct stats_buff skin;
760	int type;
761	uint32_t status_bits;
762	unsigned long buffer;
763	int fd;
764	int length;
765	struct ion_handle *handle;
766	uint32_t frame_id;
767	int buf_idx;
768};
769#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
770/* video capture mode in VIDIOC_S_PARM */
771#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
772	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
773/* extendedmode for video recording in VIDIOC_S_PARM */
774#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
775	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
776/* extendedmode for the full size main image in VIDIOC_S_PARM */
777#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
778/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
779#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
780	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
781#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
782	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
783#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
784	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
785#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
786	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
787#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
788	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
789#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
790	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
791#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
792	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
793#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
794	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
795#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
796	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
797#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
798	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
799#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
800	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
801#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
802
803#define MSM_V4L2_PID_MOTION_ISO              V4L2_CID_PRIVATE_BASE
804#define MSM_V4L2_PID_EFFECT                 (V4L2_CID_PRIVATE_BASE+1)
805#define MSM_V4L2_PID_HJR                    (V4L2_CID_PRIVATE_BASE+2)
806#define MSM_V4L2_PID_LED_MODE               (V4L2_CID_PRIVATE_BASE+3)
807#define MSM_V4L2_PID_PREP_SNAPSHOT          (V4L2_CID_PRIVATE_BASE+4)
808#define MSM_V4L2_PID_EXP_METERING           (V4L2_CID_PRIVATE_BASE+5)
809#define MSM_V4L2_PID_ISO                    (V4L2_CID_PRIVATE_BASE+6)
810#define MSM_V4L2_PID_CAM_MODE               (V4L2_CID_PRIVATE_BASE+7)
811#define MSM_V4L2_PID_LUMA_ADAPTATION	    (V4L2_CID_PRIVATE_BASE+8)
812#define MSM_V4L2_PID_BEST_SHOT              (V4L2_CID_PRIVATE_BASE+9)
813#define MSM_V4L2_PID_FOCUS_MODE	            (V4L2_CID_PRIVATE_BASE+10)
814#define MSM_V4L2_PID_BL_DETECTION           (V4L2_CID_PRIVATE_BASE+11)
815#define MSM_V4L2_PID_SNOW_DETECTION         (V4L2_CID_PRIVATE_BASE+12)
816#define MSM_V4L2_PID_CTRL_CMD               (V4L2_CID_PRIVATE_BASE+13)
817#define MSM_V4L2_PID_EVT_SUB_INFO           (V4L2_CID_PRIVATE_BASE+14)
818#define MSM_V4L2_PID_STROBE_FLASH           (V4L2_CID_PRIVATE_BASE+15)
819#define MSM_V4L2_PID_INST_HANDLE            (V4L2_CID_PRIVATE_BASE+16)
820#define MSM_V4L2_PID_MMAP_INST              (V4L2_CID_PRIVATE_BASE+17)
821#define MSM_V4L2_PID_PP_PLANE_INFO          (V4L2_CID_PRIVATE_BASE+18)
822#define MSM_V4L2_PID_MAX                    MSM_V4L2_PID_PP_PLANE_INFO
823
824/* camera operation mode for video recording - two frame output queues */
825#define MSM_V4L2_CAM_OP_DEFAULT         0
826/* camera operation mode for video recording - two frame output queues */
827#define MSM_V4L2_CAM_OP_PREVIEW         (MSM_V4L2_CAM_OP_DEFAULT+1)
828/* camera operation mode for video recording - two frame output queues */
829#define MSM_V4L2_CAM_OP_VIDEO           (MSM_V4L2_CAM_OP_DEFAULT+2)
830/* camera operation mode for standard shapshot - two frame output queues */
831#define MSM_V4L2_CAM_OP_CAPTURE         (MSM_V4L2_CAM_OP_DEFAULT+3)
832/* camera operation mode for zsl shapshot - three output queues */
833#define MSM_V4L2_CAM_OP_ZSL             (MSM_V4L2_CAM_OP_DEFAULT+4)
834/* camera operation mode for raw snapshot - one frame output queue */
835#define MSM_V4L2_CAM_OP_RAW             (MSM_V4L2_CAM_OP_DEFAULT+5)
836/* camera operation mode for jpeg snapshot - one frame output queue */
837#define MSM_V4L2_CAM_OP_JPEG_CAPTURE    (MSM_V4L2_CAM_OP_DEFAULT+6)
838
839
840#define MSM_V4L2_VID_CAP_TYPE	0
841#define MSM_V4L2_STREAM_ON		1
842#define MSM_V4L2_STREAM_OFF		2
843#define MSM_V4L2_SNAPSHOT		3
844#define MSM_V4L2_QUERY_CTRL		4
845#define MSM_V4L2_GET_CTRL		5
846#define MSM_V4L2_SET_CTRL		6
847#define MSM_V4L2_QUERY			7
848#define MSM_V4L2_GET_CROP		8
849#define MSM_V4L2_SET_CROP		9
850#define MSM_V4L2_OPEN			10
851#define MSM_V4L2_CLOSE			11
852#define MSM_V4L2_SET_CTRL_CMD	12
853#define MSM_V4L2_EVT_SUB_MASK	13
854#define MSM_V4L2_MAX			14
855#define V4L2_CAMERA_EXIT		43
856
857struct crop_info {
858	void *info;
859	int len;
860};
861
862struct msm_postproc {
863	int ftnum;
864	struct msm_frame fthumnail;
865	int fmnum;
866	struct msm_frame fmain;
867};
868
869struct msm_snapshot_pp_status {
870	void *status;
871};
872
873#define CFG_SET_MODE			0
874#define CFG_SET_EFFECT			1
875#define CFG_START			2
876#define CFG_PWR_UP			3
877#define CFG_PWR_DOWN			4
878#define CFG_WRITE_EXPOSURE_GAIN		5
879#define CFG_SET_DEFAULT_FOCUS		6
880#define CFG_MOVE_FOCUS			7
881#define CFG_REGISTER_TO_REAL_GAIN	8
882#define CFG_REAL_TO_REGISTER_GAIN	9
883#define CFG_SET_FPS			10
884#define CFG_SET_PICT_FPS		11
885#define CFG_SET_BRIGHTNESS		12
886#define CFG_SET_CONTRAST		13
887#define CFG_SET_ZOOM			14
888#define CFG_SET_EXPOSURE_MODE		15
889#define CFG_SET_WB			16
890#define CFG_SET_ANTIBANDING		17
891#define CFG_SET_EXP_GAIN		18
892#define CFG_SET_PICT_EXP_GAIN		19
893#define CFG_SET_LENS_SHADING		20
894#define CFG_GET_PICT_FPS		21
895#define CFG_GET_PREV_L_PF		22
896#define CFG_GET_PREV_P_PL		23
897#define CFG_GET_PICT_L_PF		24
898#define CFG_GET_PICT_P_PL		25
899#define CFG_GET_AF_MAX_STEPS		26
900#define CFG_GET_PICT_MAX_EXP_LC		27
901#define CFG_SEND_WB_INFO    28
902#define CFG_SENSOR_INIT    29
903#define CFG_GET_3D_CALI_DATA 30
904#define CFG_GET_CALIB_DATA		31
905#define CFG_GET_OUTPUT_INFO		32
906#define CFG_GET_EEPROM_INFO		33
907#define CFG_GET_EEPROM_DATA		34
908#define CFG_SET_ACTUATOR_INFO		35
909#define CFG_GET_ACTUATOR_INFO           36
910/* TBD: QRD */
911#define CFG_SET_SATURATION            37
912#define CFG_SET_SHARPNESS             38
913#define CFG_SET_TOUCHAEC              39
914#define CFG_SET_AUTO_FOCUS            40
915#define CFG_SET_AUTOFLASH             41
916#define CFG_SET_EXPOSURE_COMPENSATION 42
917#define CFG_SET_ISO                   43
918#define CFG_START_STREAM              44
919#define CFG_STOP_STREAM               45
920#define CFG_GET_CSI_PARAMS            46
921#define CFG_MAX			47
922
923
924#define MOVE_NEAR	0
925#define MOVE_FAR	1
926
927#define SENSOR_PREVIEW_MODE		0
928#define SENSOR_SNAPSHOT_MODE		1
929#define SENSOR_RAW_SNAPSHOT_MODE	2
930#define SENSOR_HFR_60FPS_MODE 3
931#define SENSOR_HFR_90FPS_MODE 4
932#define SENSOR_HFR_120FPS_MODE 5
933
934#define SENSOR_QTR_SIZE			0
935#define SENSOR_FULL_SIZE		1
936#define SENSOR_QVGA_SIZE		2
937#define SENSOR_INVALID_SIZE		3
938
939#define CAMERA_EFFECT_OFF		0
940#define CAMERA_EFFECT_MONO		1
941#define CAMERA_EFFECT_NEGATIVE		2
942#define CAMERA_EFFECT_SOLARIZE		3
943#define CAMERA_EFFECT_SEPIA		4
944#define CAMERA_EFFECT_POSTERIZE		5
945#define CAMERA_EFFECT_WHITEBOARD	6
946#define CAMERA_EFFECT_BLACKBOARD	7
947#define CAMERA_EFFECT_AQUA		8
948#define CAMERA_EFFECT_EMBOSS		9
949#define CAMERA_EFFECT_SKETCH		10
950#define CAMERA_EFFECT_NEON		11
951#define CAMERA_EFFECT_MAX		12
952
953/* QRD */
954#define CAMERA_EFFECT_BW		10
955#define CAMERA_EFFECT_BLUISH	12
956#define CAMERA_EFFECT_REDDISH	13
957#define CAMERA_EFFECT_GREENISH	14
958
959/* QRD */
960#define CAMERA_ANTIBANDING_OFF		0
961#define CAMERA_ANTIBANDING_50HZ		2
962#define CAMERA_ANTIBANDING_60HZ		1
963#define CAMERA_ANTIBANDING_AUTO		3
964
965#define CAMERA_CONTRAST_LV0			0
966#define CAMERA_CONTRAST_LV1			1
967#define CAMERA_CONTRAST_LV2			2
968#define CAMERA_CONTRAST_LV3			3
969#define CAMERA_CONTRAST_LV4			4
970#define CAMERA_CONTRAST_LV5			5
971#define CAMERA_CONTRAST_LV6			6
972#define CAMERA_CONTRAST_LV7			7
973#define CAMERA_CONTRAST_LV8			8
974#define CAMERA_CONTRAST_LV9			9
975
976#define CAMERA_BRIGHTNESS_LV0			0
977#define CAMERA_BRIGHTNESS_LV1			1
978#define CAMERA_BRIGHTNESS_LV2			2
979#define CAMERA_BRIGHTNESS_LV3			3
980#define CAMERA_BRIGHTNESS_LV4			4
981#define CAMERA_BRIGHTNESS_LV5			5
982#define CAMERA_BRIGHTNESS_LV6			6
983#define CAMERA_BRIGHTNESS_LV7			7
984#define CAMERA_BRIGHTNESS_LV8			8
985
986
987#define CAMERA_SATURATION_LV0			0
988#define CAMERA_SATURATION_LV1			1
989#define CAMERA_SATURATION_LV2			2
990#define CAMERA_SATURATION_LV3			3
991#define CAMERA_SATURATION_LV4			4
992#define CAMERA_SATURATION_LV5			5
993#define CAMERA_SATURATION_LV6			6
994#define CAMERA_SATURATION_LV7			7
995#define CAMERA_SATURATION_LV8			8
996
997#define CAMERA_SHARPNESS_LV0		0
998#define CAMERA_SHARPNESS_LV1		3
999#define CAMERA_SHARPNESS_LV2		6
1000#define CAMERA_SHARPNESS_LV3		9
1001#define CAMERA_SHARPNESS_LV4		12
1002#define CAMERA_SHARPNESS_LV5		15
1003#define CAMERA_SHARPNESS_LV6		18
1004#define CAMERA_SHARPNESS_LV7		21
1005#define CAMERA_SHARPNESS_LV8		24
1006#define CAMERA_SHARPNESS_LV9		27
1007#define CAMERA_SHARPNESS_LV10		30
1008
1009#define CAMERA_SETAE_AVERAGE		0
1010#define CAMERA_SETAE_CENWEIGHT	1
1011
1012#define  CAMERA_WB_AUTO               1 /* This list must match aeecamera.h */
1013#define  CAMERA_WB_CUSTOM             2
1014#define  CAMERA_WB_INCANDESCENT       3
1015#define  CAMERA_WB_FLUORESCENT        4
1016#define  CAMERA_WB_DAYLIGHT           5
1017#define  CAMERA_WB_CLOUDY_DAYLIGHT    6
1018#define  CAMERA_WB_TWILIGHT           7
1019#define  CAMERA_WB_SHADE              8
1020
1021#define CAMERA_EXPOSURE_COMPENSATION_LV0			12
1022#define CAMERA_EXPOSURE_COMPENSATION_LV1			6
1023#define CAMERA_EXPOSURE_COMPENSATION_LV2			0
1024#define CAMERA_EXPOSURE_COMPENSATION_LV3			-6
1025#define CAMERA_EXPOSURE_COMPENSATION_LV4			-12
1026
1027enum msm_v4l2_saturation_level {
1028	MSM_V4L2_SATURATION_L0,
1029	MSM_V4L2_SATURATION_L1,
1030	MSM_V4L2_SATURATION_L2,
1031	MSM_V4L2_SATURATION_L3,
1032	MSM_V4L2_SATURATION_L4,
1033	MSM_V4L2_SATURATION_L5,
1034	MSM_V4L2_SATURATION_L6,
1035	MSM_V4L2_SATURATION_L7,
1036	MSM_V4L2_SATURATION_L8,
1037	MSM_V4L2_SATURATION_L9,
1038	MSM_V4L2_SATURATION_L10,
1039};
1040
1041enum msm_v4l2_contrast_level {
1042	MSM_V4L2_CONTRAST_L0,
1043	MSM_V4L2_CONTRAST_L1,
1044	MSM_V4L2_CONTRAST_L2,
1045	MSM_V4L2_CONTRAST_L3,
1046	MSM_V4L2_CONTRAST_L4,
1047	MSM_V4L2_CONTRAST_L5,
1048	MSM_V4L2_CONTRAST_L6,
1049	MSM_V4L2_CONTRAST_L7,
1050	MSM_V4L2_CONTRAST_L8,
1051	MSM_V4L2_CONTRAST_L9,
1052	MSM_V4L2_CONTRAST_L10,
1053};
1054
1055
1056enum msm_v4l2_exposure_level {
1057	MSM_V4L2_EXPOSURE_N2,
1058	MSM_V4L2_EXPOSURE_N1,
1059	MSM_V4L2_EXPOSURE_D,
1060	MSM_V4L2_EXPOSURE_P1,
1061	MSM_V4L2_EXPOSURE_P2,
1062};
1063
1064enum msm_v4l2_sharpness_level {
1065	MSM_V4L2_SHARPNESS_L0,
1066	MSM_V4L2_SHARPNESS_L1,
1067	MSM_V4L2_SHARPNESS_L2,
1068	MSM_V4L2_SHARPNESS_L3,
1069	MSM_V4L2_SHARPNESS_L4,
1070	MSM_V4L2_SHARPNESS_L5,
1071	MSM_V4L2_SHARPNESS_L6,
1072};
1073
1074enum msm_v4l2_expo_metering_mode {
1075	MSM_V4L2_EXP_FRAME_AVERAGE,
1076	MSM_V4L2_EXP_CENTER_WEIGHTED,
1077	MSM_V4L2_EXP_SPOT_METERING,
1078};
1079
1080enum msm_v4l2_iso_mode {
1081	MSM_V4L2_ISO_AUTO = 0,
1082	MSM_V4L2_ISO_DEBLUR,
1083	MSM_V4L2_ISO_100,
1084	MSM_V4L2_ISO_200,
1085	MSM_V4L2_ISO_400,
1086	MSM_V4L2_ISO_800,
1087	MSM_V4L2_ISO_1600,
1088};
1089
1090enum msm_v4l2_wb_mode {
1091	MSM_V4L2_WB_OFF,
1092	MSM_V4L2_WB_AUTO ,
1093	MSM_V4L2_WB_CUSTOM,
1094	MSM_V4L2_WB_INCANDESCENT,
1095	MSM_V4L2_WB_FLUORESCENT,
1096	MSM_V4L2_WB_DAYLIGHT,
1097	MSM_V4L2_WB_CLOUDY_DAYLIGHT,
1098};
1099
1100enum msm_v4l2_special_effect {
1101	MSM_V4L2_EFFECT_OFF,
1102	MSM_V4L2_EFFECT_MONO,
1103	MSM_V4L2_EFFECT_NEGATIVE,
1104	MSM_V4L2_EFFECT_SOLARIZE,
1105	MSM_V4L2_EFFECT_SEPIA,
1106	MSM_V4L2_EFFECT_POSTERAIZE,
1107	MSM_V4L2_EFFECT_WHITEBOARD,
1108	MSM_V4L2_EFFECT_BLACKBOARD,
1109	MSM_V4L2_EFFECT_AQUA,
1110	MSM_V4L2_EFFECT_EMBOSS,
1111	MSM_V4L2_EFFECT_SKETCH,
1112	MSM_V4L2_EFFECT_NEON,
1113	MSM_V4L2_EFFECT_MAX,
1114};
1115
1116enum msm_v4l2_power_line_frequency {
1117	MSM_V4L2_POWER_LINE_OFF,
1118	MSM_V4L2_POWER_LINE_60HZ,
1119	MSM_V4L2_POWER_LINE_50HZ,
1120	MSM_V4L2_POWER_LINE_AUTO,
1121};
1122
1123#define CAMERA_ISO_TYPE_AUTO           0
1124#define CAMEAR_ISO_TYPE_HJR            1
1125#define CAMEAR_ISO_TYPE_100            2
1126#define CAMERA_ISO_TYPE_200            3
1127#define CAMERA_ISO_TYPE_400            4
1128#define CAMEAR_ISO_TYPE_800            5
1129#define CAMERA_ISO_TYPE_1600           6
1130
1131struct sensor_pict_fps {
1132	uint16_t prevfps;
1133	uint16_t pictfps;
1134};
1135
1136struct exp_gain_cfg {
1137	uint16_t gain;
1138	uint32_t line;
1139};
1140
1141struct focus_cfg {
1142	int32_t steps;
1143	int dir;
1144};
1145
1146struct fps_cfg {
1147	uint16_t f_mult;
1148	uint16_t fps_div;
1149	uint32_t pict_fps_div;
1150};
1151struct wb_info_cfg {
1152	uint16_t red_gain;
1153	uint16_t green_gain;
1154	uint16_t blue_gain;
1155};
1156struct sensor_3d_exp_cfg {
1157	uint16_t gain;
1158	uint32_t line;
1159	uint16_t r_gain;
1160	uint16_t b_gain;
1161	uint16_t gr_gain;
1162	uint16_t gb_gain;
1163	uint16_t gain_adjust;
1164};
1165struct sensor_3d_cali_data_t{
1166	unsigned char left_p_matrix[3][4][8];
1167	unsigned char right_p_matrix[3][4][8];
1168	unsigned char square_len[8];
1169	unsigned char focal_len[8];
1170	unsigned char pixel_pitch[8];
1171	uint16_t left_r;
1172	uint16_t left_b;
1173	uint16_t left_gb;
1174	uint16_t left_af_far;
1175	uint16_t left_af_mid;
1176	uint16_t left_af_short;
1177	uint16_t left_af_5um;
1178	uint16_t left_af_50up;
1179	uint16_t left_af_50down;
1180	uint16_t right_r;
1181	uint16_t right_b;
1182	uint16_t right_gb;
1183	uint16_t right_af_far;
1184	uint16_t right_af_mid;
1185	uint16_t right_af_short;
1186	uint16_t right_af_5um;
1187	uint16_t right_af_50up;
1188	uint16_t right_af_50down;
1189};
1190struct sensor_init_cfg {
1191	uint8_t prev_res;
1192	uint8_t pict_res;
1193};
1194
1195#define ROLLOFF_CALDATA_SIZE    (17 * 13)
1196typedef struct
1197{
1198    unsigned short          mesh_rolloff_table_size;     // TableSize
1199    uint8_t                 r_gain[ROLLOFF_CALDATA_SIZE];   // RGain
1200    uint8_t                 gr_gain[ROLLOFF_CALDATA_SIZE];  // GRGain
1201    uint8_t                 gb_gain[ROLLOFF_CALDATA_SIZE];  // GBGain
1202    uint8_t                 b_gain[ROLLOFF_CALDATA_SIZE];   // BGain
1203    uint8_t                 red_ref[17];
1204} rolloff_caldata_array_type;
1205
1206struct sensor_calib_data {
1207	/* Color Related Measurements */
1208	uint16_t r_over_g;
1209	uint16_t b_over_g;
1210	uint16_t gr_over_gb;
1211
1212	/* Lens Related Measurements */
1213	uint16_t macro_2_inf;
1214	uint16_t inf_2_macro;
1215	uint16_t stroke_amt;
1216	uint16_t af_pos_1m;
1217	uint16_t af_pos_inf;
1218	/* Lens Shading Calibration Data */
1219	rolloff_caldata_array_type rolloff;
1220};
1221
1222enum msm_sensor_resolution_t {
1223	MSM_SENSOR_RES_FULL,
1224	MSM_SENSOR_RES_QTR,
1225	MSM_SENSOR_RES_2,
1226	MSM_SENSOR_RES_3,
1227	MSM_SENSOR_RES_4,
1228	MSM_SENSOR_RES_5,
1229	MSM_SENSOR_RES_6,
1230	MSM_SENSOR_RES_7,
1231	MSM_SENSOR_INVALID_RES,
1232};
1233
1234struct msm_sensor_output_info_t {
1235	uint16_t x_output;
1236	uint16_t y_output;
1237	uint16_t line_length_pclk;
1238	uint16_t frame_length_lines;
1239	uint32_t vt_pixel_clk;
1240	uint32_t op_pixel_clk;
1241	uint16_t binning_factor;
1242};
1243
1244struct sensor_output_info_t {
1245	struct msm_sensor_output_info_t *output_info;
1246	uint16_t num_info;
1247};
1248
1249struct mirror_flip {
1250	int32_t x_mirror;
1251	int32_t y_flip;
1252};
1253
1254struct cord {
1255	uint32_t x;
1256	uint32_t y;
1257};
1258
1259struct msm_eeprom_data_t {
1260	void *eeprom_data;
1261	uint16_t index;
1262};
1263
1264struct msm_camera_csid_vc_cfg {
1265	uint8_t cid;
1266	uint8_t dt;
1267	uint8_t decode_format;
1268};
1269
1270struct csi_lane_params_t {
1271	uint8_t csi_lane_assign;
1272	uint8_t csi_lane_mask;
1273	uint8_t csi_if;
1274	uint8_t csid_core;
1275	uint32_t csid_version;
1276};
1277
1278#define CSI_EMBED_DATA 0x12
1279#define CSI_RESERVED_DATA_0 0x13
1280#define CSI_YUV422_8  0x1E
1281#define CSI_RAW8    0x2A
1282#define CSI_RAW10   0x2B
1283#define CSI_RAW12   0x2C
1284
1285#define CSI_DECODE_6BIT 0
1286#define CSI_DECODE_8BIT 1
1287#define CSI_DECODE_10BIT 2
1288#define CSI_DECODE_DPCM_10_8_10 5
1289
1290#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1291	(action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1292#define ISPIF_ON_FRAME_BOUNDARY   (0x01 << 0)
1293#define ISPIF_OFF_FRAME_BOUNDARY  (0x01 << 1)
1294#define ISPIF_OFF_IMMEDIATELY     (0x01 << 2)
1295#define ISPIF_S_STREAM_SHIFT      4
1296#define ISPIF_VFE_INTF_SHIFT      12
1297
1298#define PIX_0 (0x01 << 0)
1299#define RDI_0 (0x01 << 1)
1300#define PIX_1 (0x01 << 2)
1301#define RDI_1 (0x01 << 3)
1302#define RDI_2 (0x01 << 4)
1303
1304enum msm_ispif_vfe_intf {
1305	VFE0,
1306	VFE1,
1307	VFE_MAX,
1308};
1309
1310enum msm_ispif_intftype {
1311	PIX0,
1312	RDI0,
1313	PIX1,
1314	RDI1,
1315	RDI2,
1316	INTF_MAX,
1317};
1318
1319enum msm_ispif_vc {
1320	VC0,
1321	VC1,
1322	VC2,
1323	VC3,
1324};
1325
1326enum msm_ispif_cid {
1327	CID0,
1328	CID1,
1329	CID2,
1330	CID3,
1331	CID4,
1332	CID5,
1333	CID6,
1334	CID7,
1335	CID8,
1336	CID9,
1337	CID10,
1338	CID11,
1339	CID12,
1340	CID13,
1341	CID14,
1342	CID15,
1343};
1344
1345struct msm_ispif_params {
1346	uint8_t intftype;
1347	uint16_t cid_mask;
1348	uint8_t csid;
1349	uint8_t vfe_intf;
1350};
1351
1352struct msm_ispif_params_list {
1353	uint32_t len;
1354	struct msm_ispif_params params[4];
1355};
1356
1357enum ispif_cfg_type_t {
1358	ISPIF_INIT,
1359	ISPIF_SET_CFG,
1360	ISPIF_SET_ON_FRAME_BOUNDARY,
1361	ISPIF_SET_OFF_FRAME_BOUNDARY,
1362	ISPIF_SET_OFF_IMMEDIATELY,
1363	ISPIF_RELEASE,
1364};
1365
1366struct ispif_cfg_data {
1367	enum ispif_cfg_type_t cfgtype;
1368	union {
1369		uint32_t csid_version;
1370		int cmd;
1371		struct msm_ispif_params_list ispif_params;
1372	} cfg;
1373};
1374
1375struct sensor_cfg_data {
1376	int cfgtype;
1377	int mode;
1378	int rs;
1379	uint8_t max_steps;
1380
1381	union {
1382		int8_t effect;
1383		uint8_t lens_shading;
1384		uint16_t prevl_pf;
1385		uint16_t prevp_pl;
1386		uint16_t pictl_pf;
1387		uint16_t pictp_pl;
1388		uint32_t pict_max_exp_lc;
1389		uint16_t p_fps;
1390		uint8_t iso_type;
1391		struct sensor_init_cfg init_info;
1392		struct sensor_pict_fps gfps;
1393		struct exp_gain_cfg exp_gain;
1394		struct focus_cfg focus;
1395		struct fps_cfg fps;
1396		struct wb_info_cfg wb_info;
1397		struct sensor_3d_exp_cfg sensor_3d_exp;
1398		struct sensor_calib_data calib_info;
1399		struct sensor_output_info_t output_info;
1400		struct msm_eeprom_data_t eeprom_data;
1401		struct csi_lane_params_t csi_lane_params;
1402		/* QRD */
1403		uint16_t antibanding;
1404		uint8_t contrast;
1405		uint8_t saturation;
1406		uint8_t sharpness;
1407		int8_t brightness;
1408		int ae_mode;
1409		uint8_t wb_val;
1410		int8_t exp_compensation;
1411		struct cord aec_cord;
1412		int is_autoflash;
1413		struct mirror_flip mirror_flip;
1414	} cfg;
1415};
1416
1417struct damping_params_t {
1418	uint32_t damping_step;
1419	uint32_t damping_delay;
1420	uint32_t hw_params;
1421};
1422
1423enum actuator_type {
1424	ACTUATOR_VCM,
1425	ACTUATOR_PIEZO,
1426};
1427
1428enum msm_actuator_data_type {
1429	MSM_ACTUATOR_BYTE_DATA = 1,
1430	MSM_ACTUATOR_WORD_DATA,
1431};
1432
1433enum msm_actuator_addr_type {
1434	MSM_ACTUATOR_BYTE_ADDR = 1,
1435	MSM_ACTUATOR_WORD_ADDR,
1436};
1437
1438enum msm_actuator_write_type {
1439	MSM_ACTUATOR_WRITE_HW_DAMP,
1440	MSM_ACTUATOR_WRITE_DAC,
1441};
1442
1443struct msm_actuator_reg_params_t {
1444	enum msm_actuator_write_type reg_write_type;
1445	uint32_t hw_mask;
1446	uint16_t reg_addr;
1447	uint16_t hw_shift;
1448	uint16_t data_shift;
1449};
1450
1451struct reg_settings_t {
1452	uint16_t reg_addr;
1453	uint16_t reg_data;
1454};
1455
1456struct region_params_t {
1457	/* [0] = ForwardDirection Macro boundary
1458	   [1] = ReverseDirection Inf boundary
1459	 */
1460	uint16_t step_bound[2];
1461	uint16_t code_per_step;
1462};
1463
1464struct msm_actuator_move_params_t {
1465	int8_t dir;
1466	int8_t sign_dir;
1467	int16_t dest_step_pos;
1468	int32_t num_steps;
1469	struct damping_params_t *ringing_params;
1470};
1471
1472struct msm_actuator_tuning_params_t {
1473	int16_t initial_code;
1474	uint16_t pwd_step;
1475	uint16_t region_size;
1476	uint32_t total_steps;
1477	struct region_params_t *region_params;
1478};
1479
1480struct msm_actuator_params_t {
1481	enum actuator_type act_type;
1482	uint8_t reg_tbl_size;
1483	uint16_t data_size;
1484	uint16_t init_setting_size;
1485	uint32_t i2c_addr;
1486	enum msm_actuator_addr_type i2c_addr_type;
1487	enum msm_actuator_data_type i2c_data_type;
1488	struct msm_actuator_reg_params_t *reg_tbl_params;
1489	struct reg_settings_t *init_settings;
1490};
1491
1492struct msm_actuator_set_info_t {
1493	struct msm_actuator_params_t actuator_params;
1494	struct msm_actuator_tuning_params_t af_tuning_params;
1495};
1496
1497struct msm_actuator_get_info_t {
1498	uint32_t focal_length_num;
1499	uint32_t focal_length_den;
1500	uint32_t f_number_num;
1501	uint32_t f_number_den;
1502	uint32_t f_pix_num;
1503	uint32_t f_pix_den;
1504	uint32_t total_f_dist_num;
1505	uint32_t total_f_dist_den;
1506	uint32_t hor_view_angle_num;
1507	uint32_t hor_view_angle_den;
1508	uint32_t ver_view_angle_num;
1509	uint32_t ver_view_angle_den;
1510};
1511
1512enum af_camera_name {
1513	ACTUATOR_MAIN_CAM_0,
1514	ACTUATOR_MAIN_CAM_1,
1515	ACTUATOR_MAIN_CAM_2,
1516	ACTUATOR_MAIN_CAM_3,
1517	ACTUATOR_MAIN_CAM_4,
1518	ACTUATOR_MAIN_CAM_5,
1519	ACTUATOR_WEB_CAM_0,
1520	ACTUATOR_WEB_CAM_1,
1521	ACTUATOR_WEB_CAM_2,
1522};
1523
1524struct msm_actuator_cfg_data {
1525	int cfgtype;
1526	uint8_t is_af_supported;
1527	union {
1528		struct msm_actuator_move_params_t move;
1529		struct msm_actuator_set_info_t set_info;
1530		struct msm_actuator_get_info_t get_info;
1531		enum af_camera_name cam_name;
1532	} cfg;
1533};
1534
1535struct msm_eeprom_support {
1536	uint16_t is_supported;
1537	uint16_t size;
1538	uint16_t index;
1539	uint16_t qvalue;
1540};
1541
1542struct msm_calib_wb {
1543	uint16_t r_over_g;
1544	uint16_t b_over_g;
1545	uint16_t gr_over_gb;
1546};
1547
1548struct msm_calib_af {
1549	uint16_t macro_dac;
1550	uint16_t inf_dac;
1551	uint16_t start_dac;
1552};
1553
1554struct msm_calib_lsc {
1555	uint16_t r_gain[221];
1556	uint16_t b_gain[221];
1557	uint16_t gr_gain[221];
1558	uint16_t gb_gain[221];
1559};
1560
1561struct pixel_t {
1562	int x;
1563	int y;
1564};
1565
1566struct msm_calib_dpc {
1567	uint16_t validcount;
1568	struct pixel_t snapshot_coord[128];
1569	struct pixel_t preview_coord[128];
1570	struct pixel_t video_coord[128];
1571};
1572
1573struct msm_camera_eeprom_info_t {
1574	struct msm_eeprom_support af;
1575	struct msm_eeprom_support wb;
1576	struct msm_eeprom_support lsc;
1577	struct msm_eeprom_support dpc;
1578};
1579
1580struct msm_eeprom_cfg_data {
1581	int cfgtype;
1582	uint8_t is_eeprom_supported;
1583	union {
1584		struct msm_eeprom_data_t get_data;
1585		struct msm_camera_eeprom_info_t get_info;
1586	} cfg;
1587};
1588
1589struct sensor_large_data {
1590	int cfgtype;
1591	union {
1592		struct sensor_3d_cali_data_t sensor_3d_cali_data;
1593	} data;
1594};
1595
1596enum sensor_type_t {
1597	BAYER,
1598	YUV,
1599	JPEG_SOC,
1600};
1601
1602enum flash_type {
1603	LED_FLASH,
1604	STROBE_FLASH,
1605};
1606
1607enum strobe_flash_ctrl_type {
1608	STROBE_FLASH_CTRL_INIT,
1609	STROBE_FLASH_CTRL_CHARGE,
1610	STROBE_FLASH_CTRL_RELEASE
1611};
1612
1613struct strobe_flash_ctrl_data {
1614	enum strobe_flash_ctrl_type type;
1615	int charge_en;
1616};
1617
1618struct msm_camera_info {
1619	int num_cameras;
1620	uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1621	uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1622	uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1623	const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1624	enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
1625};
1626
1627struct msm_cam_config_dev_info {
1628	int num_config_nodes;
1629	const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
1630	int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
1631};
1632
1633struct msm_mctl_node_info {
1634	int num_mctl_nodes;
1635	const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1636};
1637
1638struct flash_ctrl_data {
1639	int flashtype;
1640	union {
1641		int led_state;
1642		struct strobe_flash_ctrl_data strobe_ctrl;
1643	} ctrl_data;
1644};
1645
1646#define GET_NAME			0
1647#define GET_PREVIEW_LINE_PER_FRAME	1
1648#define GET_PREVIEW_PIXELS_PER_LINE	2
1649#define GET_SNAPSHOT_LINE_PER_FRAME	3
1650#define GET_SNAPSHOT_PIXELS_PER_LINE	4
1651#define GET_SNAPSHOT_FPS		5
1652#define GET_SNAPSHOT_MAX_EP_LINE_CNT	6
1653
1654struct msm_camsensor_info {
1655	char name[MAX_SENSOR_NAME];
1656	uint8_t flash_enabled;
1657	uint8_t strobe_flash_enabled;
1658	uint8_t actuator_enabled;
1659	uint8_t ispif_supported;
1660	int8_t total_steps;
1661	uint8_t support_3d;
1662	enum flash_type flashtype;
1663	enum sensor_type_t sensor_type;
1664	uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1665	uint32_t camera_type; /* msm_camera_type */
1666	int mount_angle;
1667	uint32_t max_width;
1668	uint32_t max_height;
1669};
1670
1671#define V4L2_SINGLE_PLANE	0
1672#define V4L2_MULTI_PLANE_Y	0
1673#define V4L2_MULTI_PLANE_CBCR	1
1674#define V4L2_MULTI_PLANE_CB	1
1675#define V4L2_MULTI_PLANE_CR	2
1676
1677struct plane_data {
1678	int plane_id;
1679	uint32_t offset;
1680	unsigned long size;
1681};
1682
1683struct img_plane_info {
1684	uint32_t width;
1685	uint32_t height;
1686	uint32_t pixelformat;
1687	uint8_t buffer_type; /*Single/Multi planar*/
1688	uint8_t output_port;
1689	uint32_t ext_mode;
1690	uint8_t num_planes;
1691	struct plane_data plane[MAX_PLANES];
1692	uint32_t sp_y_offset;
1693	uint32_t inst_handle;
1694};
1695
1696#define QCAMERA_NAME "qcamera"
1697#define QCAMERA_SERVER_NAME "qcamera_server"
1698#define QCAMERA_DEVICE_GROUP_ID 1
1699#define QCAMERA_VNODE_GROUP_ID 2
1700
1701enum msm_cam_subdev_type {
1702	CSIPHY_DEV,
1703	CSID_DEV,
1704	CSIC_DEV,
1705	ISPIF_DEV,
1706	VFE_DEV,
1707	AXI_DEV,
1708	VPE_DEV,
1709	SENSOR_DEV,
1710	ACTUATOR_DEV,
1711	EEPROM_DEV,
1712	GESTURE_DEV,
1713	IRQ_ROUTER_DEV,
1714	CPP_DEV,
1715	CCI_DEV,
1716};
1717
1718struct msm_mctl_set_sdev_data {
1719	uint32_t revision;
1720	enum msm_cam_subdev_type sdev_type;
1721};
1722
1723#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
1724	_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1725
1726#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
1727	_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1728
1729#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
1730	_IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
1731
1732#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
1733	_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
1734
1735#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
1736	_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
1737
1738#define MSM_CAM_IOCTL_SEND_EVENT \
1739	_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1740
1741#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1742	_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1743
1744#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1745	_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1746
1747#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
1748	_IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
1749
1750#define VIDIOC_MSM_VPE_INIT \
1751	_IO('V', BASE_VIDIOC_PRIVATE + 15)
1752
1753#define VIDIOC_MSM_VPE_RELEASE \
1754	_IO('V', BASE_VIDIOC_PRIVATE + 16)
1755
1756#define VIDIOC_MSM_VPE_CFG \
1757	_IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
1758
1759#define VIDIOC_MSM_AXI_INIT \
1760	_IO('V', BASE_VIDIOC_PRIVATE + 18)
1761
1762#define VIDIOC_MSM_AXI_RELEASE \
1763	_IO('V', BASE_VIDIOC_PRIVATE + 19)
1764
1765#define VIDIOC_MSM_AXI_CFG \
1766	_IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
1767
1768#define VIDIOC_MSM_AXI_IRQ \
1769	_IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
1770
1771#define VIDIOC_MSM_AXI_BUF_CFG \
1772	_IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
1773
1774#define VIDIOC_MSM_VFE_INIT \
1775	_IO('V', BASE_VIDIOC_PRIVATE + 22)
1776
1777#define VIDIOC_MSM_VFE_RELEASE \
1778	_IO('V', BASE_VIDIOC_PRIVATE + 23)
1779
1780struct msm_camera_v4l2_ioctl_t {
1781	uint32_t id;
1782	void __user *ioctl_ptr;
1783	uint32_t len;
1784};
1785
1786struct msm_camera_vfe_params_t {
1787	uint32_t operation_mode;
1788	uint32_t capture_count;
1789	uint32_t skip_abort;
1790	uint16_t port_info;
1791	uint32_t inst_handle;
1792	uint16_t cmd_type;
1793};
1794
1795enum msm_camss_irq_idx {
1796	CAMERA_SS_IRQ_0,
1797	CAMERA_SS_IRQ_1,
1798	CAMERA_SS_IRQ_2,
1799	CAMERA_SS_IRQ_3,
1800	CAMERA_SS_IRQ_4,
1801	CAMERA_SS_IRQ_5,
1802	CAMERA_SS_IRQ_6,
1803	CAMERA_SS_IRQ_7,
1804	CAMERA_SS_IRQ_8,
1805	CAMERA_SS_IRQ_9,
1806	CAMERA_SS_IRQ_10,
1807	CAMERA_SS_IRQ_11,
1808	CAMERA_SS_IRQ_12,
1809	CAMERA_SS_IRQ_MAX
1810};
1811
1812enum msm_cam_hw_idx {
1813	MSM_CAM_HW_MICRO,
1814	MSM_CAM_HW_CCI,
1815	MSM_CAM_HW_CSI0,
1816	MSM_CAM_HW_CSI1,
1817	MSM_CAM_HW_CSI2,
1818	MSM_CAM_HW_CSI3,
1819	MSM_CAM_HW_ISPIF,
1820	MSM_CAM_HW_CPP,
1821	MSM_CAM_HW_VFE0,
1822	MSM_CAM_HW_VFE1,
1823	MSM_CAM_HW_JPEG0,
1824	MSM_CAM_HW_JPEG1,
1825	MSM_CAM_HW_JPEG2,
1826	MSM_CAM_HW_MAX
1827};
1828
1829struct msm_camera_irq_cfg {
1830	/* Bit mask of all the camera hardwares that needs to
1831	 * be composited into a single IRQ to the MSM.
1832	 * Current usage: (may be updated based on hw changes)
1833	 * Bits 31:13 - Reserved.
1834	 * Bits 12:0
1835	 * 12 - MSM_CAM_HW_JPEG2
1836	 * 11 - MSM_CAM_HW_JPEG1
1837	 * 10 - MSM_CAM_HW_JPEG0
1838	 *  9 - MSM_CAM_HW_VFE1
1839	 *  8 - MSM_CAM_HW_VFE0
1840	 *  7 - MSM_CAM_HW_CPP
1841	 *  6 - MSM_CAM_HW_ISPIF
1842	 *  5 - MSM_CAM_HW_CSI3
1843	 *  4 - MSM_CAM_HW_CSI2
1844	 *  3 - MSM_CAM_HW_CSI1
1845	 *  2 - MSM_CAM_HW_CSI0
1846	 *  1 - MSM_CAM_HW_CCI
1847	 *  0 - MSM_CAM_HW_MICRO
1848	 */
1849	uint32_t cam_hw_mask;
1850	uint8_t  irq_idx;
1851	uint8_t  num_hwcore;
1852};
1853
1854#define MSM_IRQROUTER_CFG_COMPIRQ \
1855	_IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1856
1857#define MAX_NUM_CPP_STRIPS 8
1858
1859enum msm_cpp_frame_type {
1860	MSM_CPP_OFFLINE_FRAME,
1861	MSM_CPP_REALTIME_FRAME,
1862};
1863
1864struct msm_cpp_frame_strip_info {
1865	int scale_v_en;
1866	int scale_h_en;
1867
1868	int upscale_v_en;
1869	int upscale_h_en;
1870
1871	int src_start_x;
1872	int src_end_x;
1873	int src_start_y;
1874	int src_end_y;
1875
1876	/* Padding is required for upscaler because it does not
1877	 * pad internally like other blocks, also needed for rotation
1878	 * rotation expects all the blocks in the stripe to be the same size
1879	 * Padding is done such that all the extra padded pixels
1880	 * are on the right and bottom
1881	*/
1882	int pad_bottom;
1883	int pad_top;
1884	int pad_right;
1885	int pad_left;
1886
1887	int v_init_phase;
1888	int h_init_phase;
1889	int h_phase_step;
1890	int v_phase_step;
1891
1892	int prescale_crop_width_first_pixel;
1893	int prescale_crop_width_last_pixel;
1894	int prescale_crop_height_first_line;
1895	int prescale_crop_height_last_line;
1896
1897	int postscale_crop_height_first_line;
1898	int postscale_crop_height_last_line;
1899	int postscale_crop_width_first_pixel;
1900	int postscale_crop_width_last_pixel;
1901
1902	int dst_start_x;
1903	int dst_end_x;
1904	int dst_start_y;
1905	int dst_end_y;
1906
1907	int bytes_per_pixel;
1908	unsigned int source_address;
1909	unsigned int destination_address;
1910	unsigned int src_stride;
1911	unsigned int dst_stride;
1912	int rotate_270;
1913	int horizontal_flip;
1914	int vertical_flip;
1915	int scale_output_width;
1916	int scale_output_height;
1917};
1918
1919struct msm_cpp_frame_info_t {
1920	int32_t frame_id;
1921	uint32_t inst_id;
1922	uint32_t client_id;
1923	enum msm_cpp_frame_type frame_type;
1924	uint32_t num_strips;
1925	struct msm_cpp_frame_strip_info *strip_info;
1926};
1927
1928struct msm_ver_num_info {
1929	uint32_t main;
1930	uint32_t minor;
1931	uint32_t rev;
1932};
1933
1934#define VIDIOC_MSM_CPP_CFG \
1935	_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1936
1937#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1938	_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1939
1940#define VIDIOC_MSM_CPP_GET_INST_INFO \
1941	_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1942
1943#define V4L2_EVENT_CPP_FRAME_DONE  (V4L2_EVENT_PRIVATE_START + 0)
1944
1945/* Instance Handle - inst_handle
1946 * Data bundle containing the information about where
1947 * to get a buffer for a particular camera instance.
1948 * This is a bitmask containing the following data:
1949 * Buffer Handle Bitmask:
1950 *      ------------------------------------
1951 *      Bits    :  Purpose
1952 *      ------------------------------------
1953 *      31 - 24 :  Reserved.
1954 *      23      :  is Image mode valid?
1955 *      22 - 16 :  Image mode.
1956 *      15      :  is MCTL PP inst idx valid?
1957 *      14 - 8  :  MCTL PP inst idx.
1958 *      7       :  is Video inst idx valid?
1959 *      6 - 0   :  Video inst idx.
1960 */
1961#define CLR_IMG_MODE(handle)	(handle &= 0xFF00FFFF)
1962#define SET_IMG_MODE(handle, data)	\
1963	(handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
1964#define GET_IMG_MODE(handle)	\
1965	((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
1966
1967#define CLR_MCTLPP_INST_IDX(handle)	(handle &= 0xFFFF00FF)
1968#define SET_MCTLPP_INST_IDX(handle, data)	\
1969	(handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
1970#define GET_MCTLPP_INST_IDX(handle)	\
1971	((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
1972
1973#define CLR_VIDEO_INST_IDX(handle)	(handle &= 0xFFFFFF00)
1974#define GET_VIDEO_INST_IDX(handle)	\
1975	((handle & 0x80) ? (handle & 0x7F) : 0xFF)
1976#define SET_VIDEO_INST_IDX(handle, data)	\
1977	(handle |= (0x1 << 7) | (data & 0x7F))
1978
1979#endif /* __LINUX_MSM_CAMERA_H */
1980