13e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#ifndef _LINUX_DSSCOMP_H 23e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#define _LINUX_DSSCOMP_H 33e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 43e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#ifdef __KERNEL__ 53e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#include <video/omapdss.h> 63e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#else 73e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 83e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* exporting enumerations from arch/arm/plat-omap/include/plat/display.h */ 93e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omap_plane { 103e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_GFX = 0, 113e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_VIDEO1 = 1, 123e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_VIDEO2 = 2, 133e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_VIDEO3 = 3, 143e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_WB = 4, 153e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 163e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 173e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omap_channel { 183e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_CHANNEL_LCD = 0, 193e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_CHANNEL_DIGIT = 1, 203e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_CHANNEL_LCD2 = 2, 213e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 223e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 233e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omap_color_mode { 243e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */ 253e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */ 263e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */ 273e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */ 283e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 293e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* also referred to as RGB 12-BPP, 16-bit container */ 303e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGB12U = 1 << 4, /* xRGB12-4444 */ 313e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16-4444 */ 323e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16-565 */ 333e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 343e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* also referred to as RGB 24-BPP, 32-bit container */ 353e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGB24U = 1 << 7, /* xRGB24-8888 */ 363e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24-888 */ 373e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */ 383e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */ 393e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32-8888 */ 403e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32-8888 */ 413e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 423e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* also referred to as RGBx 32 in TRM */ 433e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGBX24 = 1 << 13, /* RGBx32-8888 */ 443e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32-8888 */ 453e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */ 463e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 473e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* also referred to as RGBA12-4444 in TRM */ 483e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16-4444 */ 493e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 503e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGBX12 = 1 << 16, /* RGBx16-4444 */ 513e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16-4444 */ 523e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16-1555 */ 533e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 543e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* also referred to as xRGB16-555 in TRM */ 553e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_XRGB15 = 1 << 18, /* xRGB16-1555 */ 563e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16-1555 */ 573e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 583e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 593e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omap_dss_trans_key_type { 603e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_KEY_GFX_DST = 0, 613e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_COLOR_KEY_VID_SRC = 1, 623e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 633e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 643e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omap_dss_display_state { 653e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_DISPLAY_DISABLED = 0, 663e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_DISPLAY_ACTIVE, 673e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_DISPLAY_SUSPENDED, 683e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_DISPLAY_TRANSITION, 693e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 703e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 713e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct omap_video_timings { 723e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: pixels */ 733e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 x_res; 743e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: pixels */ 753e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 y_res; 763e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: KHz */ 773e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 pixel_clock; 783e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: pixel clocks */ 793e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 hsw; /* Horizontal synchronization pulse width */ 803e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: pixel clocks */ 813e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 hfp; /* Horizontal front porch */ 823e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: pixel clocks */ 833e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 hbp; /* Horizontal back porch */ 843e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: line clocks */ 853e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 vsw; /* Vertical synchronization pulse width */ 863e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: line clocks */ 873e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 vfp; /* Vertical front porch */ 883e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Unit: line clocks */ 893e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 vbp; /* Vertical back porch */ 903e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 913e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 923e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* YUV to RGB color conversion info */ 933e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct omap_dss_cconv_coefs { 943e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s16 ry, rcr, rcb; 953e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s16 gy, gcr, gcb; 963e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s16 by, bcr, bcb; 973e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 983e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* Y is 16..235, UV is 16..240 if not fullrange. Otherwise 0..255 */ 993e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 full_range; 1003e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev} __attribute__ ((aligned(4))); 1013e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1023e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct omap_dss_cpr_coefs { 1033e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s16 rr, rg, rb; 1043e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s16 gr, gg, gb; 1053e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s16 br, bg, bb; 1063e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1073e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1083e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#endif 1093e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1107c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling/* copy of fb_videomode */ 1117c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gillingstruct dsscomp_videomode { 1127c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling const char *name; /* optional */ 1137c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 refresh; /* optional */ 1147c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 xres; 1157c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 yres; 1167c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 pixclock; 1177c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 left_margin; 1187c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 right_margin; 1197c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 upper_margin; 1207c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 lower_margin; 1217c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 hsync_len; 1227c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 vsync_len; 1237c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 sync; 1247c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 vmode; 1257c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 flag; 1267c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling}; 1277c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling 1283e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 1293e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Stereoscopic Panel types 1303e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * row, column, overunder, sidebyside options 1313e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * are with respect to native scan order 1323e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 1333e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum s3d_disp_type { 1343e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_NONE = 0, 1353e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_FRAME_SEQ, 1363e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_ROW_IL, 1373e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_COL_IL, 1383e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_PIX_IL, 1393e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_CHECKB, 1403e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_OVERUNDER, 1413e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_SIDEBYSIDE, 1423e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1433e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1443e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* Subsampling direction is based on native panel scan order.*/ 1453e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum s3d_disp_sub_sampling { 1463e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_SUB_SAMPLE_NONE = 0, 1473e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_SUB_SAMPLE_V, 1483e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_SUB_SAMPLE_H, 1493e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1503e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1513e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 1523e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Indicates if display expects left view first followed by right or viceversa 1533e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For row interlaved displays, defines first row view 1543e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For column interleaved displays, defines first column view 1553e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For checkerboard, defines first pixel view 1563e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For overunder, defines top view 1573e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For sidebyside, defines west view 1583e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 1593e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum s3d_disp_order { 1603e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_ORDER_L = 0, 1613e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_ORDER_R = 1, 1623e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1633e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1643e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 1653e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Indicates current view 1663e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Used mainly for displays that need to trigger a sync signal 1673e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 1683e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum s3d_disp_view { 1693e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_VIEW_L = 0, 1703e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev S3D_DISP_VIEW_R, 1713e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1723e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1733e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct s3d_disp_info { 1743e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum s3d_disp_type type; 1753e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum s3d_disp_sub_sampling sub_samp; 1763e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum s3d_disp_order order; 1773e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* 1783e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Gap between left and right views 1793e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For over/under units are lines 1803e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For sidebyside units are pixels 1813e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For other types ignored 1823e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 1833e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev unsigned int gap; 1843e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1853e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1863e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omap_dss_ilace_mode { 1873e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE = (1 << 0), /* interlaced vs. progressive */ 1883e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_SEQ = (1 << 1), /* sequential vs interleaved */ 1893e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_SWAP = (1 << 2), /* swap fields, e.g. TB=>BT */ 1903e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1913e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_NONE = 0, 1923e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_IL_TB = OMAP_DSS_ILACE, 1933e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_IL_BT = OMAP_DSS_ILACE | OMAP_DSS_ILACE_SWAP, 1943e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_SEQ_TB = OMAP_DSS_ILACE_IL_TB | OMAP_DSS_ILACE_SEQ, 1953e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_ILACE_SEQ_BT = OMAP_DSS_ILACE_IL_BT | OMAP_DSS_ILACE_SEQ, 1963e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 1973e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 1983e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* YUV VC1 range mapping info */ 1993e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dss2_vc1_range_map_info { 2003e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 enable; /* bool */ 2013e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 2023e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 range_y; /* 0..7 */ 2033e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 range_uv; /* 0..7 */ 2043e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev} __attribute__ ((aligned(4))); 2053e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 2063e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* standard rectangle */ 2073e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dss2_rect_t { 2083e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s32 x; /* left */ 2093e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __s32 y; /* top */ 2103e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 w; /* width */ 2113e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 h; /* height */ 2123e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev} __attribute__ ((aligned(4))); 2133e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 2143e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* decimation constraints */ 2153e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dss2_decim { 2163e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 min_x; 2173e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 max_x; /* 0 is same as 255 */ 2183e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 min_y; 2193e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 max_y; /* 0 is same as 255 */ 2203e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev} __attribute__ ((aligned(4))); 2213e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 2223e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 2233e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * A somewhat more user friendly interface to the DSS2. This is a 2243e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * direct interface to the DSS2 overlay and overlay_manager modules. 2253e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * User-space APIs are provided for HW-specific control of DSS in 2263e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * contrast with V4L2/FB that are more generic, but in this process 2273e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * omit HW-specific features. 2283e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2293e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * For now managers are specified by display index as opposed to manager 2303e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * type, so that display0 is always the default display (e.g. HDMI on 2313e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * panda, and LCD blaze.) For now you would need to query the displays 2323e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * or use sysfs to find a specific display. 2333e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2343e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Userspace operations are as follows: 2353e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 236305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * 1) check if DSS supports an overlay configuration, use DSSCIOC_CHECK_OVL 2373e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * ioctl with the manager, overlay, and setup-mode information filled out. 2383e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * All fields should be filled out as it may influence whether DSS can 2393e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * display/render the overlay. 2403e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2413e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * If proper address information is not available, it may be possible to 2423e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * use a type-of-address enumeration instead for luma/rgb and chroma (if 2433e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * applicable) frames. 2443e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2453e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Do this for each overlay before attempting to configure DSS. 2463e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2473e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2) configure DSS pipelines for display/manager using DSSCOMP_SETUP_MANAGER 2483e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * ioctl. You can delay applying the settings until an dss2_manager_apply() 249335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * is called for the internal composition object, if the APPLY bit of setup mode 250335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * is not set. However the CAPTURE/DISPLAY bits of the setup mode settings will 2513e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * determine if at this time a capture will take place (in case of capture 2523e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * only mode). You may also set up additional pipelines with 2533e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * dss2_overlay_setup() before this. 2543e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2553e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3) On OMAP4/5 you can use the DSS WB pipeline to copy (and convert) a buffer 256305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * using DSS. Use the DSSCIOC_WB_COPY ioctl for this. This is a blocking 2573e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * call, and it may possibly fail if an ongoing WB capture mode has been 258335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * scheduled (which is outside of the current scope of the DSS2 interface.) 259335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * 260305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * There is also a one-shot configuration API (DSSCIOC_SETUP_DISPC). This 261335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * allows you to set-up all overlays on all managers in one call. This call 262335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * performs additional functionality: 263335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * 264335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * - it maps userspace 1D buffers into TILER 1D for the duration of the display 265335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * - it disables all overlays that were specified before, but are no longer 266335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * specified 2673e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2683e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 2693e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 2703e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 2713e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * DSS2 overlay information. This structure contains all information 2723e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * needed to set up the overlay for a particular buffer to be displayed 2733e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * at a particular orientation. 2743e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2753e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * The following information is deemed to be set globally, so it is not 2763e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * included: 2773e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * - whether to enable zorder (always enabled) 2783e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * - whether to replicate/truncate color fields (it is decided per the 2793e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * whole manager/overlay settings, and is enabled unless overlay is 2803e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * directed to WB.) 2813e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2823e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * There is also no support for CLUT formats 2833e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2843e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Requirements: 2853e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2863e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 1) 0 <= crop.x <= crop.x + crop.w <= width 2873e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2) 0 <= crop.y <= crop.y + crop.h <= height 2883e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3) win.x <= win.x + win.w and win.w >= 0 2893e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4) win.y <= win.y + win.h and win.h >= 0 2903e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2913e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5) color_mode is supported by overlay 2923e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 6) requested scaling is supported by overlay and functional clocks 2933e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2943e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Notes: 2953e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2963e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 1) Any portions of X:[pos_x, pos_x + out_width] and 2973e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Y:[pos_y, pos_y + out_height] outside of the screen 2983e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * X:[0, screen.width], Y:[0, screen.height] will be cropped 2993e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * automatically without changing the scaling ratio. 3003e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3013e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2) Crop region will be adjusted to the pixel granularity: 3023e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * (2-by-1) for YUV422, (2-by-2) for YUV420. This will 3033e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * not modify the output region. Crop region is for the 3043e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * original (unrotated) buffer, so it does not change with 3053e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * rotation. 3063e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3073e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3) Rotation will not modify the output region, specifically 3083e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * its height and width. Also the coordinate system of the 3093e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * display is always (0,0) = top left. 3103e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3113e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4) cconv and vc1 only needs to be filled for YUV color modes. 3123e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3133e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5) vc1.range_y and vc1.range_uv only needs to be filled if 3143e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * vc1.enable is true. 3153e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 3163e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dss2_ovl_cfg { 3173e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 width; /* buffer width */ 3183e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 height; /* buffer height */ 3193e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 stride; /* buffer stride */ 3203e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3213e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum omap_color_mode color_mode; 3223e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 pre_mult_alpha; /* bool */ 3233e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 global_alpha; /* 0..255 */ 3243e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 rotation; /* 0..3 (*90 degrees clockwise) */ 3253e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 mirror; /* left-to-right: mirroring is applied after rotation */ 3263e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3273e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum omap_dss_ilace_mode ilace; /* interlace mode */ 3283e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3293e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_rect_t win; /* output window - on display */ 3303e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_rect_t crop; /* crop window - in source buffer */ 3313e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3323e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_decim decim; /* predecimation limits */ 3333e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3343e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct omap_dss_cconv_coefs cconv; 3353e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_vc1_range_map_info vc1; 3363e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 337305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling __u8 ix; /* ovl index same as sysfs/overlay# */ 3383e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 zorder; /* 0..3 */ 3393e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 enabled; /* bool */ 3403e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 zonly; /* only set zorder and enabled bit */ 341335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling __u8 mgr_ix; /* mgr index */ 3423e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev} __attribute__ ((aligned(4))); 3433e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3443e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum omapdss_buffer_type { 3453e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_BUFTYPE_SDMA, 3463e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_BUFTYPE_TILER_8BIT, 3473e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_BUFTYPE_TILER_16BIT, 3483e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_BUFTYPE_TILER_32BIT, 3493e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev OMAP_DSS_BUFTYPE_TILER_PAGE, 3503e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 3513e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 352305d9b714eb73c10465abdade0061eee3bdb76efErik Gillingenum omapdss_buffer_addressing_type { 353305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling OMAP_DSS_BUFADDR_DIRECT, /* using direct addresses */ 354305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling OMAP_DSS_BUFADDR_BYTYPE, /* using buffer types */ 355305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling OMAP_DSS_BUFADDR_ION, /* using ion handle(s) */ 356305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling OMAP_DSS_BUFADDR_GRALLOC, /* using gralloc handle */ 3572323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling OMAP_DSS_BUFADDR_OVL_IX, /* using a prior overlay */ 3582323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling OMAP_DSS_BUFADDR_LAYER_IX, /* using a Post2 layer */ 3592323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling OMAP_DSS_BUFADDR_FB, /* using framebuffer memory */ 360305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling}; 361305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling 3623e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dss2_ovl_info { 3633e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_ovl_cfg cfg; 3643e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 365305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling enum omapdss_buffer_addressing_type addressing; 366305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling 3673e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev union { 3683e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* user-space interfaces */ 3693e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct { 370305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling void *address; /* main buffer address */ 371305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling void *uv_address; /* uv buffer */ 372305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling }; 373305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling 374305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling /* 375305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * For DSSCIOC_CHECK_OVL we allow specifying just the 376305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * type of each buffer. This is used if we need to 377305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * check whether DSS will be able to display a buffer 378305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * if using a particular memory type before spending 379305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * time to map/copy the buffer into that type of 380305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * memory. 381305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling */ 382305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling struct { 383305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling enum omapdss_buffer_type ba_type; 384305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling enum omapdss_buffer_type uv_type; 3853e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev }; 3863e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 3873e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* kernel-space interfaces */ 3882323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling 3892323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling /* 3902323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling * for fbmem, highest 4-bits of address is fb index, 3912323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling * rest of the bits are the offset 3922323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling */ 3933e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct { 3942323bc97127888e8b5fd479aba2e36e3ef2239e9Erik Gilling __u32 ba; /* base address or index */ 3953e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 uv; /* uv address */ 3963e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev }; 3973e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev }; 3983e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 3993e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4003e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 4013e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * DSS2 manager information. 4023e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4033e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * The following information is deemed to be set globally, so it is not 4043e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * included: 405335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * gamma correction 4063e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * whether to enable zorder (always enabled) 4073e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * whether to replicate/truncate color fields (it is decided per the 4083e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * whole manager/overlay settings, and is enabled unless overlay is 4093e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * directed to WB.) 4103e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Notes: 4113e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4123e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 1) trans_key_type and trans_enabled only need to be filled if 4133e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * trans_enabled is true, and alpha_blending is false. 4143e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 4153e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dss2_mgr_info { 416335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling __u32 ix; /* display index same as sysfs/display# */ 4173e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4183e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 default_color; 4193e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4203e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum omap_dss_trans_key_type trans_key_type; 4213e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 trans_key; 4223e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct omap_dss_cpr_coefs cpr_coefs; 4233e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4243e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 trans_enabled; /* bool */ 4253e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 426335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling __u8 interlaced; /* bool */ 4273e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 alpha_blending; /* bool - overrides trans_enabled */ 4283e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 cpr_enabled; /* bool */ 4293e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 swap_rb; /* bool - swap red and blue */ 4303e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev} __attribute__ ((aligned(4))); 4313e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4323e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 433305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * ioctl: DSSCIOC_SETUP_MGR, struct dsscomp_setup_mgr_data 4343e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4353e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 1. sets manager of each ovl in composition to the display 4363e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 2. calls set_dss_ovl_info() for each ovl to set up the 4373e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * overlay staging structures (this is a wrapper around ovl->set_info()) 4383e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 3. calls set_dss_mgr_info() for mgr to set up the manager 4393e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * staging structures (this is a wrapper around mgr->set_info()) 4403e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4. if update is true: 4413e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * calls manager->apply() 4423e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * calls driver->update() in a non-blocking fashion 4433e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * this will program the DSS synchronously 4443e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4453e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Notes: 4463e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4473e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 1) x, y, w, h only needs to be set if update is true. 4483e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4493e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * All non-specified pipelines that currently are on the same display 4503e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * will remain the same as on the previous frame. You may want to 4513e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * disable unused pipelines to avoid surprises. 4523e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4533e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * If get_sync_obj is false, it returns 0 on success, <0 error value 4543e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * on failure. 4553e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4563e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * If get_sync_obj is true, it returns fd on success, or a negative value 457305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * on failure. You can use the fd to wait on (using DSSCIOC_WAIT ioctl()). 4583e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 4593e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Note: frames do not get eclipsed when the display turns off. Queue a 4603e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * blank frame to eclipse old frames. Blank frames get eclipsed when 4613e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * programmed into DSS. 4623e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 463335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * (A blank frame is queued to the display automatically in Android before 464335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * the display is turned off.) 465335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * 4663e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * All overlays to be used on the frame must be listed. There is no way 4673e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * to add another overlay to a defined frame. 4683e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 4693e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum dsscomp_setup_mode { 4703e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_MODE_APPLY = (1 << 0), /* applies changes to cache */ 4713e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_MODE_DISPLAY = (1 << 1), /* calls display update */ 4723e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_MODE_CAPTURE = (1 << 2), /* capture to WB */ 4733e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4743e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* just apply changes for next vsync/update */ 4753e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_APPLY = DSSCOMP_SETUP_MODE_APPLY, 4763e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* trigger an update (wait for vsync) */ 4773e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_DISPLAY = 4783e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_MODE_APPLY | DSSCOMP_SETUP_MODE_DISPLAY, 4793e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* capture to WB - WB must be configured */ 4803e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_CAPTURE = 4813e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_MODE_APPLY | DSSCOMP_SETUP_MODE_CAPTURE, 4823e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev /* display and capture to WB - WB must be configured */ 4833e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_DISPLAY_CAPTURE = 4843e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_SETUP_DISPLAY | DSSCOMP_SETUP_CAPTURE, 4853e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 4863e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4873e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dsscomp_setup_mgr_data { 488335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling __u32 sync_id; /* synchronization ID - for debugging */ 4893e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4903e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_rect_t win; /* update region, set w/h to 0 for fullscreen */ 4913e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum dsscomp_setup_mode mode; 4923e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 num_ovls; /* # of overlays used in the composition */ 4933e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u16 get_sync_obj; /* ioctl should return a sync object */ 4943e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4953e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_mgr_info mgr; 4963e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_ovl_info ovls[0]; /* up to 5 overlays to set up */ 4973e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 4983e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 4993e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 500305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * ioctl: DSSCIOC_CHECK_OVL, struct dsscomp_check_ovl_data 5013e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5023e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * DISPLAY and/or CAPTURE bits must be filled for the mode field 5033e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * correctly to be able to decide correctly if DSS can properly 5043e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * render the overlay. 5053e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5063e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * ovl.ix is ignored. 5073e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5083e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Returns a positive bitmask regarding which overlay of DSS can 5093e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * render the overlay as it is configured for the display/display's 5103e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * manager. NOTE: that overlays that are assigned to other displays 5113e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * may be returned. If there is an invalid configuration (negative 5123e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * sizes, etc.), a negative error value is returned. 5133e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5143e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * ovl->decim's min values will be modified to the smallest decimation that 5153e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * DSS can use to support the overlay configuration. 5163e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5173e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Assumptions: 5183e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * - zorder will be distinct from other pipelines on that manager 5193e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * - overlay will be enabled and routed to the display specified 5203e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 5213e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dsscomp_check_ovl_data { 5223e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum dsscomp_setup_mode mode; 5233e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_mgr_info mgr; 5243e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_ovl_info ovl; 5253e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 5263e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 5273e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 528335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * This structure is used to set up the entire DISPC (all managers), 529335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * and is analogous to dsscomp_setup_mgr_data. 530335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * 531335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * Additional features: 532335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * - all overlays that were specified in a prior use of this 533335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * structure, and are no longer specified, will be disabled. 534335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * - 1D buffers under 4M will be mapped into TILER1D. 535335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * 536335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * Limitations: 537335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * - only DISPLAY mode is supported (DISPLAY and APPLY bits will 538335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * automatically be set) 539335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * - getting a sync object is not supported. 540b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev */ 541b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchevstruct dsscomp_setup_dispc_data { 542335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling __u32 sync_id; /* synchronization ID - for debugging */ 543b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev 544b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev enum dsscomp_setup_mode mode; 545b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev __u16 num_ovls; /* # of overlays used in the composition */ 546335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling __u16 num_mgrs; /* # of managers used in the composition */ 547b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev __u16 get_sync_obj; /* ioctl should return a sync object */ 548b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev 549335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling struct dss2_mgr_info mgrs[3]; 550b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev struct dss2_ovl_info ovls[5]; /* up to 5 overlays to set up */ 551b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev}; 552b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev 553b1c92aa50991f17e75cc0510ec2f9d09f8cb4707Iliyan Malchev/* 554305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * ioctl: DSSCIOC_WB_COPY, struct dsscomp_wb_copy_data 555305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling *, 5563e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Requirements: 5573e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * wb.ix must be OMAP_DSS_WB. 5583e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5593e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Returns 0 on success (copy is completed), non-0 on failure. 5603e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 5613e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dsscomp_wb_copy_data { 5623e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_ovl_info ovl, wb; 5633e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 5643e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 5653e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 566305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * ioctl: DSSCIOC_QUERY_DISPLAY, struct dsscomp_display_info 5673e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5687c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * Gets informations about the display. Fill in ix and modedb_len before 5697c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * calling ioctl, and rest of the fields are filled in by ioctl. Up to 5707c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * modedb_len timings are retrieved in the order of display preference. 5713e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 5723e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Returns: 0 on success, non-0 error value on failure. 5733e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 5743e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dsscomp_display_info { 5753e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 ix; /* display index (sysfs/display#) */ 5763e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 overlays_available; /* bitmask of available overlays */ 5773e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 overlays_owned; /* bitmask of owned overlays */ 5783e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum omap_channel channel; 5793e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum omap_dss_display_state state; 5803e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u8 enabled; /* bool: resume-state if suspended */ 5813e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct omap_video_timings timings; 5823e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct s3d_disp_info s3d_info; /* any S3D specific information */ 5833e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev struct dss2_mgr_info mgr; /* manager information */ 5847c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u16 width_in_mm; /* screen dimensions */ 5857c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u16 height_in_mm; 5867c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling 5877c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 modedb_len; /* number of video timings */ 5887c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling struct dsscomp_videomode modedb[]; /* display supported timings */ 5897c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling}; 5907c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling 5917c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling/* 592305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * ioctl: DSSCIOC_SETUP_DISPLAY, struct dsscomp_setup_display_data 5937c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * 5947c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * Gets informations about the display. Fill in ix before calling 5957c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * ioctl, and rest of the fields are filled in by ioctl. 5967c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * 5977c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling * Returns: 0 on success, non-0 error value on failure. 5987c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling */ 5997c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gillingstruct dsscomp_setup_display_data { 6007c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling __u32 ix; /* display index (sysfs/display#) */ 6017c04a2b599c5c989bb1aaf24905f71ae0ab4e9e5Erik Gilling struct dsscomp_videomode mode; /* video timings */ 6023e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 6033e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 6043e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* 605305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * ioctl: DSSCIOC_WAIT, struct dsscomp_wait_data 6063e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 6073e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Use this ioctl to wait for one of the following events: 6083e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 6093e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * A) the moment a composition is programmed into DSS 6103e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * B) the moment a composition is first displayed (or captured) 6113e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * C) the moment when a composition is no longer queued or displayed on a 6123e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * display (it is released). (A composition is assumed to be superceded 6133e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * when another composition has been programmed into DSS, even if that 6143e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * subsequent composition does not update/specify all overlays used by 6153e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * the prior composition; moreover, even if it uses the same buffers.) 6163e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 617335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * Set timeout to desired timeout value in microseconds. 6183e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 619335bc55a94b010f5fe20f13b0bf7d4666a83baadErik Gilling * This ioctl must be used on the sync object returned by the 620305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling * DSSCIOC_SETUP_MGR or DSSCIOC_SETUP_DISPC ioctls. 6213e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * 6223e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev * Returns: >=0 on success, <0 error value on failure (e.g. -ETIME). 6233e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev */ 6243e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevenum dsscomp_wait_phase { 6253e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_WAIT_PROGRAMMED = 1, 6263e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_WAIT_DISPLAYED, 6273e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev DSSCOMP_WAIT_RELEASED, 6283e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 6293e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 6303e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchevstruct dsscomp_wait_data { 6313e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev __u32 timeout_us; /* timeout in microseconds */ 6323e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev enum dsscomp_wait_phase phase; /* phase to wait for */ 6333e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev}; 6343e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev 6353e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev/* IOCTLS */ 636305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_SETUP_MGR _IOW('O', 128, struct dsscomp_setup_mgr_data) 637305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_CHECK_OVL _IOWR('O', 129, struct dsscomp_check_ovl_data) 638305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_WB_COPY _IOW('O', 130, struct dsscomp_wb_copy_data) 639305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_QUERY_DISPLAY _IOWR('O', 131, struct dsscomp_display_info) 640305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_WAIT _IOW('O', 132, struct dsscomp_wait_data) 641305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling 642305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_SETUP_DISPC _IOW('O', 133, struct dsscomp_setup_dispc_data) 643305d9b714eb73c10465abdade0061eee3bdb76efErik Gilling#define DSSCIOC_SETUP_DISPLAY _IOW('O', 134, struct dsscomp_setup_display_data) 6443e1d980e967cae0e301accc8e0f7a9b78a7761dcIliyan Malchev#endif 645