ISDOpcodes.h revision cfe33c46aa50f04adb0431243e7d25f79b719ac6
1//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares codegen opcodes and related utilities. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_CODEGEN_ISDOPCODES_H 15#define LLVM_CODEGEN_ISDOPCODES_H 16 17namespace llvm { 18 19/// ISD namespace - This namespace contains an enum which represents all of the 20/// SelectionDAG node types and value types. 21/// 22namespace ISD { 23 24 //===--------------------------------------------------------------------===// 25 /// ISD::NodeType enum - This enum defines the target-independent operators 26 /// for a SelectionDAG. 27 /// 28 /// Targets may also define target-dependent operator codes for SDNodes. For 29 /// example, on x86, these are the enum values in the X86ISD namespace. 30 /// Targets should aim to use target-independent operators to model their 31 /// instruction sets as much as possible, and only use target-dependent 32 /// operators when they have special requirements. 33 /// 34 /// Finally, during and after selection proper, SNodes may use special 35 /// operator codes that correspond directly with MachineInstr opcodes. These 36 /// are used to represent selected instructions. See the isMachineOpcode() 37 /// and getMachineOpcode() member functions of SDNode. 38 /// 39 enum NodeType { 40 // DELETED_NODE - This is an illegal value that is used to catch 41 // errors. This opcode is not a legal opcode for any node. 42 DELETED_NODE, 43 44 // EntryToken - This is the marker used to indicate the start of the region. 45 EntryToken, 46 47 // TokenFactor - This node takes multiple tokens as input and produces a 48 // single token result. This is used to represent the fact that the operand 49 // operators are independent of each other. 50 TokenFactor, 51 52 // AssertSext, AssertZext - These nodes record if a register contains a 53 // value that has already been zero or sign extended from a narrower type. 54 // These nodes take two operands. The first is the node that has already 55 // been extended, and the second is a value type node indicating the width 56 // of the extension 57 AssertSext, AssertZext, 58 59 // Various leaf nodes. 60 BasicBlock, VALUETYPE, CONDCODE, Register, 61 Constant, ConstantFP, 62 GlobalAddress, GlobalTLSAddress, FrameIndex, 63 JumpTable, ConstantPool, ExternalSymbol, BlockAddress, 64 65 // The address of the GOT 66 GLOBAL_OFFSET_TABLE, 67 68 // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and 69 // llvm.returnaddress on the DAG. These nodes take one operand, the index 70 // of the frame or return address to return. An index of zero corresponds 71 // to the current function's frame or return address, an index of one to the 72 // parent's frame or return address, and so on. 73 FRAMEADDR, RETURNADDR, 74 75 // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to 76 // first (possible) on-stack argument. This is needed for correct stack 77 // adjustment during unwind. 78 FRAME_TO_ARGS_OFFSET, 79 80 // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the 81 // address of the exception block on entry to an landing pad block. 82 EXCEPTIONADDR, 83 84 // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the 85 // address of the Language Specific Data Area for the enclosing function. 86 LSDAADDR, 87 88 // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents 89 // the selection index of the exception thrown. 90 EHSELECTION, 91 92 // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 93 // 'eh_return' gcc dwarf builtin, which is used to return from 94 // exception. The general meaning is: adjust stack by OFFSET and pass 95 // execution to HANDLER. Many platform-related details also :) 96 EH_RETURN, 97 98 // OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) 99 // This corresponds to the eh.sjlj.setjmp intrinsic. 100 // It takes an input chain and a pointer to the jump buffer as inputs 101 // and returns an outchain. 102 EH_SJLJ_SETJMP, 103 104 // OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) 105 // This corresponds to the eh.sjlj.longjmp intrinsic. 106 // It takes an input chain and a pointer to the jump buffer as inputs 107 // and returns an outchain. 108 EH_SJLJ_LONGJMP, 109 110 // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, context) 111 // This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an 112 // input chain and a pointer to the sjlj function context as inputs and 113 // returns an outchain. By default, this does nothing. Targets can lower 114 // this to unwind setup code if needed. 115 EH_SJLJ_DISPATCHSETUP, 116 117 // TargetConstant* - Like Constant*, but the DAG does not do any folding, 118 // simplification, or lowering of the constant. They are used for constants 119 // which are known to fit in the immediate fields of their users, or for 120 // carrying magic numbers which are not values which need to be materialized 121 // in registers. 122 TargetConstant, 123 TargetConstantFP, 124 125 // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or 126 // anything else with this node, and this is valid in the target-specific 127 // dag, turning into a GlobalAddress operand. 128 TargetGlobalAddress, 129 TargetGlobalTLSAddress, 130 TargetFrameIndex, 131 TargetJumpTable, 132 TargetConstantPool, 133 TargetExternalSymbol, 134 TargetBlockAddress, 135 136 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) 137 /// This node represents a target intrinsic function with no side effects. 138 /// The first operand is the ID number of the intrinsic from the 139 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The 140 /// node returns the result of the intrinsic. 141 INTRINSIC_WO_CHAIN, 142 143 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) 144 /// This node represents a target intrinsic function with side effects that 145 /// returns a result. The first operand is a chain pointer. The second is 146 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The 147 /// operands to the intrinsic follow. The node has two results, the result 148 /// of the intrinsic and an output chain. 149 INTRINSIC_W_CHAIN, 150 151 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) 152 /// This node represents a target intrinsic function with side effects that 153 /// does not return a result. The first operand is a chain pointer. The 154 /// second is the ID number of the intrinsic from the llvm::Intrinsic 155 /// namespace. The operands to the intrinsic follow. 156 INTRINSIC_VOID, 157 158 // CopyToReg - This node has three operands: a chain, a register number to 159 // set to this value, and a value. 160 CopyToReg, 161 162 // CopyFromReg - This node indicates that the input value is a virtual or 163 // physical register that is defined outside of the scope of this 164 // SelectionDAG. The register is available from the RegisterSDNode object. 165 CopyFromReg, 166 167 // UNDEF - An undefined node 168 UNDEF, 169 170 // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by 171 // a Constant, which is required to be operand #1) half of the integer or 172 // float value specified as operand #0. This is only for use before 173 // legalization, for values that will be broken into multiple registers. 174 EXTRACT_ELEMENT, 175 176 // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given 177 // two values of the same integer value type, this produces a value twice as 178 // big. Like EXTRACT_ELEMENT, this can only be used before legalization. 179 BUILD_PAIR, 180 181 // MERGE_VALUES - This node takes multiple discrete operands and returns 182 // them all as its individual results. This nodes has exactly the same 183 // number of inputs and outputs. This node is useful for some pieces of the 184 // code generator that want to think about a single node with multiple 185 // results, not multiple nodes. 186 MERGE_VALUES, 187 188 // Simple integer binary arithmetic operators. 189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, 190 191 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 192 // a signed/unsigned value of type i[2*N], and return the full value as 193 // two results, each of type iN. 194 SMUL_LOHI, UMUL_LOHI, 195 196 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and 197 // remainder result. 198 SDIVREM, UDIVREM, 199 200 // CARRY_FALSE - This node is used when folding other nodes, 201 // like ADDC/SUBC, which indicate the carry result is always false. 202 CARRY_FALSE, 203 204 // Carry-setting nodes for multiple precision addition and subtraction. 205 // These nodes take two operands of the same value type, and produce two 206 // results. The first result is the normal add or sub result, the second 207 // result is the carry flag result. 208 ADDC, SUBC, 209 210 // Carry-using nodes for multiple precision addition and subtraction. These 211 // nodes take three operands: The first two are the normal lhs and rhs to 212 // the add or sub, and the third is the input carry flag. These nodes 213 // produce two results; the normal result of the add or sub, and the output 214 // carry flag. These nodes both read and write a carry flag to allow them 215 // to them to be chained together for add and sub of arbitrarily large 216 // values. 217 ADDE, SUBE, 218 219 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. 220 // These nodes take two operands: the normal LHS and RHS to the add. They 221 // produce two results: the normal result of the add, and a boolean that 222 // indicates if an overflow occured (*not* a flag, because it may be stored 223 // to memory, etc.). If the type of the boolean is not i1 then the high 224 // bits conform to getBooleanContents. 225 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics. 226 SADDO, UADDO, 227 228 // Same for subtraction 229 SSUBO, USUBO, 230 231 // Same for multiplication 232 SMULO, UMULO, 233 234 // Simple binary floating point operators. 235 FADD, FSUB, FMUL, FDIV, FREM, 236 237 // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This 238 // DAG node does not require that X and Y have the same type, just that they 239 // are both floating point. X and the result must have the same type. 240 // FCOPYSIGN(f32, f64) is allowed. 241 FCOPYSIGN, 242 243 // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point 244 // value as an integer 0/1 value. 245 FGETSIGN, 246 247 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the 248 /// specified, possibly variable, elements. The number of elements is 249 /// required to be a power of two. The types of the operands must all be 250 /// the same and must match the vector element type, except that integer 251 /// types are allowed to be larger than the element type, in which case 252 /// the operands are implicitly truncated. 253 BUILD_VECTOR, 254 255 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element 256 /// at IDX replaced with VAL. If the type of VAL is larger than the vector 257 /// element type then VAL is truncated before replacement. 258 INSERT_VECTOR_ELT, 259 260 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR 261 /// identified by the (potentially variable) element number IDX. If the 262 /// return type is an integer type larger than the element type of the 263 /// vector, the result is extended to the width of the return type. 264 EXTRACT_VECTOR_ELT, 265 266 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of 267 /// vector type with the same length and element type, this produces a 268 /// concatenated vector result value, with length equal to the sum of the 269 /// lengths of the input vectors. 270 CONCAT_VECTORS, 271 272 /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector 273 /// with VECTOR2 inserted into VECTOR1 at the (potentially 274 /// variable) element number IDX, which must be a multiple of the 275 /// VECTOR2 vector length. The elements of VECTOR1 starting at 276 /// IDX are overwritten with VECTOR2. Elements IDX through 277 /// vector_length(VECTOR2) must be valid VECTOR1 indices. 278 INSERT_SUBVECTOR, 279 280 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an 281 /// vector value) starting with the element number IDX, which must be a 282 /// constant multiple of the result vector length. 283 EXTRACT_SUBVECTOR, 284 285 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as 286 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int 287 /// values that indicate which value (or undef) each result element will 288 /// get. These constant ints are accessible through the 289 /// ShuffleVectorSDNode class. This is quite similar to the Altivec 290 /// 'vperm' instruction, except that the indices must be constants and are 291 /// in terms of the element size of VEC1/VEC2, not in terms of bytes. 292 VECTOR_SHUFFLE, 293 294 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a 295 /// scalar value into element 0 of the resultant vector type. The top 296 /// elements 1 to N-1 of the N-element vector are undefined. The type 297 /// of the operand must match the vector element type, except when they 298 /// are integer types. In this case the operand is allowed to be wider 299 /// than the vector element type, and is implicitly truncated to it. 300 SCALAR_TO_VECTOR, 301 302 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing 303 // an unsigned/signed value of type i[2*N], then return the top part. 304 MULHU, MULHS, 305 306 // Bitwise operators - logical and, logical or, logical xor, shift left, 307 // shift right algebraic (shift in sign bits), shift right logical (shift in 308 // zeroes), rotate left, rotate right, and byteswap. 309 AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP, 310 311 // Counting operators 312 CTTZ, CTLZ, CTPOP, 313 314 // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not 315 // i1 then the high bits must conform to getBooleanContents. 316 SELECT, 317 318 // Select with condition operator - This selects between a true value and 319 // a false value (ops #2 and #3) based on the boolean result of comparing 320 // the lhs and rhs (ops #0 and #1) of a conditional expression with the 321 // condition code in op #4, a CondCodeSDNode. 322 SELECT_CC, 323 324 // SetCC operator - This evaluates to a true value iff the condition is 325 // true. If the result value type is not i1 then the high bits conform 326 // to getBooleanContents. The operands to this are the left and right 327 // operands to compare (ops #0, and #1) and the condition code to compare 328 // them with (op #2) as a CondCodeSDNode. 329 SETCC, 330 331 // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of 332 // integer elements with all bits of the result elements set to true if the 333 // comparison is true or all cleared if the comparison is false. The 334 // operands to this are the left and right operands to compare (LHS/RHS) and 335 // the condition code to compare them with (COND) as a CondCodeSDNode. 336 VSETCC, 337 338 // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 339 // integer shift operations, just like ADD/SUB_PARTS. The operation 340 // ordering is: 341 // [Lo,Hi] = op [LoLHS,HiLHS], Amt 342 SHL_PARTS, SRA_PARTS, SRL_PARTS, 343 344 // Conversion operators. These are all single input single output 345 // operations. For all of these, the result type must be strictly 346 // wider or narrower (depending on the operation) than the source 347 // type. 348 349 // SIGN_EXTEND - Used for integer types, replicating the sign bit 350 // into new bits. 351 SIGN_EXTEND, 352 353 // ZERO_EXTEND - Used for integer types, zeroing the new bits. 354 ZERO_EXTEND, 355 356 // ANY_EXTEND - Used for integer types. The high bits are undefined. 357 ANY_EXTEND, 358 359 // TRUNCATE - Completely drop the high bits. 360 TRUNCATE, 361 362 // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign 363 // depends on the first letter) to floating point. 364 SINT_TO_FP, 365 UINT_TO_FP, 366 367 // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to 368 // sign extend a small value in a large integer register (e.g. sign 369 // extending the low 8 bits of a 32-bit register to fill the top 24 bits 370 // with the 7th bit). The size of the smaller type is indicated by the 1th 371 // operand, a ValueType node. 372 SIGN_EXTEND_INREG, 373 374 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned 375 /// integer. 376 FP_TO_SINT, 377 FP_TO_UINT, 378 379 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 380 /// down to the precision of the destination VT. TRUNC is a flag, which is 381 /// always an integer that is zero or one. If TRUNC is 0, this is a 382 /// normal rounding, if it is 1, this FP_ROUND is known to not change the 383 /// value of Y. 384 /// 385 /// The TRUNC = 1 case is used in cases where we know that the value will 386 /// not be modified by the node, because Y is not using any of the extra 387 /// precision of source type. This allows certain transformations like 388 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 389 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 390 FP_ROUND, 391 392 // FLT_ROUNDS_ - Returns current rounding mode: 393 // -1 Undefined 394 // 0 Round to 0 395 // 1 Round to nearest 396 // 2 Round to +inf 397 // 3 Round to -inf 398 FLT_ROUNDS_, 399 400 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and 401 /// rounds it to a floating point value. It then promotes it and returns it 402 /// in a register of the same size. This operation effectively just 403 /// discards excess precision. The type to round down to is specified by 404 /// the VT operand, a VTSDNode. 405 FP_ROUND_INREG, 406 407 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. 408 FP_EXTEND, 409 410 // BITCAST - This operator converts between integer, vector and FP 411 // values, as if the value was stored to memory with one type and loaded 412 // from the same address with the other type (or equivalently for vector 413 // format conversions, etc). The source and result are required to have 414 // the same bit size (e.g. f32 <-> i32). This can also be used for 415 // int-to-int or fp-to-fp conversions, but that is a noop, deleted by 416 // getNode(). 417 BITCAST, 418 419 // CONVERT_RNDSAT - This operator is used to support various conversions 420 // between various types (float, signed, unsigned and vectors of those 421 // types) with rounding and saturation. NOTE: Avoid using this operator as 422 // most target don't support it and the operator might be removed in the 423 // future. It takes the following arguments: 424 // 0) value 425 // 1) dest type (type to convert to) 426 // 2) src type (type to convert from) 427 // 3) rounding imm 428 // 4) saturation imm 429 // 5) ISD::CvtCode indicating the type of conversion to do 430 CONVERT_RNDSAT, 431 432 // FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform 433 // promotions and truncation for half-precision (16 bit) floating 434 // numbers. We need special nodes since FP16 is a storage-only type with 435 // special semantics of operations. 436 FP16_TO_FP32, FP32_TO_FP16, 437 438 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 439 // FLOG, FLOG2, FLOG10, FEXP, FEXP2, 440 // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating 441 // point operations. These are inspired by libm. 442 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 443 FLOG, FLOG2, FLOG10, FEXP, FEXP2, 444 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, 445 446 // LOAD and STORE have token chains as their first operand, then the same 447 // operands as an LLVM load/store instruction, then an offset node that 448 // is added / subtracted from the base pointer to form the address (for 449 // indexed memory ops). 450 LOAD, STORE, 451 452 // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned 453 // to a specified boundary. This node always has two return values: a new 454 // stack pointer value and a chain. The first operand is the token chain, 455 // the second is the number of bytes to allocate, and the third is the 456 // alignment boundary. The size is guaranteed to be a multiple of the stack 457 // alignment, and the alignment is guaranteed to be bigger than the stack 458 // alignment (if required) or 0 to get standard stack alignment. 459 DYNAMIC_STACKALLOC, 460 461 // Control flow instructions. These all have token chains. 462 463 // BR - Unconditional branch. The first operand is the chain 464 // operand, the second is the MBB to branch to. 465 BR, 466 467 // BRIND - Indirect branch. The first operand is the chain, the second 468 // is the value to branch to, which must be of the same type as the target's 469 // pointer type. 470 BRIND, 471 472 // BR_JT - Jumptable branch. The first operand is the chain, the second 473 // is the jumptable index, the last one is the jumptable entry index. 474 BR_JT, 475 476 // BRCOND - Conditional branch. The first operand is the chain, the 477 // second is the condition, the third is the block to branch to if the 478 // condition is true. If the type of the condition is not i1, then the 479 // high bits must conform to getBooleanContents. 480 BRCOND, 481 482 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in 483 // that the condition is represented as condition code, and two nodes to 484 // compare, rather than as a combined SetCC node. The operands in order are 485 // chain, cc, lhs, rhs, block to branch to if condition is true. 486 BR_CC, 487 488 // INLINEASM - Represents an inline asm block. This node always has two 489 // return values: a chain and a flag result. The inputs are as follows: 490 // Operand #0 : Input chain. 491 // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. 492 // Operand #2 : a MDNodeSDNode with the !srcloc metadata. 493 // Operand #3 : HasSideEffect, IsAlignStack bits. 494 // After this, it is followed by a list of operands with this format: 495 // ConstantSDNode: Flags that encode whether it is a mem or not, the 496 // of operands that follow, etc. See InlineAsm.h. 497 // ... however many operands ... 498 // Operand #last: Optional, an incoming flag. 499 // 500 // The variable width operands are required to represent target addressing 501 // modes as a single "operand", even though they may have multiple 502 // SDOperands. 503 INLINEASM, 504 505 // EH_LABEL - Represents a label in mid basic block used to track 506 // locations needed for debug and exception handling tables. These nodes 507 // take a chain as input and return a chain. 508 EH_LABEL, 509 510 // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a 511 // value, the same type as the pointer type for the system, and an output 512 // chain. 513 STACKSAVE, 514 515 // STACKRESTORE has two operands, an input chain and a pointer to restore to 516 // it returns an output chain. 517 STACKRESTORE, 518 519 // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of 520 // a call sequence, and carry arbitrary information that target might want 521 // to know. The first operand is a chain, the rest are specified by the 522 // target and not touched by the DAG optimizers. 523 // CALLSEQ_START..CALLSEQ_END pairs may not be nested. 524 CALLSEQ_START, // Beginning of a call sequence 525 CALLSEQ_END, // End of a call sequence 526 527 // VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, 528 // and the alignment. It returns a pair of values: the vaarg value and a 529 // new chain. 530 VAARG, 531 532 // VACOPY - VACOPY has five operands: an input chain, a destination pointer, 533 // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the 534 // source. 535 VACOPY, 536 537 // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a 538 // pointer, and a SRCVALUE. 539 VAEND, VASTART, 540 541 // SRCVALUE - This is a node type that holds a Value* that is used to 542 // make reference to a value in the LLVM IR. 543 SRCVALUE, 544 545 // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to 546 // reference metadata in the IR. 547 MDNODE_SDNODE, 548 549 // PCMARKER - This corresponds to the pcmarker intrinsic. 550 PCMARKER, 551 552 // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. 553 // The only operand is a chain and a value and a chain are produced. The 554 // value is the contents of the architecture specific cycle counter like 555 // register (or other high accuracy low latency clock source) 556 READCYCLECOUNTER, 557 558 // HANDLENODE node - Used as a handle for various purposes. 559 HANDLENODE, 560 561 // TRAMPOLINE - This corresponds to the init_trampoline intrinsic. 562 // It takes as input a token chain, the pointer to the trampoline, 563 // the pointer to the nested function, the pointer to pass for the 564 // 'nest' parameter, a SRCVALUE for the trampoline and another for 565 // the nested function (allowing targets to access the original 566 // Function*). It produces the result of the intrinsic and a token 567 // chain as output. 568 TRAMPOLINE, 569 570 // TRAP - Trapping instruction 571 TRAP, 572 573 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are 574 // their first operand. The other operands are the address to prefetch, 575 // read / write specifier, and locality specifier. 576 PREFETCH, 577 578 // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, 579 // store-store, device) 580 // This corresponds to the memory.barrier intrinsic. 581 // it takes an input chain, 4 operands to specify the type of barrier, an 582 // operand specifying if the barrier applies to device and uncached memory 583 // and produces an output chain. 584 MEMBARRIER, 585 586 // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) 587 // this corresponds to the atomic.lcs intrinsic. 588 // cmp is compared to *ptr, and if equal, swap is stored in *ptr. 589 // the return is always the original value in *ptr 590 ATOMIC_CMP_SWAP, 591 592 // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) 593 // this corresponds to the atomic.swap intrinsic. 594 // amt is stored to *ptr atomically. 595 // the return is always the original value in *ptr 596 ATOMIC_SWAP, 597 598 // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) 599 // this corresponds to the atomic.load.[OpName] intrinsic. 600 // op(*ptr, amt) is stored to *ptr atomically. 601 // the return is always the original value in *ptr 602 ATOMIC_LOAD_ADD, 603 ATOMIC_LOAD_SUB, 604 ATOMIC_LOAD_AND, 605 ATOMIC_LOAD_OR, 606 ATOMIC_LOAD_XOR, 607 ATOMIC_LOAD_NAND, 608 ATOMIC_LOAD_MIN, 609 ATOMIC_LOAD_MAX, 610 ATOMIC_LOAD_UMIN, 611 ATOMIC_LOAD_UMAX, 612 613 /// BUILTIN_OP_END - This must be the last enum value in this list. 614 /// The target-specific pre-isel opcode values start here. 615 BUILTIN_OP_END 616 }; 617 618 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations 619 /// which do not reference a specific memory location should be less than 620 /// this value. Those that do must not be less than this value, and can 621 /// be used with SelectionDAG::getMemIntrinsicNode. 622 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+150; 623 624 //===--------------------------------------------------------------------===// 625 /// MemIndexedMode enum - This enum defines the load / store indexed 626 /// addressing modes. 627 /// 628 /// UNINDEXED "Normal" load / store. The effective address is already 629 /// computed and is available in the base pointer. The offset 630 /// operand is always undefined. In addition to producing a 631 /// chain, an unindexed load produces one value (result of the 632 /// load); an unindexed store does not produce a value. 633 /// 634 /// PRE_INC Similar to the unindexed mode where the effective address is 635 /// PRE_DEC the value of the base pointer add / subtract the offset. 636 /// It considers the computation as being folded into the load / 637 /// store operation (i.e. the load / store does the address 638 /// computation as well as performing the memory transaction). 639 /// The base operand is always undefined. In addition to 640 /// producing a chain, pre-indexed load produces two values 641 /// (result of the load and the result of the address 642 /// computation); a pre-indexed store produces one value (result 643 /// of the address computation). 644 /// 645 /// POST_INC The effective address is the value of the base pointer. The 646 /// POST_DEC value of the offset operand is then added to / subtracted 647 /// from the base after memory transaction. In addition to 648 /// producing a chain, post-indexed load produces two values 649 /// (the result of the load and the result of the base +/- offset 650 /// computation); a post-indexed store produces one value (the 651 /// the result of the base +/- offset computation). 652 enum MemIndexedMode { 653 UNINDEXED = 0, 654 PRE_INC, 655 PRE_DEC, 656 POST_INC, 657 POST_DEC, 658 LAST_INDEXED_MODE 659 }; 660 661 //===--------------------------------------------------------------------===// 662 /// LoadExtType enum - This enum defines the three variants of LOADEXT 663 /// (load with extension). 664 /// 665 /// SEXTLOAD loads the integer operand and sign extends it to a larger 666 /// integer result type. 667 /// ZEXTLOAD loads the integer operand and zero extends it to a larger 668 /// integer result type. 669 /// EXTLOAD is used for two things: floating point extending loads and 670 /// integer extending loads [the top bits are undefined]. 671 enum LoadExtType { 672 NON_EXTLOAD = 0, 673 EXTLOAD, 674 SEXTLOAD, 675 ZEXTLOAD, 676 LAST_LOADEXT_TYPE 677 }; 678 679 //===--------------------------------------------------------------------===// 680 /// ISD::CondCode enum - These are ordered carefully to make the bitfields 681 /// below work out, when considering SETFALSE (something that never exists 682 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered 683 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal 684 /// to. If the "N" column is 1, the result of the comparison is undefined if 685 /// the input is a NAN. 686 /// 687 /// All of these (except for the 'always folded ops') should be handled for 688 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, 689 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 690 /// 691 /// Note that these are laid out in a specific order to allow bit-twiddling 692 /// to transform conditions. 693 enum CondCode { 694 // Opcode N U L G E Intuitive operation 695 SETFALSE, // 0 0 0 0 Always false (always folded) 696 SETOEQ, // 0 0 0 1 True if ordered and equal 697 SETOGT, // 0 0 1 0 True if ordered and greater than 698 SETOGE, // 0 0 1 1 True if ordered and greater than or equal 699 SETOLT, // 0 1 0 0 True if ordered and less than 700 SETOLE, // 0 1 0 1 True if ordered and less than or equal 701 SETONE, // 0 1 1 0 True if ordered and operands are unequal 702 SETO, // 0 1 1 1 True if ordered (no nans) 703 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) 704 SETUEQ, // 1 0 0 1 True if unordered or equal 705 SETUGT, // 1 0 1 0 True if unordered or greater than 706 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal 707 SETULT, // 1 1 0 0 True if unordered or less than 708 SETULE, // 1 1 0 1 True if unordered, less than, or equal 709 SETUNE, // 1 1 1 0 True if unordered or not equal 710 SETTRUE, // 1 1 1 1 Always true (always folded) 711 // Don't care operations: undefined if the input is a nan. 712 SETFALSE2, // 1 X 0 0 0 Always false (always folded) 713 SETEQ, // 1 X 0 0 1 True if equal 714 SETGT, // 1 X 0 1 0 True if greater than 715 SETGE, // 1 X 0 1 1 True if greater than or equal 716 SETLT, // 1 X 1 0 0 True if less than 717 SETLE, // 1 X 1 0 1 True if less than or equal 718 SETNE, // 1 X 1 1 0 True if not equal 719 SETTRUE2, // 1 X 1 1 1 Always true (always folded) 720 721 SETCC_INVALID // Marker value. 722 }; 723 724 /// isSignedIntSetCC - Return true if this is a setcc instruction that 725 /// performs a signed comparison when used with integer operands. 726 inline bool isSignedIntSetCC(CondCode Code) { 727 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; 728 } 729 730 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that 731 /// performs an unsigned comparison when used with integer operands. 732 inline bool isUnsignedIntSetCC(CondCode Code) { 733 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; 734 } 735 736 /// isTrueWhenEqual - Return true if the specified condition returns true if 737 /// the two operands to the condition are equal. Note that if one of the two 738 /// operands is a NaN, this value is meaningless. 739 inline bool isTrueWhenEqual(CondCode Cond) { 740 return ((int)Cond & 1) != 0; 741 } 742 743 /// getUnorderedFlavor - This function returns 0 if the condition is always 744 /// false if an operand is a NaN, 1 if the condition is always true if the 745 /// operand is a NaN, and 2 if the condition is undefined if the operand is a 746 /// NaN. 747 inline unsigned getUnorderedFlavor(CondCode Cond) { 748 return ((int)Cond >> 3) & 3; 749 } 750 751 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where 752 /// 'op' is a valid SetCC operation. 753 CondCode getSetCCInverse(CondCode Operation, bool isInteger); 754 755 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 756 /// when given the operation for (X op Y). 757 CondCode getSetCCSwappedOperands(CondCode Operation); 758 759 /// getSetCCOrOperation - Return the result of a logical OR between different 760 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This 761 /// function returns SETCC_INVALID if it is not possible to represent the 762 /// resultant comparison. 763 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 764 765 /// getSetCCAndOperation - Return the result of a logical AND between 766 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 767 /// function returns SETCC_INVALID if it is not possible to represent the 768 /// resultant comparison. 769 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); 770 771 //===--------------------------------------------------------------------===// 772 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT 773 /// supports. 774 enum CvtCode { 775 CVT_FF, // Float from Float 776 CVT_FS, // Float from Signed 777 CVT_FU, // Float from Unsigned 778 CVT_SF, // Signed from Float 779 CVT_UF, // Unsigned from Float 780 CVT_SS, // Signed from Signed 781 CVT_SU, // Signed from Unsigned 782 CVT_US, // Unsigned from Signed 783 CVT_UU, // Unsigned from Unsigned 784 CVT_INVALID // Marker - Invalid opcode 785 }; 786 787} // end llvm::ISD namespace 788 789} // end llvm namespace 790 791#endif 792