MachineInstr.h revision 2d7a47a5dbc04f2dc3857d723ae1983606bf8a69
1//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the declaration of the MachineInstr class, which is the 11// basic representation for all target dependent machine instructions used by 12// the back end. 13// 14//===----------------------------------------------------------------------===// 15 16#ifndef LLVM_CODEGEN_MACHINEINSTR_H 17#define LLVM_CODEGEN_MACHINEINSTR_H 18 19#include "llvm/ADT/iterator" 20#include "llvm/Support/DataTypes.h" 21#include "llvm/Support/Streams.h" 22#include <vector> 23#include <cassert> 24#include <iosfwd> 25 26namespace llvm { 27 28class Value; 29class Function; 30class MachineBasicBlock; 31class TargetInstrDescriptor; 32class TargetMachine; 33class GlobalValue; 34 35template <typename T> struct ilist_traits; 36template <typename T> struct ilist; 37 38//===----------------------------------------------------------------------===// 39// class MachineOperand 40// 41// Representation of each machine instruction operand. 42// 43struct MachineOperand { 44 enum MachineOperandType { 45 MO_Register, // Register operand. 46 MO_Immediate, // Immediate Operand 47 MO_MachineBasicBlock, // MachineBasicBlock reference 48 MO_FrameIndex, // Abstract Stack Frame Index 49 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool 50 MO_JumpTableIndex, // Address of indexed Jump Table for switch 51 MO_ExternalSymbol, // Name of external global symbol 52 MO_GlobalAddress // Address of a global value 53 }; 54 55private: 56 union { 57 GlobalValue *GV; // For MO_GlobalAddress. 58 MachineBasicBlock *MBB; // For MO_MachineBasicBlock. 59 const char *SymbolName; // For MO_ExternalSymbol. 60 unsigned RegNo; // For MO_Register. 61 int64_t immedVal; // For MO_Immediate and MO_*Index. 62 } contents; 63 64 MachineOperandType opType:8; // Discriminate the union. 65 bool IsDef : 1; // True if this is a def, false if this is a use. 66 bool IsImp : 1; // True if this is an implicit def or use. 67 68 bool IsKill : 1; // True if this is a reg use and the reg is dead 69 // immediately after the read. 70 bool IsDead : 1; // True if this is a reg def and the reg is dead 71 // immediately after the write. i.e. A register 72 // that is defined but never used. 73 74 /// auxInfo - auxiliary information used by the MachineOperand 75 union { 76 /// offset - Offset to address of global or external, only valid for 77 /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex 78 int offset; 79 80 /// subReg - SubRegister number, only valid for MO_Register. A value of 0 81 /// indicates the MO_Register has no subReg. 82 unsigned subReg; 83 } auxInfo; 84 85 MachineOperand() {} 86 87 void print(std::ostream &os) const; 88 void print(std::ostream *os) const { if (os) print(*os); } 89 90public: 91 MachineOperand(const MachineOperand &M) { 92 *this = M; 93 } 94 95 ~MachineOperand() {} 96 97 static MachineOperand CreateImm(int64_t Val) { 98 MachineOperand Op; 99 Op.opType = MachineOperand::MO_Immediate; 100 Op.contents.immedVal = Val; 101 Op.IsDef = false; 102 Op.IsImp = false; 103 Op.IsKill = false; 104 Op.IsDead = false; 105 Op.auxInfo.offset = 0; 106 return Op; 107 } 108 109 const MachineOperand &operator=(const MachineOperand &MO) { 110 contents = MO.contents; 111 IsDef = MO.IsDef; 112 IsImp = MO.IsImp; 113 IsKill = MO.IsKill; 114 IsDead = MO.IsDead; 115 opType = MO.opType; 116 auxInfo = MO.auxInfo; 117 return *this; 118 } 119 120 /// getType - Returns the MachineOperandType for this operand. 121 /// 122 MachineOperandType getType() const { return opType; } 123 124 /// Accessors that tell you what kind of MachineOperand you're looking at. 125 /// 126 bool isReg() const { return opType == MO_Register; } 127 bool isImm() const { return opType == MO_Immediate; } 128 bool isMBB() const { return opType == MO_MachineBasicBlock; } 129 130 bool isRegister() const { return opType == MO_Register; } 131 bool isImmediate() const { return opType == MO_Immediate; } 132 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; } 133 bool isFrameIndex() const { return opType == MO_FrameIndex; } 134 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; } 135 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; } 136 bool isGlobalAddress() const { return opType == MO_GlobalAddress; } 137 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; } 138 139 int64_t getImm() const { 140 assert(isImm() && "Wrong MachineOperand accessor"); 141 return contents.immedVal; 142 } 143 144 int64_t getImmedValue() const { 145 assert(isImm() && "Wrong MachineOperand accessor"); 146 return contents.immedVal; 147 } 148 MachineBasicBlock *getMBB() const { 149 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor"); 150 return contents.MBB; 151 } 152 MachineBasicBlock *getMachineBasicBlock() const { 153 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor"); 154 return contents.MBB; 155 } 156 void setMachineBasicBlock(MachineBasicBlock *MBB) { 157 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor"); 158 contents.MBB = MBB; 159 } 160 int getFrameIndex() const { 161 assert(isFrameIndex() && "Wrong MachineOperand accessor"); 162 return (int)contents.immedVal; 163 } 164 unsigned getConstantPoolIndex() const { 165 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor"); 166 return (unsigned)contents.immedVal; 167 } 168 unsigned getJumpTableIndex() const { 169 assert(isJumpTableIndex() && "Wrong MachineOperand accessor"); 170 return (unsigned)contents.immedVal; 171 } 172 GlobalValue *getGlobal() const { 173 assert(isGlobalAddress() && "Wrong MachineOperand accessor"); 174 return contents.GV; 175 } 176 int getOffset() const { 177 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) && 178 "Wrong MachineOperand accessor"); 179 return auxInfo.offset; 180 } 181 unsigned getSubReg() const { 182 assert(isRegister() && "Wrong MachineOperand accessor"); 183 return auxInfo.subReg; 184 } 185 const char *getSymbolName() const { 186 assert(isExternalSymbol() && "Wrong MachineOperand accessor"); 187 return contents.SymbolName; 188 } 189 190 bool isUse() const { 191 assert(isRegister() && "Wrong MachineOperand accessor"); 192 return !IsDef; 193 } 194 bool isDef() const { 195 assert(isRegister() && "Wrong MachineOperand accessor"); 196 return IsDef; 197 } 198 void setIsUse() { 199 assert(isRegister() && "Wrong MachineOperand accessor"); 200 IsDef = false; 201 } 202 void setIsDef() { 203 assert(isRegister() && "Wrong MachineOperand accessor"); 204 IsDef = true; 205 } 206 207 bool isImplicit() const { 208 assert(isRegister() && "Wrong MachineOperand accessor"); 209 return IsImp; 210 } 211 void setImplicit() { 212 assert(isRegister() && "Wrong MachineOperand accessor"); 213 IsImp = true; 214 } 215 216 bool isKill() const { 217 assert(isRegister() && "Wrong MachineOperand accessor"); 218 return IsKill; 219 } 220 bool isDead() const { 221 assert(isRegister() && "Wrong MachineOperand accessor"); 222 return IsDead; 223 } 224 void setIsKill() { 225 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor"); 226 IsKill = true; 227 } 228 void setIsDead() { 229 assert(isRegister() && IsDef && "Wrong MachineOperand accessor"); 230 IsDead = true; 231 } 232 void unsetIsKill() { 233 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor"); 234 IsKill = false; 235 } 236 void unsetIsDead() { 237 assert(isRegister() && IsDef && "Wrong MachineOperand accessor"); 238 IsDead = false; 239 } 240 241 /// getReg - Returns the register number. 242 /// 243 unsigned getReg() const { 244 assert(isRegister() && "This is not a register operand!"); 245 return contents.RegNo; 246 } 247 248 /// MachineOperand mutators. 249 /// 250 void setReg(unsigned Reg) { 251 assert(isRegister() && "This is not a register operand!"); 252 contents.RegNo = Reg; 253 } 254 255 void setImmedValue(int64_t immVal) { 256 assert(isImm() && "Wrong MachineOperand mutator"); 257 contents.immedVal = immVal; 258 } 259 void setImm(int64_t immVal) { 260 assert(isImm() && "Wrong MachineOperand mutator"); 261 contents.immedVal = immVal; 262 } 263 264 void setOffset(int Offset) { 265 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() || 266 isJumpTableIndex()) && 267 "Wrong MachineOperand accessor"); 268 auxInfo.offset = Offset; 269 } 270 void setSubReg(unsigned subReg) { 271 assert(isRegister() && "Wrong MachineOperand accessor"); 272 auxInfo.subReg = subReg; 273 } 274 void setConstantPoolIndex(unsigned Idx) { 275 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor"); 276 contents.immedVal = Idx; 277 } 278 void setJumpTableIndex(unsigned Idx) { 279 assert(isJumpTableIndex() && "Wrong MachineOperand accessor"); 280 contents.immedVal = Idx; 281 } 282 283 /// isIdenticalTo - Return true if this operand is identical to the specified 284 /// operand. Note: This method ignores isKill and isDead properties. 285 bool isIdenticalTo(const MachineOperand &Other) const; 286 287 /// ChangeToImmediate - Replace this operand with a new immediate operand of 288 /// the specified value. If an operand is known to be an immediate already, 289 /// the setImmedValue method should be used. 290 void ChangeToImmediate(int64_t ImmVal) { 291 opType = MO_Immediate; 292 contents.immedVal = ImmVal; 293 } 294 295 /// ChangeToRegister - Replace this operand with a new register operand of 296 /// the specified value. If an operand is known to be an register already, 297 /// the setReg method should be used. 298 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false, 299 bool isKill = false, bool isDead = false) { 300 opType = MO_Register; 301 contents.RegNo = Reg; 302 IsDef = isDef; 303 IsImp = isImp; 304 IsKill = isKill; 305 IsDead = isDead; 306 } 307 308 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) { 309 mop.print(os); 310 return os; 311 } 312 313 friend class MachineInstr; 314}; 315 316 317//===----------------------------------------------------------------------===// 318/// MachineInstr - Representation of each machine instruction. 319/// 320class MachineInstr { 321 const TargetInstrDescriptor *TID; // Instruction descriptor. 322 unsigned short NumImplicitOps; // Number of implicit operands (which 323 // are determined at construction time). 324 325 std::vector<MachineOperand> Operands; // the operands 326 MachineInstr* prev, *next; // links for our intrusive list 327 MachineBasicBlock* parent; // pointer to the owning basic block 328 329 // OperandComplete - Return true if it's illegal to add a new operand 330 bool OperandsComplete() const; 331 332 MachineInstr(const MachineInstr&); 333 void operator=(const MachineInstr&); // DO NOT IMPLEMENT 334 335 // Intrusive list support 336 // 337 friend struct ilist_traits<MachineInstr>; 338 339public: 340 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with 341 /// TID NULL and no operands. 342 MachineInstr(); 343 344 /// MachineInstr ctor - This constructor create a MachineInstr and add the 345 /// implicit operands. It reserves space for number of operands specified by 346 /// TargetInstrDescriptor. 347 MachineInstr(const TargetInstrDescriptor &TID); 348 349 /// MachineInstr ctor - Work exactly the same as the ctor above, except that 350 /// the MachineInstr is created and added to the end of the specified basic 351 /// block. 352 /// 353 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID); 354 355 ~MachineInstr(); 356 357 const MachineBasicBlock* getParent() const { return parent; } 358 MachineBasicBlock* getParent() { return parent; } 359 360 /// getInstrDescriptor - Returns the target instruction descriptor of this 361 /// MachineInstr. 362 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; } 363 364 /// getOpcode - Returns the opcode of this MachineInstr. 365 /// 366 const int getOpcode() const; 367 368 /// Access to explicit operands of the instruction. 369 /// 370 unsigned getNumOperands() const { return Operands.size(); } 371 372 const MachineOperand& getOperand(unsigned i) const { 373 assert(i < getNumOperands() && "getOperand() out of range!"); 374 return Operands[i]; 375 } 376 MachineOperand& getOperand(unsigned i) { 377 assert(i < getNumOperands() && "getOperand() out of range!"); 378 return Operands[i]; 379 } 380 381 /// getNumExplicitOperands - Returns the number of non-implicit operands. 382 /// 383 unsigned getNumExplicitOperands() const; 384 385 /// isIdenticalTo - Return true if this instruction is identical to (same 386 /// opcode and same operands as) the specified instruction. 387 bool isIdenticalTo(const MachineInstr *Other) const { 388 if (Other->getOpcode() != getOpcode() || 389 Other->getNumOperands() != getNumOperands()) 390 return false; 391 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 392 if (!getOperand(i).isIdenticalTo(Other->getOperand(i))) 393 return false; 394 return true; 395 } 396 397 /// clone - Create a copy of 'this' instruction that is identical in 398 /// all ways except the the instruction has no parent, prev, or next. 399 MachineInstr* clone() const { return new MachineInstr(*this); } 400 401 /// removeFromParent - This method unlinks 'this' from the containing basic 402 /// block, and returns it, but does not delete it. 403 MachineInstr *removeFromParent(); 404 405 /// eraseFromParent - This method unlinks 'this' from the containing basic 406 /// block and deletes it. 407 void eraseFromParent() { 408 delete removeFromParent(); 409 } 410 411 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of 412 /// the specific register or -1 if it is not found. It further tightening 413 /// the search criteria to a use that kills the register if isKill is true. 414 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const; 415 416 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of 417 /// the specific register or NULL if it is not found. 418 MachineOperand *findRegisterDefOperand(unsigned Reg); 419 420 /// findFirstPredOperandIdx() - Find the index of the first operand in the 421 /// operand list that is used to represent the predicate. It returns -1 if 422 /// none is found. 423 int findFirstPredOperandIdx() const; 424 425 /// copyKillDeadInfo - Copies kill / dead operand properties from MI. 426 /// 427 void copyKillDeadInfo(const MachineInstr *MI); 428 429 /// copyPredicates - Copies predicate operand(s) from MI. 430 void copyPredicates(const MachineInstr *MI); 431 432 // 433 // Debugging support 434 // 435 void print(std::ostream *OS, const TargetMachine *TM) const { 436 if (OS) print(*OS, TM); 437 } 438 void print(std::ostream &OS, const TargetMachine *TM) const; 439 void print(std::ostream &OS) const; 440 void print(std::ostream *OS) const { if (OS) print(*OS); } 441 void dump() const; 442 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){ 443 minstr.print(os); 444 return os; 445 } 446 447 //===--------------------------------------------------------------------===// 448 // Accessors to add operands when building up machine instructions. 449 // 450 451 /// addRegOperand - Add a register operand. 452 /// 453 void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false, 454 bool IsKill = false, bool IsDead = false) { 455 MachineOperand &Op = AddNewOperand(IsImp); 456 Op.opType = MachineOperand::MO_Register; 457 Op.IsDef = IsDef; 458 Op.IsImp = IsImp; 459 Op.IsKill = IsKill; 460 Op.IsDead = IsDead; 461 Op.contents.RegNo = Reg; 462 Op.auxInfo.subReg = 0; 463 } 464 465 /// addImmOperand - Add a zero extended constant argument to the 466 /// machine instruction. 467 /// 468 void addImmOperand(int64_t Val) { 469 MachineOperand &Op = AddNewOperand(); 470 Op.opType = MachineOperand::MO_Immediate; 471 Op.contents.immedVal = Val; 472 Op.auxInfo.offset = 0; 473 } 474 475 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) { 476 MachineOperand &Op = AddNewOperand(); 477 Op.opType = MachineOperand::MO_MachineBasicBlock; 478 Op.contents.MBB = MBB; 479 Op.auxInfo.offset = 0; 480 } 481 482 /// addFrameIndexOperand - Add an abstract frame index to the instruction 483 /// 484 void addFrameIndexOperand(unsigned Idx) { 485 MachineOperand &Op = AddNewOperand(); 486 Op.opType = MachineOperand::MO_FrameIndex; 487 Op.contents.immedVal = Idx; 488 Op.auxInfo.offset = 0; 489 } 490 491 /// addConstantPoolndexOperand - Add a constant pool object index to the 492 /// instruction. 493 /// 494 void addConstantPoolIndexOperand(unsigned Idx, int Offset) { 495 MachineOperand &Op = AddNewOperand(); 496 Op.opType = MachineOperand::MO_ConstantPoolIndex; 497 Op.contents.immedVal = Idx; 498 Op.auxInfo.offset = Offset; 499 } 500 501 /// addJumpTableIndexOperand - Add a jump table object index to the 502 /// instruction. 503 /// 504 void addJumpTableIndexOperand(unsigned Idx) { 505 MachineOperand &Op = AddNewOperand(); 506 Op.opType = MachineOperand::MO_JumpTableIndex; 507 Op.contents.immedVal = Idx; 508 Op.auxInfo.offset = 0; 509 } 510 511 void addGlobalAddressOperand(GlobalValue *GV, int Offset) { 512 MachineOperand &Op = AddNewOperand(); 513 Op.opType = MachineOperand::MO_GlobalAddress; 514 Op.contents.GV = GV; 515 Op.auxInfo.offset = Offset; 516 } 517 518 /// addExternalSymbolOperand - Add an external symbol operand to this instr 519 /// 520 void addExternalSymbolOperand(const char *SymName) { 521 MachineOperand &Op = AddNewOperand(); 522 Op.opType = MachineOperand::MO_ExternalSymbol; 523 Op.contents.SymbolName = SymName; 524 Op.auxInfo.offset = 0; 525 } 526 527 //===--------------------------------------------------------------------===// 528 // Accessors used to modify instructions in place. 529 // 530 531 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of 532 /// the current instruction with a new one. 533 /// 534 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; } 535 536 /// RemoveOperand - Erase an operand from an instruction, leaving it with one 537 /// fewer operand than it started with. 538 /// 539 void RemoveOperand(unsigned i) { 540 Operands.erase(Operands.begin()+i); 541 } 542private: 543 MachineOperand &AddNewOperand(bool IsImp = false) { 544 assert((IsImp || !OperandsComplete()) && 545 "Trying to add an operand to a machine instr that is already done!"); 546 if (IsImp || NumImplicitOps == 0) { // This is true most of the time. 547 Operands.push_back(MachineOperand()); 548 return Operands.back(); 549 } 550 return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps, 551 MachineOperand()); 552 } 553 554 /// addImplicitDefUseOperands - Add all implicit def and use operands to 555 /// this instruction. 556 void addImplicitDefUseOperands(); 557}; 558 559//===----------------------------------------------------------------------===// 560// Debugging Support 561 562std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI); 563std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO); 564 565} // End llvm namespace 566 567#endif 568