MCInst.h revision d5fb7906130989a579d1bfe4490b414331e94fee 
1//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the declaration of the MCInst and MCOperand classes, which
11// is the basic representation used to represent low-level machine code
12// instructions.
13//
14//===----------------------------------------------------------------------===//
15
16
17#ifndef LLVM_MC_MCINST_H
18#define LLVM_MC_MCINST_H
19
20#include "llvm/ADT/SmallVector.h"
21#include "llvm/Support/DataTypes.h"
22#include "llvm/Support/DebugLoc.h"
23
24namespace llvm {
25
26/// MCOperand - Instances of this class represent operands of the MCInst class.
27/// This is a simple discriminated union.
28class MCOperand {
29  enum MachineOperandType {
30    kInvalid,                 ///< Uninitialized.
31    kRegister,                ///< Register operand.
32    kImmediate                ///< Immediate operand.
33  };
34  unsigned char Kind;
35
36  union {
37    unsigned RegVal;
38    uint64_t ImmVal;
39  };
40public:
41
42  MCOperand() : Kind(kInvalid) {}
43  MCOperand(const MCOperand &RHS) { *this = RHS; }
44
45  bool isReg() const { return Kind == kRegister; }
46  bool isImm() const { return Kind == kImmediate; }
47
48  /// getReg - Returns the register number.
49  unsigned getReg() const {
50    assert(isReg() && "This is not a register operand!");
51    return RegVal;
52  }
53
54  /// setReg - Set the register number.
55  void setReg(unsigned Reg) {
56    assert(isReg() && "This is not a register operand!");
57    RegVal = Reg;
58  }
59
60  uint64_t getImm() const {
61    assert(isImm() && "This is not an immediate");
62    return ImmVal;
63  }
64  void setImm(uint64_t Val) {
65    assert(isImm() && "This is not an immediate");
66    ImmVal = Val;
67  }
68
69  void MakeReg(unsigned Reg) {
70    Kind = kRegister;
71    RegVal = Reg;
72  }
73  void MakeImm(uint64_t Val) {
74    Kind = kImmediate;
75    ImmVal = Val;
76  }
77};
78
79
80/// MCInst - Instances of this class represent a single low-level machine
81/// instruction.
82class MCInst {
83  unsigned Opcode;
84  SmallVector<MCOperand, 8> Operands;
85public:
86  MCInst() : Opcode(~0U) {}
87
88  unsigned getOpcode() const { return Opcode; }
89  DebugLoc getDebugLoc() const { return DebugLoc(); }
90
91  const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
92
93};
94
95
96} // end namespace llvm
97
98#endif
99