MachineInstr.cpp revision df3b99381f1c211071cc1daf0cc297666877bbcb
1e138b3dd1ff02d826233482831318708a166ed93Chris Lattner//===-- lib/CodeGen/MachineInstr.cpp --------------------------------------===//
2edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman//
3b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell//                     The LLVM Compiler Infrastructure
4b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell//
54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source
64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details.
7edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman//
8b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell//===----------------------------------------------------------------------===//
921326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke//
1021326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// Methods common to all machine instructions.
1121326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke//
12035dfbe7f2d109008d2d62d9f2a67efb477a7ab6Chris Lattner//===----------------------------------------------------------------------===//
1370bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve
14e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman#include "llvm/Constants.h"
15822b4fb896846b87dd11a330ae13f2239329aeefChris Lattner#include "llvm/CodeGen/MachineInstr.h"
1684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include "llvm/Value.h"
178517e1f0beea9b5e47974f083396d53294c390adChris Lattner#include "llvm/CodeGen/MachineFunction.h"
1862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner#include "llvm/CodeGen/MachineRegisterInfo.h"
1969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman#include "llvm/CodeGen/PseudoSourceValue.h"
201049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner#include "llvm/Target/TargetMachine.h"
21bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng#include "llvm/Target/TargetInstrInfo.h"
22f14cf85e334ff03bbdd23e473f14ffa4fb025e94Chris Lattner#include "llvm/Target/TargetInstrDesc.h"
236f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#include "llvm/Target/TargetRegisterInfo.h"
242c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman#include "llvm/Support/LeakDetector.h"
25ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman#include "llvm/Support/MathExtras.h"
26a09362eb975730ac624c0bd210a95655ee105296Bill Wendling#include "llvm/Support/Streams.h"
27edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner#include "llvm/Support/raw_ostream.h"
28b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman#include "llvm/ADT/FoldingSet.h"
29c21c5eeb4f56f160e79522df2d3aab5cfe73c05dJeff Cohen#include <ostream>
300742b59913a7760eb26f08121cd244a37e83e3b3Chris Lattnerusing namespace llvm;
31d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke
32f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===//
33f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner// MachineOperand Implementation
34f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===//
35f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
3662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// AddRegOperandToRegInfo - Add this register operand to the specified
3762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// MachineRegisterInfo.  If it is null, then the next/prev fields should be
3862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// explicitly nulled out.
3962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) {
4062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  assert(isReg() && "Can only add reg operand to use lists");
4162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
4262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // If the reginfo pointer is null, just explicitly null out or next/prev
4362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // pointers, to ensure they are not garbage.
4462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (RegInfo == 0) {
4562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Contents.Reg.Prev = 0;
4662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Contents.Reg.Next = 0;
4762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    return;
4862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
4962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
5062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // Otherwise, add this operand to the head of the registers use/def list.
5180fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg());
5262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
5380fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  // For SSA values, we prefer to keep the definition at the start of the list.
5480fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  // we do this by skipping over the definition if it is at the head of the
5580fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  // list.
5680fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  if (*Head && (*Head)->isDef())
5780fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner    Head = &(*Head)->Contents.Reg.Next;
5880fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner
5980fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  Contents.Reg.Next = *Head;
6062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (Contents.Reg.Next) {
6162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    assert(getReg() == Contents.Reg.Next->getReg() &&
6262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner           "Different regs on the same list!");
6362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Contents.Reg.Next->Contents.Reg.Prev = &Contents.Reg.Next;
6462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
6562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
6680fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  Contents.Reg.Prev = Head;
6780fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner  *Head = this;
6862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
6962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
7062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::setReg(unsigned Reg) {
7162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (getReg() == Reg) return; // No change.
7262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
7362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // Otherwise, we have to change the register.  If this operand is embedded
7462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // into a machine function, we need to update the old and new register's
7562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // use/def lists.
7662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (MachineInstr *MI = getParent())
7762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (MachineBasicBlock *MBB = MI->getParent())
7862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      if (MachineFunction *MF = MBB->getParent()) {
7962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        RemoveRegOperandFromRegInfo();
8062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        Contents.Reg.RegNo = Reg;
8162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        AddRegOperandToRegInfo(&MF->getRegInfo());
8262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        return;
8362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      }
8462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
8562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // Otherwise, just change the register, no problem.  :)
8662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  Contents.Reg.RegNo = Reg;
8762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
8862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
8962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// ChangeToImmediate - Replace this operand with a new immediate operand of
9062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the specified value.  If an operand is known to be an immediate already,
9162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the setImm method should be used.
9262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::ChangeToImmediate(int64_t ImmVal) {
9362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // If this operand is currently a register operand, and if this is in a
9462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // function, deregister the operand from the register's use/def list.
9562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (isReg() && getParent() && getParent()->getParent() &&
9662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      getParent()->getParent()->getParent())
9762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    RemoveRegOperandFromRegInfo();
9862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
9962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  OpKind = MO_Immediate;
10062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  Contents.ImmVal = ImmVal;
10162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
10262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
10362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// ChangeToRegister - Replace this operand with a new register operand of
10462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the specified value.  If an operand is known to be an register already,
10562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the setReg method should be used.
10662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
10762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner                                      bool isKill, bool isDead) {
10862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // If this operand is already a register operand, use setReg to update the
10962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // register's use/def lists.
11062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (isReg()) {
11162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    setReg(Reg);
11262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  } else {
11362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Otherwise, change this to a register and set the reg#.
11462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    OpKind = MO_Register;
11562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Contents.Reg.RegNo = Reg;
11662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
11762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // If this operand is embedded in a function, add the operand to the
11862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // register's use/def list.
11962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (MachineInstr *MI = getParent())
12062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      if (MachineBasicBlock *MBB = MI->getParent())
12162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        if (MachineFunction *MF = MBB->getParent())
12262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner          AddRegOperandToRegInfo(&MF->getRegInfo());
12362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
12462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
12562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  IsDef = isDef;
12662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  IsImp = isImp;
12762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  IsKill = isKill;
12862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  IsDead = isDead;
12962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  SubReg = 0;
13062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
13162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
132f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// isIdenticalTo - Return true if this operand is identical to the specified
133f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// operand.
134f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattnerbool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
135f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  if (getType() != Other.getType()) return false;
136f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
137f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  switch (getType()) {
138f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  default: assert(0 && "Unrecognized operand type");
139f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_Register:
140f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    return getReg() == Other.getReg() && isDef() == Other.isDef() &&
141f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner           getSubReg() == Other.getSubReg();
142f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_Immediate:
143f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    return getImm() == Other.getImm();
144e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman  case MachineOperand::MO_FPImmediate:
145e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman    return getFPImm() == Other.getFPImm();
146f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_MachineBasicBlock:
147f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    return getMBB() == Other.getMBB();
148f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_FrameIndex:
1498aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner    return getIndex() == Other.getIndex();
150f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_ConstantPoolIndex:
1518aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner    return getIndex() == Other.getIndex() && getOffset() == Other.getOffset();
152f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_JumpTableIndex:
1538aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner    return getIndex() == Other.getIndex();
154f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_GlobalAddress:
155f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
156f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_ExternalSymbol:
157f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    return !strcmp(getSymbolName(), Other.getSymbolName()) &&
158f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner           getOffset() == Other.getOffset();
159f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  }
160f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner}
161f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
162f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// print - Print the specified machine operand.
163f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner///
164f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattnervoid MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
165f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  switch (getType()) {
166f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_Register:
1676f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman    if (getReg() == 0 || TargetRegisterInfo::isVirtualRegister(getReg())) {
168f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      OS << "%reg" << getReg();
169f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    } else {
170f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      // If the instruction is embedded into a basic block, we can find the
17162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      // target info for the instruction.
172f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      if (TM == 0)
173f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner        if (const MachineInstr *MI = getParent())
174f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner          if (const MachineBasicBlock *MBB = MI->getParent())
175f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner            if (const MachineFunction *MF = MBB->getParent())
176f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner              TM = &MF->getTarget();
177f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
178f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      if (TM)
179e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling        OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
180f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      else
181f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner        OS << "%mreg" << getReg();
182f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    }
183f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
184f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    if (isDef() || isKill() || isDead() || isImplicit()) {
185f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      OS << "<";
186f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      bool NeedComma = false;
187f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      if (isImplicit()) {
188f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner        OS << (isDef() ? "imp-def" : "imp-use");
189f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner        NeedComma = true;
190f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      } else if (isDef()) {
191f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner        OS << "def";
192f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner        NeedComma = true;
193f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      }
194f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      if (isKill() || isDead()) {
195181eb737b28628adc4376b973610a02039385026Bill Wendling        if (NeedComma) OS << ",";
196181eb737b28628adc4376b973610a02039385026Bill Wendling        if (isKill())  OS << "kill";
197181eb737b28628adc4376b973610a02039385026Bill Wendling        if (isDead())  OS << "dead";
198f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      }
199f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner      OS << ">";
200f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    }
201f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
202f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_Immediate:
203f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << getImm();
204f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
205e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman  case MachineOperand::MO_FPImmediate:
206e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman    if (getFPImm()->getType() == Type::FloatTy) {
207e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman      OS << getFPImm()->getValueAPF().convertToFloat();
208e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman    } else {
209e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman      OS << getFPImm()->getValueAPF().convertToDouble();
210e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman    }
211e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman    break;
212f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_MachineBasicBlock:
213f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << "mbb<"
2148aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner       << ((Value*)getMBB()->getBasicBlock())->getName()
2158aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner       << "," << (void*)getMBB() << ">";
216f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
217f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_FrameIndex:
2188aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner    OS << "<fi#" << getIndex() << ">";
219f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
220f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_ConstantPoolIndex:
2218aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner    OS << "<cp#" << getIndex();
222f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    if (getOffset()) OS << "+" << getOffset();
223f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << ">";
224f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
225f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_JumpTableIndex:
2268aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner    OS << "<jt#" << getIndex() << ">";
227f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
228f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_GlobalAddress:
229f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << "<ga:" << ((Value*)getGlobal())->getName();
230f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    if (getOffset()) OS << "+" << getOffset();
231f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << ">";
232f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
233f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  case MachineOperand::MO_ExternalSymbol:
234f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << "<es:" << getSymbolName();
235f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    if (getOffset()) OS << "+" << getOffset();
236f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    OS << ">";
237f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    break;
238f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  default:
239f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    assert(0 && "Unrecognized operand type");
240f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner  }
241f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner}
242f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
243f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===//
244ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman// MachineMemOperand Implementation
245ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman//===----------------------------------------------------------------------===//
246ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman
247ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan GohmanMachineMemOperand::MachineMemOperand(const Value *v, unsigned int f,
248ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman                                     int64_t o, uint64_t s, unsigned int a)
249ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman  : Offset(o), Size(s), V(v),
250ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman    Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {
251f1bf29e648a25a440d3dcf5a445b30c4129c9bcaDan Gohman  assert(isPowerOf2_32(a) && "Alignment is not a power of 2!");
252c5e1f98fdf44993c2bfe4c1ef633b2358cd718c1Dan Gohman  assert((isLoad() || isStore()) && "Not a load/store!");
253ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman}
254ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman
255b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman/// Profile - Gather unique data for the object.
256b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman///
257b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohmanvoid MachineMemOperand::Profile(FoldingSetNodeID &ID) const {
258b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman  ID.AddInteger(Offset);
259b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman  ID.AddInteger(Size);
260b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman  ID.AddPointer(V);
261b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman  ID.AddInteger(Flags);
262b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman}
263b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman
264ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman//===----------------------------------------------------------------------===//
265f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner// MachineInstr Implementation
266f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===//
267f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner
268c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// MachineInstr ctor - This constructor creates a dummy MachineInstr with
26967f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng/// TID NULL and no operands.
270c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan ChengMachineInstr::MachineInstr()
271f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner  : TID(0), NumImplicitOps(0), Parent(0) {
2722c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  // Make sure that we get added to a machine basicblock
2732c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  LeakDetector::addGarbageObject(this);
2747279122e668816bed0d4f38d3392bbab0140fad0Chris Lattner}
2757279122e668816bed0d4f38d3392bbab0140fad0Chris Lattner
27667f660cb080965ea93ed6d7265a67100f2fe38e4Evan Chengvoid MachineInstr::addImplicitDefUseOperands() {
27767f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng  if (TID->ImplicitDefs)
278a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
2798019f41c0b7fda031d494e3900eada7d4e494772Chris Lattner      addOperand(MachineOperand::CreateReg(*ImpDefs, true, true));
28067f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng  if (TID->ImplicitUses)
281a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
2828019f41c0b7fda031d494e3900eada7d4e494772Chris Lattner      addOperand(MachineOperand::CreateReg(*ImpUses, false, true));
283d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng}
284d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng
285d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng/// MachineInstr ctor - This constructor create a MachineInstr and add the
286c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// implicit operands. It reserves space for number of operands specified by
287749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner/// TargetInstrDesc or the numOperands if it is not zero. (for
288c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// instructions with variable number of operands).
289749c6f6b5ed301c84aac562e414486549d7b98ebChris LattnerMachineInstr::MachineInstr(const TargetInstrDesc &tid, bool NoImp)
290f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner  : TID(&tid), NumImplicitOps(0), Parent(0) {
291349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner  if (!NoImp && TID->getImplicitDefs())
292349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner    for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs)
293d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng      NumImplicitOps++;
294349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner  if (!NoImp && TID->getImplicitUses())
295349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner    for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses)
296d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng      NumImplicitOps++;
297349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner  Operands.reserve(NumImplicitOps + TID->getNumOperands());
298fa9457276a2174aaf302240dd32d89900ad021aeEvan Cheng  if (!NoImp)
299fa9457276a2174aaf302240dd32d89900ad021aeEvan Cheng    addImplicitDefUseOperands();
3002c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  // Make sure that we get added to a machine basicblock
3012c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  LeakDetector::addGarbageObject(this);
302d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng}
303d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng
304ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
305ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner/// MachineInstr is created and added to the end of the specified basic block.
306ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner///
307c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan ChengMachineInstr::MachineInstr(MachineBasicBlock *MBB,
308749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner                           const TargetInstrDesc &tid)
309f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner  : TID(&tid), NumImplicitOps(0), Parent(0) {
310ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner  assert(MBB && "Cannot use inserting ctor with null basic block!");
31167f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng  if (TID->ImplicitDefs)
312349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner    for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs)
313d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng      NumImplicitOps++;
31467f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng  if (TID->ImplicitUses)
315349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner    for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses)
316d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng      NumImplicitOps++;
317349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner  Operands.reserve(NumImplicitOps + TID->getNumOperands());
31867f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng  addImplicitDefUseOperands();
3192c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  // Make sure that we get added to a machine basicblock
3202c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  LeakDetector::addGarbageObject(this);
321ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner  MBB->push_back(this);  // Add instruction to end of basic block!
322ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner}
323ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner
324ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman/// MachineInstr ctor - Copies MachineInstr arg exactly
325ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman///
3261ed9922794cda9dbe295e74674b909287e544632Evan ChengMachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
3271ed9922794cda9dbe295e74674b909287e544632Evan Cheng  : TID(&MI.getDesc()), NumImplicitOps(0), Parent(0) {
328943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner  Operands.reserve(MI.getNumOperands());
329b5159ed0cb7943e5938782f7693beb18342165ceTanya Lattner
330ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman  // Add operands
3311ed9922794cda9dbe295e74674b909287e544632Evan Cheng  for (unsigned i = 0; i != MI.getNumOperands(); ++i)
3321ed9922794cda9dbe295e74674b909287e544632Evan Cheng    addOperand(MI.getOperand(i));
3331ed9922794cda9dbe295e74674b909287e544632Evan Cheng  NumImplicitOps = MI.NumImplicitOps;
3340c63e03e04d3982e1913479bba404c3debc9a27eTanya Lattner
3358e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman  // Add memory operands.
336fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman  for (std::list<MachineMemOperand>::const_iterator i = MI.memoperands_begin(),
3378e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman       j = MI.memoperands_end(); i != j; ++i)
3388e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman    addMemOperand(MF, *i);
3398e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman
3408e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman  // Set parent to null.
341f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner  Parent = 0;
3426116a73da420d9b414a34ce2599dc7f6476e23fcDan Gohman
3436116a73da420d9b414a34ce2599dc7f6476e23fcDan Gohman  LeakDetector::addGarbageObject(this);
344466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner}
345466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner
346ce22e76996d3ff0930716fa60c29df60a7e0481bMisha BrukmanMachineInstr::~MachineInstr() {
3472c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman  LeakDetector::removeGarbageObject(this);
3488e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman  assert(MemOperands.empty() &&
3498e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman         "MachineInstr being deleted with live memoperands!");
350e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner#ifndef NDEBUG
35162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
352e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner    assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
35362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    assert((!Operands[i].isReg() || !Operands[i].isOnRegUseList()) &&
35462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner           "Reg operand def/use list corrupted");
35562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
356e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner#endif
357aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos}
358aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos
35962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// getRegInfo - If this instruction is embedded into a MachineFunction,
36062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// return the MachineRegisterInfo object for the current function, otherwise
36162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// return null.
36262ed6b9ade63bf01717ce5274fa11e93e873d245Chris LattnerMachineRegisterInfo *MachineInstr::getRegInfo() {
36362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (MachineBasicBlock *MBB = getParent())
3644e526b9a5b36d9bac170c03df0a5d6fb76740ae2Dan Gohman    return &MBB->getParent()->getRegInfo();
36562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  return 0;
36662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
36762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
36862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
36962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// this instruction from their respective use lists.  This requires that the
37062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// operands already be on their use lists.
37162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::RemoveRegOperandsFromUseLists() {
37262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
37362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (Operands[i].isReg())
37462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands[i].RemoveRegOperandFromRegInfo();
37562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
37662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
37762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
37862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// AddRegOperandsToUseLists - Add all of the register operands in
37962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// this instruction from their respective use lists.  This requires that the
38062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// operands not be on their use lists yet.
38162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) {
38262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
38362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (Operands[i].isReg())
38462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands[i].AddRegOperandToRegInfo(&RegInfo);
38562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
38662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
38762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
38862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
38962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// addOperand - Add the specified operand to the instruction.  If it is an
39062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// implicit operand, it is added to the end of the operand list.  If it is
39162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// an explicit operand it is added at the end of the explicit operand list
39262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// (before the first implicit operand).
39362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::addOperand(const MachineOperand &Op) {
39462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  bool isImpReg = Op.isReg() && Op.isImplicit();
39562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  assert((isImpReg || !OperandsComplete()) &&
39662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner         "Trying to add an operand to a machine instr that is already done!");
39762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
39862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // If we are adding the operand to the end of the list, our job is simpler.
39962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // This is true most of the time, so this is a reasonable optimization.
40062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (isImpReg || NumImplicitOps == 0) {
40162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // We can only do this optimization if we know that the operand list won't
40262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // reallocate.
40362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (Operands.empty() || Operands.size()+1 <= Operands.capacity()) {
40462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands.push_back(Op);
40562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
40662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      // Set the parent of the operand.
40762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands.back().ParentMI = this;
40862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
40962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      // If the operand is a register, update the operand's use list.
41062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      if (Op.isReg())
41162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        Operands.back().AddRegOperandToRegInfo(getRegInfo());
41262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      return;
41362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    }
41462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
41562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
41662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // Otherwise, we have to insert a real operand before any implicit ones.
41762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  unsigned OpNo = Operands.size()-NumImplicitOps;
41862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
41962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  MachineRegisterInfo *RegInfo = getRegInfo();
42062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
42162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // If this instruction isn't embedded into a function, then we don't need to
42262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // update any operand lists.
42362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (RegInfo == 0) {
42462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Simple insertion, no reginfo update needed for other register operands.
42562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands.insert(Operands.begin()+OpNo, Op);
42662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands[OpNo].ParentMI = this;
42762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
42862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Do explicitly set the reginfo for this operand though, to ensure the
42962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // next/prev fields are properly nulled out.
43062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (Operands[OpNo].isReg())
43162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands[OpNo].AddRegOperandToRegInfo(0);
43262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
43362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  } else if (Operands.size()+1 <= Operands.capacity()) {
43462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Otherwise, we have to remove register operands from their register use
43562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // list, add the operand, then add the register operands back to their use
43662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // list.  This also must handle the case when the operand list reallocates
43762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // to somewhere else.
43862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
43962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // If insertion of this operand won't cause reallocation of the operand
44062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // list, just remove the implicit operands, add the operand, then re-add all
44162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // the rest of the operands.
44262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) {
44362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      assert(Operands[i].isReg() && "Should only be an implicit reg!");
44462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands[i].RemoveRegOperandFromRegInfo();
44562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    }
44662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
44762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Add the operand.  If it is a register, add it to the reg list.
44862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands.insert(Operands.begin()+OpNo, Op);
44962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands[OpNo].ParentMI = this;
45062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
45162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (Operands[OpNo].isReg())
45262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands[OpNo].AddRegOperandToRegInfo(RegInfo);
45362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
45462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Re-add all the implicit ops.
45562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    for (unsigned i = OpNo+1, e = Operands.size(); i != e; ++i) {
45662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      assert(Operands[i].isReg() && "Should only be an implicit reg!");
45762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands[i].AddRegOperandToRegInfo(RegInfo);
45862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    }
45962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  } else {
46062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Otherwise, we will be reallocating the operand list.  Remove all reg
46162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // operands from their list, then readd them after the operand list is
46262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // reallocated.
46362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    RemoveRegOperandsFromUseLists();
46462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
46562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands.insert(Operands.begin()+OpNo, Op);
46662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands[OpNo].ParentMI = this;
46762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
46862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // Re-add all the operands.
46962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    AddRegOperandsToUseLists(*RegInfo);
47062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
47162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
47262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
47362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// RemoveOperand - Erase an operand  from an instruction, leaving it with one
47462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// fewer operand than it started with.
47562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner///
47662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::RemoveOperand(unsigned OpNo) {
47762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  assert(OpNo < Operands.size() && "Invalid operand number");
47862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
47962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // Special case removing the last one.
48062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (OpNo == Operands.size()-1) {
48162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    // If needed, remove from the reg def/use list.
48262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    if (Operands.back().isReg() && Operands.back().isOnRegUseList())
48362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      Operands.back().RemoveRegOperandFromRegInfo();
48462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
48562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    Operands.pop_back();
48662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    return;
48762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
48862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
48962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // Otherwise, we are removing an interior operand.  If we have reginfo to
49062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // update, remove all operands that will be shifted down from their reg lists,
49162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  // move everything down, then re-add them.
49262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  MachineRegisterInfo *RegInfo = getRegInfo();
49362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (RegInfo) {
49462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) {
49562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      if (Operands[i].isReg())
49662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        Operands[i].RemoveRegOperandFromRegInfo();
49762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    }
49862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
49962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
50062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  Operands.erase(Operands.begin()+OpNo);
50162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
50262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  if (RegInfo) {
50362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) {
50462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner      if (Operands[i].isReg())
50562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner        Operands[i].AddRegOperandToRegInfo(RegInfo);
50662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    }
50762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  }
50862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner}
50962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
5108e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// addMemOperand - Add a MachineMemOperand to the machine instruction,
5118e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// referencing arbitrary storage.
5128e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::addMemOperand(MachineFunction &MF,
5138e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman                                 const MachineMemOperand &MO) {
514fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman  MemOperands.push_back(MO);
5158e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman}
5168e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman
5178e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
5188e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::clearMemOperands(MachineFunction &MF) {
519fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman  MemOperands.clear();
5208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman}
5218e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman
52262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner
52348d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner/// removeFromParent - This method unlinks 'this' from the containing basic
52448d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner/// block, and returns it, but does not delete it.
52548d7c069c76882475c23de153bda9483cd3c9bb4Chris LattnerMachineInstr *MachineInstr::removeFromParent() {
52648d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner  assert(getParent() && "Not embedded in a basic block!");
52748d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner  getParent()->remove(this);
52848d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner  return this;
52948d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner}
53048d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner
53148d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner
5328e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// eraseFromParent - This method unlinks 'this' from the containing basic
5338e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// block, and deletes it.
5348e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::eraseFromParent() {
5358e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman  assert(getParent() && "Not embedded in a basic block!");
5368e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman  getParent()->erase(this);
5378e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman}
5388e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman
5398e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman
54021326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke/// OperandComplete - Return true if it's illegal to add a new operand
54121326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke///
5422a90ba60175f93e7438165d8423100aa573c16c5Chris Lattnerbool MachineInstr::OperandsComplete() const {
543349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner  unsigned short NumOperands = TID->getNumOperands();
5448f707e15fbd09ca948b86419bcb0c92470827ac9Chris Lattner  if (!TID->isVariadic() && getNumOperands()-NumImplicitOps >= NumOperands)
5453497782f3843007de3be0c43e3ff206a01e2ccacVikram S. Adve    return true;  // Broken: we have all the operands of this instruction!
546413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner  return false;
54770bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve}
54870bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve
54919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// getNumExplicitOperands - Returns the number of non-implicit operands.
55019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng///
55119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Chengunsigned MachineInstr::getNumExplicitOperands() const {
552349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner  unsigned NumOperands = TID->getNumOperands();
5538f707e15fbd09ca948b86419bcb0c92470827ac9Chris Lattner  if (!TID->isVariadic())
55419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng    return NumOperands;
55519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng
55619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng  for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
55719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng    const MachineOperand &MO = getOperand(NumOperands);
55819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng    if (!MO.isRegister() || !MO.isImplicit())
55919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng      NumOperands++;
56019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng  }
56119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng  return NumOperands;
56219e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng}
56319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng
5648ace2cd034be10c09be51daf08c3dda327f54262Chris Lattner
5654406604047423576e36657c7ede266ca42e79642Dan Gohman/// isLabel - Returns true if the MachineInstr represents a label.
5664406604047423576e36657c7ede266ca42e79642Dan Gohman///
5674406604047423576e36657c7ede266ca42e79642Dan Gohmanbool MachineInstr::isLabel() const {
5684406604047423576e36657c7ede266ca42e79642Dan Gohman  return getOpcode() == TargetInstrInfo::DBG_LABEL ||
5694406604047423576e36657c7ede266ca42e79642Dan Gohman         getOpcode() == TargetInstrInfo::EH_LABEL ||
5704406604047423576e36657c7ede266ca42e79642Dan Gohman         getOpcode() == TargetInstrInfo::GC_LABEL;
5714406604047423576e36657c7ede266ca42e79642Dan Gohman}
5724406604047423576e36657c7ede266ca42e79642Dan Gohman
573bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng/// isDebugLabel - Returns true if the MachineInstr represents a debug label.
574bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng///
575bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Chengbool MachineInstr::isDebugLabel() const {
5764406604047423576e36657c7ede266ca42e79642Dan Gohman  return getOpcode() == TargetInstrInfo::DBG_LABEL;
577bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng}
578bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng
579faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
58032eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng/// the specific register or -1 if it is not found. It further tightening
58176d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng/// the search criteria to a use that kills the register if isKill is true.
5826130f66eaae89f8878590796977678afa8448926Evan Chengint MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill,
5836130f66eaae89f8878590796977678afa8448926Evan Cheng                                          const TargetRegisterInfo *TRI) const {
584576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
585f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng    const MachineOperand &MO = getOperand(i);
5866130f66eaae89f8878590796977678afa8448926Evan Cheng    if (!MO.isRegister() || !MO.isUse())
5876130f66eaae89f8878590796977678afa8448926Evan Cheng      continue;
5886130f66eaae89f8878590796977678afa8448926Evan Cheng    unsigned MOReg = MO.getReg();
5896130f66eaae89f8878590796977678afa8448926Evan Cheng    if (!MOReg)
5906130f66eaae89f8878590796977678afa8448926Evan Cheng      continue;
5916130f66eaae89f8878590796977678afa8448926Evan Cheng    if (MOReg == Reg ||
5926130f66eaae89f8878590796977678afa8448926Evan Cheng        (TRI &&
5936130f66eaae89f8878590796977678afa8448926Evan Cheng         TargetRegisterInfo::isPhysicalRegister(MOReg) &&
5946130f66eaae89f8878590796977678afa8448926Evan Cheng         TargetRegisterInfo::isPhysicalRegister(Reg) &&
5956130f66eaae89f8878590796977678afa8448926Evan Cheng         TRI->isSubRegister(MOReg, Reg)))
59676d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng      if (!isKill || MO.isKill())
59732eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng        return i;
598b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng  }
59932eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng  return -1;
600b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng}
601b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng
6026130f66eaae89f8878590796977678afa8448926Evan Cheng/// findRegisterDefOperandIdx() - Returns the operand index that is a def of
603703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// the specified register or -1 if it is not found. If isDead is true, defs
604703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// that are not dead are skipped. If TargetRegisterInfo is non-null, then it
605703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// also checks if there is a def of a super-register.
6066130f66eaae89f8878590796977678afa8448926Evan Chengint MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead,
6076130f66eaae89f8878590796977678afa8448926Evan Cheng                                          const TargetRegisterInfo *TRI) const {
608b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6096130f66eaae89f8878590796977678afa8448926Evan Cheng    const MachineOperand &MO = getOperand(i);
6106130f66eaae89f8878590796977678afa8448926Evan Cheng    if (!MO.isRegister() || !MO.isDef())
6116130f66eaae89f8878590796977678afa8448926Evan Cheng      continue;
6126130f66eaae89f8878590796977678afa8448926Evan Cheng    unsigned MOReg = MO.getReg();
6136130f66eaae89f8878590796977678afa8448926Evan Cheng    if (MOReg == Reg ||
6146130f66eaae89f8878590796977678afa8448926Evan Cheng        (TRI &&
6156130f66eaae89f8878590796977678afa8448926Evan Cheng         TargetRegisterInfo::isPhysicalRegister(MOReg) &&
6166130f66eaae89f8878590796977678afa8448926Evan Cheng         TargetRegisterInfo::isPhysicalRegister(Reg) &&
6176130f66eaae89f8878590796977678afa8448926Evan Cheng         TRI->isSubRegister(MOReg, Reg)))
6186130f66eaae89f8878590796977678afa8448926Evan Cheng      if (!isDead || MO.isDead())
6196130f66eaae89f8878590796977678afa8448926Evan Cheng        return i;
620576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng  }
6216130f66eaae89f8878590796977678afa8448926Evan Cheng  return -1;
622576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng}
62319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng
624f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// findFirstPredOperandIdx() - Find the index of the first operand in the
625f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// operand list that is used to represent the predicate. It returns -1 if
626f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// none is found.
627f277ee4be7edabb759a7f78138b693d72d0c263fEvan Chengint MachineInstr::findFirstPredOperandIdx() const {
628749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner  const TargetInstrDesc &TID = getDesc();
629749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner  if (TID.isPredicable()) {
63019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng    for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
631749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner      if (TID.OpInfo[i].isPredicate())
632f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng        return i;
63319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng  }
63419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng
635f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng  return -1;
63619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng}
637576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng
638ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng/// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
639ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng/// check if the register def is a re-definition due to two addr elimination.
640ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Chengbool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{
641749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner  const TargetInstrDesc &TID = getDesc();
642ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng  for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
643ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng    const MachineOperand &MO = getOperand(i);
644ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng    if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg &&
645ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng        TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx)
646ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng      return true;
64732dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng  }
64832dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng  return false;
64932dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng}
65032dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng
651576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
652576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng///
653576d123e130a8291669dd2384a3735cc4933fd00Evan Chengvoid MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
654576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
655576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng    const MachineOperand &MO = MI->getOperand(i);
65692dfe2001e96f6e2b6d327e8816f38033f88b295Dan Gohman    if (!MO.isRegister() || (!MO.isKill() && !MO.isDead()))
657576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng      continue;
658576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng    for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
659576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng      MachineOperand &MOp = getOperand(j);
660576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng      if (!MOp.isIdenticalTo(MO))
661576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng        continue;
662576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng      if (MO.isKill())
663576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng        MOp.setIsKill();
664576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng      else
665576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng        MOp.setIsDead();
666576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng      break;
667576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng    }
668576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng  }
669576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng}
670576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng
67119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// copyPredicates - Copies predicate operand(s) from MI.
67219e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Chengvoid MachineInstr::copyPredicates(const MachineInstr *MI) {
673749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner  const TargetInstrDesc &TID = MI->getDesc();
674b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  if (!TID.isPredicable())
675b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    return;
676b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
677b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    if (TID.OpInfo[i].isPredicate()) {
678b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng      // Predicated operands must be last operands.
679b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng      addOperand(MI->getOperand(i));
68019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng    }
68119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng  }
68219e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng}
68319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng
6849f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// isSafeToMove - Return true if it is safe to move this instruction. If
6859f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// SawStore is set to true, it means that there is a store (or call) between
6869f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// the instruction's location and its intended destination.
687b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengbool MachineInstr::isSafeToMove(const TargetInstrInfo *TII, bool &SawStore) {
688b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  // Ignore stuff that we obviously can't move.
689b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  if (TID->mayStore() || TID->isCall()) {
690b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    SawStore = true;
691b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    return false;
692b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  }
693b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  if (TID->isReturn() || TID->isBranch() || TID->hasUnmodeledSideEffects())
694b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    return false;
695b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng
696b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  // See if this instruction does a load.  If so, we have to guarantee that the
697b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  // loaded value doesn't change between the load and the its intended
698b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  // destination. The check for isInvariantLoad gives the targe the chance to
699b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  // classify the load as always returning a constant, e.g. a constant pool
700b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  // load.
701b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  if (TID->mayLoad() && !TII->isInvariantLoad(this)) {
702b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    // Otherwise, this is a real load.  If there is a store between the load and
703b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    // end of block, we can't sink the load.
704b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    //
705b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    // FIXME: we can't do this transformation until we know that the load is
706b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    // not volatile, and machineinstrs don't keep this info. :(
707b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    //
708b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    //if (SawStore)
709b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng    return false;
710b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  }
711b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng  return true;
712b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng}
713b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng
714df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng/// isSafeToReMat - Return true if it's safe to rematerialize the specified
715df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng/// instruction which defined the specified register instead of copying it.
716df3b99381f1c211071cc1daf0cc297666877bbcbEvan Chengbool MachineInstr::isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg) {
717df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng  if (!TID->isAsCheapAsAMove())
718df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    return false;
719df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng  bool SawStore = false;
720df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng  if (!isSafeToMove(TII, SawStore))
721df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    return false;
722df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
723df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    MachineOperand &MO = getOperand(i);
724df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    if (!MO.isRegister())
725df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng      continue;
726df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    // FIXME: For now, do not remat any instruction with register operands.
727df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    // Later on, we can loosen the restriction is the register operands have
728df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    // not been modified between the def and use. Note, this is different from
729df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    // MachineSink because the code in no longer in two-address form (at least
730df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    // partially).
731df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    if (MO.isUse())
732df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng      return false;
733df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng    else if (!MO.isDead() && MO.getReg() != DstReg)
734df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng      return false;
735df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng  }
736df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng  return true;
737df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng}
738df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng
73921326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaekevoid MachineInstr::dump() const {
740e81561909d128c6e2d8033cb5465a49b2596b26aBill Wendling  cerr << "  " << *this;
74170bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve}
74270bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve
743b140762a45d21aaed054f15adaff0fc2274d939dTanya Lattnervoid MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
744e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner  // Specialize printing if op#0 is definition
7456a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner  unsigned StartOp = 0;
74692dfe2001e96f6e2b6d327e8816f38033f88b295Dan Gohman  if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) {
747f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    getOperand(0).print(OS, TM);
7486a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner    OS << " = ";
7496a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner    ++StartOp;   // Don't print this operand again!
7506a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner  }
751b140762a45d21aaed054f15adaff0fc2274d939dTanya Lattner
752749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner  OS << getDesc().getName();
753edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman
7546a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner  for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
7556a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner    if (i != StartOp)
7566a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner      OS << ",";
7576a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner    OS << " ";
758f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner    getOperand(i).print(OS, TM);
7591049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner  }
760edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman
7618e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman  if (!memoperands_empty()) {
7622bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman    OS << ", Mem:";
763fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman    for (std::list<MachineMemOperand>::const_iterator i = memoperands_begin(),
7648e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman         e = memoperands_end(); i != e; ++i) {
7658e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman      const MachineMemOperand &MRO = *i;
76669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman      const Value *V = MRO.getValue();
76769de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman
76869de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman      assert((MRO.isLoad() || MRO.isStore()) &&
76969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman             "SV has to be a load, store or both.");
77069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman
77169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman      if (MRO.isVolatile())
77269de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman        OS << "Volatile ";
7732bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman
77469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman      if (MRO.isLoad())
7752bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman        OS << "LD";
77669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman      if (MRO.isStore())
7772bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman        OS << "ST";
77869de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman
779bbd8322daaefa70ba1a282956df5f977e783524bEvan Cheng      OS << "(" << MRO.getSize() << "," << MRO.getAlignment() << ") [";
78069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman
7812bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman      if (!V)
7822bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman        OS << "<unknown>";
7832bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman      else if (!V->getName().empty())
7842bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman        OS << V->getName();
785edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner      else if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V)) {
786edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner        raw_os_ostream OSS(OS);
787edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner        PSV->print(OSS);
788edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner      } else
7892bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman        OS << V;
7902bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman
7912bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman      OS << " + " << MRO.getOffset() << "]";
79269de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman    }
79369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman  }
79469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman
7951049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner  OS << "\n";
7961049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner}
7971049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner
798b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Andersonbool MachineInstr::addRegisterKilled(unsigned IncomingReg,
7996f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman                                     const TargetRegisterInfo *RegInfo,
800b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson                                     bool AddIfNotFound) {
8019b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
8022ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman  bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
8039b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  SmallVector<unsigned,4> DeadOps;
8044a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
8054a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling    MachineOperand &MO = getOperand(i);
8069b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (!MO.isRegister() || !MO.isUse())
8079b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      continue;
8089b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    unsigned Reg = MO.getReg();
8099b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (!Reg)
8109b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      continue;
8114a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling
8129b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (Reg == IncomingReg) {
8132ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman      MO.setIsKill();
8142ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman      return true;
8152ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman    }
8162ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman    if (hasAliases && MO.isKill() &&
8172ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman        TargetRegisterInfo::isPhysicalRegister(Reg)) {
8189b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      // A super-register kill already exists.
8199b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      if (RegInfo->isSuperRegister(IncomingReg, Reg))
8202ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman        return true;
8212ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman      if (RegInfo->isSubRegister(IncomingReg, Reg))
8229b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng        DeadOps.push_back(i);
823b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson    }
824b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  }
825b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson
8269b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  // Trim unneeded kill operands.
8279b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  while (!DeadOps.empty()) {
8289b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    unsigned OpIdx = DeadOps.back();
8299b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (getOperand(OpIdx).isImplicit())
8309b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      RemoveOperand(OpIdx);
8319b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    else
8329b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      getOperand(OpIdx).setIsKill(false);
8339b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    DeadOps.pop_back();
8349b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  }
8359b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng
8364a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling  // If not found, this means an alias of one of the operands is killed. Add a
837b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  // new implicit operand if required.
8382ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman  if (AddIfNotFound) {
8394a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling    addOperand(MachineOperand::CreateReg(IncomingReg,
8404a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling                                         false /*IsDef*/,
8414a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling                                         true  /*IsImp*/,
8424a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling                                         true  /*IsKill*/));
843b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson    return true;
844b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  }
8452ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman  return false;
846b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson}
847b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson
848b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Andersonbool MachineInstr::addRegisterDead(unsigned IncomingReg,
8496f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman                                   const TargetRegisterInfo *RegInfo,
850b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson                                   bool AddIfNotFound) {
8519b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
85201b2e236b571e7c22ee8493b7ea19eda9830d75cEvan Cheng  bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
8539b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  SmallVector<unsigned,4> DeadOps;
854b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
855b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson    MachineOperand &MO = getOperand(i);
8569b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (!MO.isRegister() || !MO.isDef())
8579b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      continue;
8589b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    unsigned Reg = MO.getReg();
8599b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (Reg == IncomingReg) {
8609b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      MO.setIsDead();
8612ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman      return true;
8622ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman    }
8632ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman    if (hasAliases && MO.isDead() &&
8642ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman        TargetRegisterInfo::isPhysicalRegister(Reg)) {
8659b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      // There exists a super-register that's marked dead.
8669b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      if (RegInfo->isSuperRegister(IncomingReg, Reg))
8672ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman        return true;
86822ae99908258dd5631fde7128a94c418ed08eae5Owen Anderson      if (RegInfo->getSubRegisters(IncomingReg) &&
86922ae99908258dd5631fde7128a94c418ed08eae5Owen Anderson          RegInfo->getSuperRegisters(Reg) &&
87022ae99908258dd5631fde7128a94c418ed08eae5Owen Anderson          RegInfo->isSubRegister(IncomingReg, Reg))
8719b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng        DeadOps.push_back(i);
872b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson    }
873b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  }
874b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson
8759b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  // Trim unneeded dead operands.
8769b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  while (!DeadOps.empty()) {
8779b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    unsigned OpIdx = DeadOps.back();
8789b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    if (getOperand(OpIdx).isImplicit())
8799b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      RemoveOperand(OpIdx);
8809b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    else
8819b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng      getOperand(OpIdx).setIsDead(false);
8829b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng    DeadOps.pop_back();
8839b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng  }
8849b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng
885b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  // If not found, this means an alias of one of the operand is dead. Add a
886b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  // new implicit operand.
8872ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman  if (AddIfNotFound) {
888b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson    addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/,
889b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson                                         true/*IsImp*/,false/*IsKill*/,
890b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson                                         true/*IsDead*/));
891b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson    return true;
892b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson  }
8932ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman  return false;
894b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson}
895