MachineInstr.cpp revision e837dead3c8dc3445ef6a0e2322179c57e264a13
1b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===-- lib/CodeGen/MachineInstr.cpp --------------------------------------===// 2c69afcec261fc345fda8daf46f0ea6b4351dc777Jean-Baptiste Queru// 3b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// The LLVM Compiler Infrastructure 4b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// 5b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// This file is distributed under the University of Illinois Open Source 6b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// License. See LICENSE.TXT for details. 7b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// 8b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 9b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// 10b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// Methods common to all machine instructions. 11b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// 12b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 13b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 14b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/CodeGen/MachineInstr.h" 15b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Constants.h" 16b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Function.h" 17b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/InlineAsm.h" 18b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Metadata.h" 19b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Type.h" 20b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Value.h" 21b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Assembly/Writer.h" 22b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/CodeGen/MachineConstantPool.h" 23b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/CodeGen/MachineFunction.h" 24b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/CodeGen/MachineMemOperand.h" 25b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/CodeGen/MachineRegisterInfo.h" 26b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/CodeGen/PseudoSourceValue.h" 27b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/MC/MCInstrDesc.h" 28b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/MC/MCSymbol.h" 29b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Target/TargetMachine.h" 30b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Target/TargetInstrInfo.h" 31b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Target/TargetRegisterInfo.h" 32b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Analysis/AliasAnalysis.h" 33b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Analysis/DebugInfo.h" 34b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Support/Debug.h" 35b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Support/ErrorHandling.h" 36b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Support/LeakDetector.h" 37b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Support/MathExtras.h" 38b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/Support/raw_ostream.h" 39b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#include "llvm/ADT/FoldingSet.h" 40b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruusing namespace llvm; 41b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 42b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 43b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// MachineOperand Implementation 44b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 45b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 46b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// AddRegOperandToRegInfo - Add this register operand to the specified 47b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineRegisterInfo. If it is null, then the next/prev fields should be 48b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// explicitly nulled out. 49b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) { 50b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(isReg() && "Can only add reg operand to use lists"); 51b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 52b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the reginfo pointer is null, just explicitly null out or next/prev 53b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // pointers, to ensure they are not garbage. 54b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (RegInfo == 0) { 55b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Prev = 0; 56b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Next = 0; 57b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return; 58b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 59b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 60b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, add this operand to the head of the registers use/def list. 61b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg()); 62b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 63b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // For SSA values, we prefer to keep the definition at the start of the list. 64b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // we do this by skipping over the definition if it is at the head of the 65b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // list. 66b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (*Head && (*Head)->isDef()) 67b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Head = &(*Head)->Contents.Reg.Next; 68b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 69b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Next = *Head; 70b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Contents.Reg.Next) { 71b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(getReg() == Contents.Reg.Next->getReg() && 72b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru "Different regs on the same list!"); 73b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Next->Contents.Reg.Prev = &Contents.Reg.Next; 74b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 75b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 76b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Prev = Head; 77b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru *Head = this; 78b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 79b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 80b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// RemoveRegOperandFromRegInfo - Remove this register operand from the 81b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineRegisterInfo it is linked with. 82b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::RemoveRegOperandFromRegInfo() { 83b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(isOnRegUseList() && "Reg operand is not on a use list"); 84b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Unlink this from the doubly linked list of operands. 85b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineOperand *NextOp = Contents.Reg.Next; 86b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru *Contents.Reg.Prev = NextOp; 87b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (NextOp) { 88b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(NextOp->getReg() == getReg() && "Corrupt reg use/def chain!"); 89b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NextOp->Contents.Reg.Prev = Contents.Reg.Prev; 90b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 91b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Prev = 0; 92b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.Reg.Next = 0; 93b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 94b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 95b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::setReg(unsigned Reg) { 96b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getReg() == Reg) return; // No change. 97b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 98b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, we have to change the register. If this operand is embedded 99b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // into a machine function, we need to update the old and new register's 100b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // use/def lists. 101b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineInstr *MI = getParent()) 102b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineBasicBlock *MBB = MI->getParent()) 103b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineFunction *MF = MBB->getParent()) { 104b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru RemoveRegOperandFromRegInfo(); 105b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru SmallContents.RegNo = Reg; 106b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru AddRegOperandToRegInfo(&MF->getRegInfo()); 107b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return; 108b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 109b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 110b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, just change the register, no problem. :) 111b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru SmallContents.RegNo = Reg; 112b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 113b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 114b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::substVirtReg(unsigned Reg, unsigned SubIdx, 115b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const TargetRegisterInfo &TRI) { 116b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(TargetRegisterInfo::isVirtualRegister(Reg)); 117b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (SubIdx && getSubReg()) 118b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg()); 119b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru setReg(Reg); 120b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (SubIdx) 121b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru setSubReg(SubIdx); 122b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 123b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 124b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::substPhysReg(unsigned Reg, const TargetRegisterInfo &TRI) { 125b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(TargetRegisterInfo::isPhysicalRegister(Reg)); 126b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getSubReg()) { 127b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Reg = TRI.getSubReg(Reg, getSubReg()); 128b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Note that getSubReg() may return 0 if the sub-register doesn't exist. 129b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // That won't happen in legal code. 130b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru setSubReg(0); 131b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 132b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru setReg(Reg); 133b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 134b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 135b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// ChangeToImmediate - Replace this operand with a new immediate operand of 136b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the specified value. If an operand is known to be an immediate already, 137b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the setImm method should be used. 138b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::ChangeToImmediate(int64_t ImmVal) { 139b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If this operand is currently a register operand, and if this is in a 140b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // function, deregister the operand from the register's use/def list. 141b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isReg() && getParent() && getParent()->getParent() && 142b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getParent()->getParent()->getParent()) 143b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru RemoveRegOperandFromRegInfo(); 144b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 145b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OpKind = MO_Immediate; 146b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Contents.ImmVal = ImmVal; 147b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 148b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 149b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// ChangeToRegister - Replace this operand with a new register operand of 150b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the specified value. If an operand is known to be an register already, 151b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the setReg method should be used. 152b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, 153b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool isKill, bool isDead, bool isUndef, 154b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool isDebug) { 155b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If this operand is already a register operand, use setReg to update the 156b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // register's use/def lists. 157b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isReg()) { 158b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(!isEarlyClobber()); 159b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru setReg(Reg); 160b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } else { 161b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, change this to a register and set the reg#. 162b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OpKind = MO_Register; 163b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru SmallContents.RegNo = Reg; 164b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 165b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If this operand is embedded in a function, add the operand to the 166b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // register's use/def list. 167b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineInstr *MI = getParent()) 168b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineBasicBlock *MBB = MI->getParent()) 169b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineFunction *MF = MBB->getParent()) 170b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru AddRegOperandToRegInfo(&MF->getRegInfo()); 171b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 172b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 173b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsDef = isDef; 174b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsImp = isImp; 175b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsKill = isKill; 176b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsDead = isDead; 177b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsUndef = isUndef; 178b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsEarlyClobber = false; 179b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru IsDebug = isDebug; 180b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru SubReg = 0; 181b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 182b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 183b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// isIdenticalTo - Return true if this operand is identical to the specified 184b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// operand. 185b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querubool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { 186b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getType() != Other.getType() || 187b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getTargetFlags() != Other.getTargetFlags()) 188b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 189b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 190b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru switch (getType()) { 191b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru default: llvm_unreachable("Unrecognized operand type"); 192b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_Register: 193b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getReg() == Other.getReg() && isDef() == Other.isDef() && 194b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getSubReg() == Other.getSubReg(); 195b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_Immediate: 196b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getImm() == Other.getImm(); 197b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_FPImmediate: 198b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getFPImm() == Other.getFPImm(); 199b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_MachineBasicBlock: 200b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getMBB() == Other.getMBB(); 201b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_FrameIndex: 202b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getIndex() == Other.getIndex(); 203b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_ConstantPoolIndex: 204b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getIndex() == Other.getIndex() && getOffset() == Other.getOffset(); 205b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_JumpTableIndex: 206b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getIndex() == Other.getIndex(); 207b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_GlobalAddress: 208b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset(); 209b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_ExternalSymbol: 210b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return !strcmp(getSymbolName(), Other.getSymbolName()) && 211b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getOffset() == Other.getOffset(); 212b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_BlockAddress: 213b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getBlockAddress() == Other.getBlockAddress(); 214b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_MCSymbol: 215b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getMCSymbol() == Other.getMCSymbol(); 216b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_Metadata: 217b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return getMetadata() == Other.getMetadata(); 218b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 219b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 220b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 221b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// print - Print the specified machine operand. 222b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 223b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const { 224b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the instruction is embedded into a basic block, we can find the 225b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // target info for the instruction. 226b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!TM) 227b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (const MachineInstr *MI = getParent()) 228b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (const MachineBasicBlock *MBB = MI->getParent()) 229b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (const MachineFunction *MF = MBB->getParent()) 230b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TM = &MF->getTarget(); 231b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const TargetRegisterInfo *TRI = TM ? TM->getRegisterInfo() : 0; 232b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 233b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru switch (getType()) { 234b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_Register: 235b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << PrintReg(getReg(), TRI, getSubReg()); 236b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 237b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || 238b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru isEarlyClobber()) { 239b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '<'; 240b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool NeedComma = false; 241b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isDef()) { 242b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (NeedComma) OS << ','; 243b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isEarlyClobber()) 244b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "earlyclobber,"; 245b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isImplicit()) 246b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "imp-"; 247b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "def"; 248b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NeedComma = true; 249b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } else if (isImplicit()) { 250b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "imp-use"; 251b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NeedComma = true; 252b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 253b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 254b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isKill() || isDead() || isUndef()) { 255b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (NeedComma) OS << ','; 256b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isKill()) OS << "kill"; 257b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isDead()) OS << "dead"; 258b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isUndef()) { 259b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isKill() || isDead()) 260b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << ','; 261b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "undef"; 262b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 263b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 264b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '>'; 265b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 266b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 267b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_Immediate: 268b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << getImm(); 269b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 270b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_CImmediate: 271b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getCImm()->getValue().print(OS, false); 272b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 273b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_FPImmediate: 274b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getFPImm()->getType()->isFloatTy()) 275b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << getFPImm()->getValueAPF().convertToFloat(); 276b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else 277b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << getFPImm()->getValueAPF().convertToDouble(); 278b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 279b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_MachineBasicBlock: 280b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<BB#" << getMBB()->getNumber() << ">"; 281b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 282b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_FrameIndex: 283b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<fi#" << getIndex() << '>'; 284b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 285b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_ConstantPoolIndex: 286b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<cp#" << getIndex(); 287b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getOffset()) OS << "+" << getOffset(); 288b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '>'; 289b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 290b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_JumpTableIndex: 291b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<jt#" << getIndex() << '>'; 292b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 293b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_GlobalAddress: 294b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<ga:"; 295b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru WriteAsOperand(OS, getGlobal(), /*PrintType=*/false); 296b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getOffset()) OS << "+" << getOffset(); 297b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '>'; 298b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 299b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_ExternalSymbol: 300b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<es:" << getSymbolName(); 301b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (getOffset()) OS << "+" << getOffset(); 302b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '>'; 303b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 304b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_BlockAddress: 305b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '<'; 306b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru WriteAsOperand(OS, getBlockAddress(), /*PrintType=*/false); 307b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '>'; 308b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 309b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_Metadata: 310b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '<'; 311b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru WriteAsOperand(OS, getMetadata(), /*PrintType=*/false); 312b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << '>'; 313b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 314b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru case MachineOperand::MO_MCSymbol: 315b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<MCSym=" << *getMCSymbol() << '>'; 316b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 317b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru default: 318b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru llvm_unreachable("Unrecognized operand type"); 319b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 320b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 321b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (unsigned TF = getTargetFlags()) 322b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "[TF=" << TF << ']'; 323b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 324b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 325b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 326b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// MachineMemOperand Implementation 327b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 328b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 329b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// getAddrSpace - Return the LLVM IR address space number that this pointer 330b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// points into. 331b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruunsigned MachinePointerInfo::getAddrSpace() const { 332b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (V == 0) return 0; 333b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return cast<PointerType>(V->getType())->getAddressSpace(); 334b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 335b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 336b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// getConstantPool - Return a MachinePointerInfo record that refers to the 337b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// constant pool. 338b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachinePointerInfo MachinePointerInfo::getConstantPool() { 339b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return MachinePointerInfo(PseudoSourceValue::getConstantPool()); 340b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 341b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 342b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// getFixedStack - Return a MachinePointerInfo record that refers to the 343b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the specified FrameIndex. 344b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachinePointerInfo MachinePointerInfo::getFixedStack(int FI, int64_t offset) { 345b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return MachinePointerInfo(PseudoSourceValue::getFixedStack(FI), offset); 346b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 347b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 348b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachinePointerInfo MachinePointerInfo::getJumpTable() { 349b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return MachinePointerInfo(PseudoSourceValue::getJumpTable()); 350b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 351b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 352b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachinePointerInfo MachinePointerInfo::getGOT() { 353b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return MachinePointerInfo(PseudoSourceValue::getGOT()); 354b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 355b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 356b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachinePointerInfo MachinePointerInfo::getStack(int64_t Offset) { 357b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return MachinePointerInfo(PseudoSourceValue::getStack(), Offset); 358b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 359b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 360b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, unsigned f, 361b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru uint64_t s, unsigned int a, 362b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MDNode *TBAAInfo) 363b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : PtrInfo(ptrinfo), Size(s), 364b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Flags((f & ((1 << MOMaxBits) - 1)) | ((Log2_32(a) + 1) << MOMaxBits)), 365b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TBAAInfo(TBAAInfo) { 366b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert((PtrInfo.V == 0 || isa<PointerType>(PtrInfo.V->getType())) && 367b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru "invalid pointer value"); 368b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(getBaseAlignment() == a && "Alignment is not a power of 2!"); 369b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert((isLoad() || isStore()) && "Not a load/store!"); 370b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 371b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 372b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// Profile - Gather unique data for the object. 373b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 374b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineMemOperand::Profile(FoldingSetNodeID &ID) const { 375b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ID.AddInteger(getOffset()); 376b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ID.AddInteger(Size); 377b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ID.AddPointer(getValue()); 378b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ID.AddInteger(Flags); 379b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 380b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 381b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) { 382b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // The Value and Offset may differ due to CSE. But the flags and size 383b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // should be the same. 384b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(MMO->getFlags() == getFlags() && "Flags mismatch!"); 385b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(MMO->getSize() == getSize() && "Size mismatch!"); 386b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 387b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO->getBaseAlignment() >= getBaseAlignment()) { 388b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Update the alignment value. 389b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Flags = (Flags & ((1 << MOMaxBits) - 1)) | 390b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ((Log2_32(MMO->getBaseAlignment()) + 1) << MOMaxBits); 391b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Also update the base and offset, because the new alignment may 392b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // not be applicable with the old ones. 393b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru PtrInfo = MMO->PtrInfo; 394b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 395b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 396b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 397b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// getAlignment - Return the minimum known alignment in bytes of the 398b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// actual memory reference. 399b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruuint64_t MachineMemOperand::getAlignment() const { 400b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return MinAlign(getBaseAlignment(), getOffset()); 401b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 402b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 403b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruraw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) { 404b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert((MMO.isLoad() || MMO.isStore()) && 405b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru "SV has to be a load, store or both."); 406b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 407b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.isVolatile()) 408b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "Volatile "; 409b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 410b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.isLoad()) 411b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "LD"; 412b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.isStore()) 413b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "ST"; 414b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << MMO.getSize(); 415b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 416b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Print the address information. 417b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "["; 418b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MMO.getValue()) 419b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<unknown>"; 420b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else 421b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru WriteAsOperand(OS, MMO.getValue(), /*PrintType=*/false); 422b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 423b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the alignment of the memory reference itself differs from the alignment 424b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // of the base pointer, print the base alignment explicitly, next to the base 425b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // pointer. 426b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.getBaseAlignment() != MMO.getAlignment()) 427b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "(align=" << MMO.getBaseAlignment() << ")"; 428b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 429b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.getOffset() != 0) 430b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "+" << MMO.getOffset(); 431b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "]"; 432b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 433b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Print the alignment of the reference. 434b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.getBaseAlignment() != MMO.getAlignment() || 435b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MMO.getBaseAlignment() != MMO.getSize()) 436b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "(align=" << MMO.getAlignment() << ")"; 437b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 438b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Print TBAA info. 439b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (const MDNode *TBAAInfo = MMO.getTBAAInfo()) { 440b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "(tbaa="; 441b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (TBAAInfo->getNumOperands() > 0) 442b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru WriteAsOperand(OS, TBAAInfo->getOperand(0), /*PrintType=*/false); 443b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else 444b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "<unknown>"; 445b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << ")"; 446b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 447b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 448b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Print nontemporal info. 449b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MMO.isNonTemporal()) 450b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru OS << "(nontemporal)"; 451b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 452b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return OS; 453b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 454b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 455b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 456b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru// MachineInstr Implementation 457b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru//===----------------------------------------------------------------------===// 458b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 459b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineInstr ctor - This constructor creates a dummy MachineInstr with 460b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MCID NULL and no operands. 461b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::MachineInstr() 462b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : MCID(0), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), 463b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs(0), MemRefsEnd(0), 464b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Parent(0) { 465b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Make sure that we get added to a machine basicblock 466b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::addGarbageObject(this); 467b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 468b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 469b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::addImplicitDefUseOperands() { 470b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID->ImplicitDefs) 471b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (const unsigned *ImpDefs = MCID->ImplicitDefs; *ImpDefs; ++ImpDefs) 472b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addOperand(MachineOperand::CreateReg(*ImpDefs, true, true)); 473b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID->ImplicitUses) 474b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (const unsigned *ImpUses = MCID->ImplicitUses; *ImpUses; ++ImpUses) 475b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addOperand(MachineOperand::CreateReg(*ImpUses, false, true)); 476b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 477b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 478b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineInstr ctor - This constructor creates a MachineInstr and adds the 479b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// implicit operands. It reserves space for the number of operands specified by 480b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the MCInstrDesc. 481b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::MachineInstr(const MCInstrDesc &tid, bool NoImp) 482b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : MCID(&tid), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), 483b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs(0), MemRefsEnd(0), Parent(0) { 484b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!NoImp) 485b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumImplicitOps = MCID->getNumImplicitDefs() + MCID->getNumImplicitUses(); 486b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 487b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!NoImp) 488b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addImplicitDefUseOperands(); 489b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Make sure that we get added to a machine basicblock 490b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::addGarbageObject(this); 491b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 492b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 493b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineInstr ctor - As above, but with a DebugLoc. 494b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::MachineInstr(const MCInstrDesc &tid, const DebugLoc dl, 495b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool NoImp) 496b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : MCID(&tid), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), 497b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs(0), MemRefsEnd(0), Parent(0), debugLoc(dl) { 498b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!NoImp) 499b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumImplicitOps = MCID->getNumImplicitDefs() + MCID->getNumImplicitUses(); 500b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 501b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!NoImp) 502b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addImplicitDefUseOperands(); 503b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Make sure that we get added to a machine basicblock 504b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::addGarbageObject(this); 505b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 506b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 507b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineInstr ctor - Work exactly the same as the ctor two above, except 508b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// that the MachineInstr is created and added to the end of the specified 509b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// basic block. 510b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::MachineInstr(MachineBasicBlock *MBB, const MCInstrDesc &tid) 511b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : MCID(&tid), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), 512b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs(0), MemRefsEnd(0), Parent(0) { 513b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(MBB && "Cannot use inserting ctor with null basic block!"); 514b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumImplicitOps = MCID->getNumImplicitDefs() + MCID->getNumImplicitUses(); 515b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 516b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addImplicitDefUseOperands(); 517b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Make sure that we get added to a machine basicblock 518b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::addGarbageObject(this); 519b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MBB->push_back(this); // Add instruction to end of basic block! 520b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 521b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 522b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineInstr ctor - As above, but with a DebugLoc. 523b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 524b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl, 525b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MCInstrDesc &tid) 526b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : MCID(&tid), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), 527b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs(0), MemRefsEnd(0), Parent(0), debugLoc(dl) { 528b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(MBB && "Cannot use inserting ctor with null basic block!"); 529b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumImplicitOps = MCID->getNumImplicitDefs() + MCID->getNumImplicitUses(); 530b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.reserve(NumImplicitOps + MCID->getNumOperands()); 531b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addImplicitDefUseOperands(); 532b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Make sure that we get added to a machine basicblock 533b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::addGarbageObject(this); 534b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MBB->push_back(this); // Add instruction to end of basic block! 535b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 536b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 537b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// MachineInstr ctor - Copies MachineInstr arg exactly 538b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 539b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) 540b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru : MCID(&MI.getDesc()), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), 541b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs(MI.MemRefs), MemRefsEnd(MI.MemRefsEnd), 542b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Parent(0), debugLoc(MI.getDebugLoc()) { 543b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.reserve(MI.getNumOperands()); 544b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 545b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Add operands 546b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0; i != MI.getNumOperands(); ++i) 547b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addOperand(MI.getOperand(i)); 548b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumImplicitOps = MI.NumImplicitOps; 549b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 550b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Copy all the flags. 551b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Flags = MI.Flags; 552b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 553b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Set parent to null. 554b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Parent = 0; 555b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 556b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::addGarbageObject(this); 557b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 558b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 559b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::~MachineInstr() { 560b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru LeakDetector::removeGarbageObject(this); 561b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#ifndef NDEBUG 562b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 563b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(Operands[i].ParentMI == this && "ParentMI mismatch!"); 564b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert((!Operands[i].isReg() || !Operands[i].isOnRegUseList()) && 565b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru "Reg operand def/use list corrupted"); 566b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 567b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru#endif 568b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 569b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 570b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// getRegInfo - If this instruction is embedded into a MachineFunction, 571b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// return the MachineRegisterInfo object for the current function, otherwise 572b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// return null. 573b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineRegisterInfo *MachineInstr::getRegInfo() { 574b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MachineBasicBlock *MBB = getParent()) 575b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return &MBB->getParent()->getRegInfo(); 576b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return 0; 577b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 578b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 579b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 580b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// this instruction from their respective use lists. This requires that the 581b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// operands already be on their use lists. 582b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::RemoveRegOperandsFromUseLists() { 583b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 584b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[i].isReg()) 585b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[i].RemoveRegOperandFromRegInfo(); 586b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 587b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 588b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 589b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// AddRegOperandsToUseLists - Add all of the register operands in 590b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// this instruction from their respective use lists. This requires that the 591b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// operands not be on their use lists yet. 592b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) { 593b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 594b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[i].isReg()) 595b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[i].AddRegOperandToRegInfo(&RegInfo); 596b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 597b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 598b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 599b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 600b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// addOperand - Add the specified operand to the instruction. If it is an 601b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// implicit operand, it is added to the end of the operand list. If it is 602b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// an explicit operand it is added at the end of the explicit operand list 603b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// (before the first implicit operand). 604b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::addOperand(const MachineOperand &Op) { 605b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool isImpReg = Op.isReg() && Op.isImplicit(); 606b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert((isImpReg || !OperandsComplete()) && 607b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru "Trying to add an operand to a machine instr that is already done!"); 608b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 609b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineRegisterInfo *RegInfo = getRegInfo(); 610b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 611b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If we are adding the operand to the end of the list, our job is simpler. 612b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // This is true most of the time, so this is a reasonable optimization. 613b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isImpReg || NumImplicitOps == 0) { 614b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // We can only do this optimization if we know that the operand list won't 615b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // reallocate. 616b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands.empty() || Operands.size()+1 <= Operands.capacity()) { 617b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.push_back(Op); 618b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 619b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Set the parent of the operand. 620b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.back().ParentMI = this; 621b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 622b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the operand is a register, update the operand's use list. 623b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Op.isReg()) { 624b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.back().AddRegOperandToRegInfo(RegInfo); 625b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the register operand is flagged as early, mark the operand as such 626b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned OpNo = Operands.size() - 1; 627b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) 628b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].setIsEarlyClobber(true); 629b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 630b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return; 631b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 632b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 633b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 634b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, we have to insert a real operand before any implicit ones. 635b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned OpNo = Operands.size()-NumImplicitOps; 636b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 637b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If this instruction isn't embedded into a function, then we don't need to 638b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // update any operand lists. 639b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (RegInfo == 0) { 640b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Simple insertion, no reginfo update needed for other register operands. 641b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.insert(Operands.begin()+OpNo, Op); 642b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].ParentMI = this; 643b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 644b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Do explicitly set the reginfo for this operand though, to ensure the 645b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // next/prev fields are properly nulled out. 646b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[OpNo].isReg()) { 647b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].AddRegOperandToRegInfo(0); 648b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the register operand is flagged as early, mark the operand as such 649b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) 650b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].setIsEarlyClobber(true); 651b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 652b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 653b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } else if (Operands.size()+1 <= Operands.capacity()) { 654b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, we have to remove register operands from their register use 655b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // list, add the operand, then add the register operands back to their use 656b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // list. This also must handle the case when the operand list reallocates 657b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // to somewhere else. 658b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 659b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If insertion of this operand won't cause reallocation of the operand 660b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // list, just remove the implicit operands, add the operand, then re-add all 661b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // the rest of the operands. 662b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 663b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(Operands[i].isReg() && "Should only be an implicit reg!"); 664b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[i].RemoveRegOperandFromRegInfo(); 665b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 666b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 667b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Add the operand. If it is a register, add it to the reg list. 668b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.insert(Operands.begin()+OpNo, Op); 669b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].ParentMI = this; 670b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 671b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[OpNo].isReg()) { 672b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].AddRegOperandToRegInfo(RegInfo); 673b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the register operand is flagged as early, mark the operand as such 674b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) 675b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].setIsEarlyClobber(true); 676b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 677b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 678b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Re-add all the implicit ops. 679b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = OpNo+1, e = Operands.size(); i != e; ++i) { 680b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(Operands[i].isReg() && "Should only be an implicit reg!"); 681b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[i].AddRegOperandToRegInfo(RegInfo); 682b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 683b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } else { 684b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, we will be reallocating the operand list. Remove all reg 685b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // operands from their list, then readd them after the operand list is 686b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // reallocated. 687b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru RemoveRegOperandsFromUseLists(); 688b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 689b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.insert(Operands.begin()+OpNo, Op); 690b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].ParentMI = this; 691b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 692b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Re-add all the operands. 693b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru AddRegOperandsToUseLists(*RegInfo); 694b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 695b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If the register operand is flagged as early, mark the operand as such 696b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[OpNo].isReg() 697b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru && MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) 698b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[OpNo].setIsEarlyClobber(true); 699b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 700b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 701b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 702b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// RemoveOperand - Erase an operand from an instruction, leaving it with one 703b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// fewer operand than it started with. 704b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 705b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::RemoveOperand(unsigned OpNo) { 706b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(OpNo < Operands.size() && "Invalid operand number"); 707b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 708b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Special case removing the last one. 709b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (OpNo == Operands.size()-1) { 710b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If needed, remove from the reg def/use list. 711b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands.back().isReg() && Operands.back().isOnRegUseList()) 712b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.back().RemoveRegOperandFromRegInfo(); 713b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 714b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.pop_back(); 715b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return; 716b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 717b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 718b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Otherwise, we are removing an interior operand. If we have reginfo to 719b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // update, remove all operands that will be shifted down from their reg lists, 720b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // move everything down, then re-add them. 721b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineRegisterInfo *RegInfo = getRegInfo(); 722b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (RegInfo) { 723b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 724b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[i].isReg()) 725b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[i].RemoveRegOperandFromRegInfo(); 726b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 727b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 728b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 729b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands.erase(Operands.begin()+OpNo); 730b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 731b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (RegInfo) { 732b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 733b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Operands[i].isReg()) 734b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Operands[i].AddRegOperandToRegInfo(RegInfo); 735b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 736b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 737b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 738b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 739b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// addMemOperand - Add a MachineMemOperand to the machine instruction. 740b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// This function should be used only occasionally. The setMemRefs function 741b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// is the primary method for setting up a MachineInstr's MemRefs list. 742b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::addMemOperand(MachineFunction &MF, 743b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineMemOperand *MO) { 744b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru mmo_iterator OldMemRefs = MemRefs; 745b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru mmo_iterator OldMemRefsEnd = MemRefsEnd; 746b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 747c69afcec261fc345fda8daf46f0ea6b4351dc777Jean-Baptiste Queru size_t NewNum = (MemRefsEnd - MemRefs) + 1; 748b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru mmo_iterator NewMemRefs = MF.allocateMemRefsArray(NewNum); 749b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru mmo_iterator NewMemRefsEnd = NewMemRefs + NewNum; 750b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 751b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru std::copy(OldMemRefs, OldMemRefsEnd, NewMemRefs); 752c69afcec261fc345fda8daf46f0ea6b4351dc777Jean-Baptiste Queru NewMemRefs[NewNum - 1] = MO; 753b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 754b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefs = NewMemRefs; 755b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MemRefsEnd = NewMemRefsEnd; 756b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 757b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 758b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querubool MachineInstr::isIdenticalTo(const MachineInstr *Other, 759b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MICheckType Check) const { 760b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // If opcodes or number of operands are not the same then the two 761b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // instructions are obviously not identical. 762b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Other->getOpcode() != getOpcode() || 763b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Other->getNumOperands() != getNumOperands()) 764b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 765b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 766b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Check operands to make sure they match. 767b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 768b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(i); 769b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &OMO = Other->getOperand(i); 770b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg()) { 771b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isIdenticalTo(OMO)) 772b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 773b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 774b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 775b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 776b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Clients may or may not want to ignore defs when testing for equality. 777b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // For example, machine CSE pass only cares about finding common 778b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // subexpressions, so it's safe to ignore virtual register defs. 779b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MO.isDef()) { 780b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Check == IgnoreDefs) 781b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 782b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else if (Check == IgnoreVRegDefs) { 783b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) || 784b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TargetRegisterInfo::isPhysicalRegister(OMO.getReg())) 785b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MO.getReg() != OMO.getReg()) 786b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 787b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } else { 788b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isIdenticalTo(OMO)) 789b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 790b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Check == CheckKillDead && MO.isDead() != OMO.isDead()) 791b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 792b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 793b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } else { 794b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isIdenticalTo(OMO)) 795b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 796b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Check == CheckKillDead && MO.isKill() != OMO.isKill()) 797b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 798b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 799b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 800b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 801b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 802b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 803b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// removeFromParent - This method unlinks 'this' from the containing basic 804b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// block, and returns it, but does not delete it. 805b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr *MachineInstr::removeFromParent() { 806b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(getParent() && "Not embedded in a basic block!"); 807b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getParent()->remove(this); 808b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return this; 809b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 810b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 811b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 812b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// eraseFromParent - This method unlinks 'this' from the containing basic 813b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// block, and deletes it. 814b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::eraseFromParent() { 815b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(getParent() && "Not embedded in a basic block!"); 816b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru getParent()->erase(this); 817b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 818b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 819b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 820b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// OperandComplete - Return true if it's illegal to add a new operand 821b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 822b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querubool MachineInstr::OperandsComplete() const { 823b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned short NumOperands = MCID->getNumOperands(); 824b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MCID->isVariadic() && getNumOperands()-NumImplicitOps >= NumOperands) 825b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; // Broken: we have all the operands of this instruction! 826b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 827b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 828b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 829b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// getNumExplicitOperands - Returns the number of non-implicit operands. 830b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 831b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruunsigned MachineInstr::getNumExplicitOperands() const { 832b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned NumOperands = MCID->getNumOperands(); 833b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MCID->isVariadic()) 834b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return NumOperands; 835b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 836b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = NumOperands, e = getNumOperands(); i != e; ++i) { 837b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(i); 838b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || !MO.isImplicit()) 839b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumOperands++; 840b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 841b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return NumOperands; 842b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 843b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 844b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querubool MachineInstr::isStackAligningInlineAsm() const { 845b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isInlineAsm()) { 846b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm(); 847b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (ExtraInfo & InlineAsm::Extra_IsAlignStack) 848b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 849b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 850b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 851b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 852b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 853b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of 854b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the specific register or -1 if it is not found. It further tightens 855b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the search criteria to a use that kills the register if isKill is true. 856b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruint MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, 857b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const TargetRegisterInfo *TRI) const { 858b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 859b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(i); 860b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || !MO.isUse()) 861b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 862b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned MOReg = MO.getReg(); 863b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MOReg) 864b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 865b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MOReg == Reg || 866b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru (TRI && 867b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TargetRegisterInfo::isPhysicalRegister(MOReg) && 868b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TargetRegisterInfo::isPhysicalRegister(Reg) && 869b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TRI->isSubRegister(MOReg, Reg))) 870b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!isKill || MO.isKill()) 871b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return i; 872b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 873b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return -1; 874b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 875b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 876b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// readsWritesVirtualRegister - Return a pair of bools (reads, writes) 877b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// indicating if this instruction reads or writes Reg. This also considers 878b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// partial defines. 879b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querustd::pair<bool,bool> 880b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::readsWritesVirtualRegister(unsigned Reg, 881b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru SmallVectorImpl<unsigned> *Ops) const { 882b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool PartDef = false; // Partial redefine. 883b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool FullDef = false; // Full define. 884b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool Use = false; 885b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 886b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 887b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(i); 888b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || MO.getReg() != Reg) 889b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 890b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Ops) 891b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Ops->push_back(i); 892b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MO.isUse()) 893b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Use |= !MO.isUndef(); 894b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else if (MO.getSubReg()) 895b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru PartDef = true; 896b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else 897b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru FullDef = true; 898b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 899b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // A partial redefine uses Reg unless there is also a full define. 900b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return std::make_pair(Use || (PartDef && !FullDef), PartDef || FullDef); 901b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 902b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 903b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// findRegisterDefOperandIdx() - Returns the operand index that is a def of 904b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// the specified register or -1 if it is not found. If isDead is true, defs 905b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// that are not dead are skipped. If TargetRegisterInfo is non-null, then it 906b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// also checks if there is a def of a super-register. 907b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruint 908b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruMachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, 909b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const TargetRegisterInfo *TRI) const { 910b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool isPhys = TargetRegisterInfo::isPhysicalRegister(Reg); 911b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 912b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(i); 913b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || !MO.isDef()) 914b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 915b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned MOReg = MO.getReg(); 916b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru bool Found = (MOReg == Reg); 917b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!Found && TRI && isPhys && 918b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru TargetRegisterInfo::isPhysicalRegister(MOReg)) { 919b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Overlap) 920b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Found = TRI->regsOverlap(MOReg, Reg); 921b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else 922b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Found = TRI->isSubRegister(MOReg, Reg); 923b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 924b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (Found && (!isDead || MO.isDead())) 925b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return i; 926b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 927b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return -1; 928b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 929b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 930b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// findFirstPredOperandIdx() - Find the index of the first operand in the 931b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// operand list that is used to represent the predicate. It returns -1 if 932b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// none is found. 933b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruint MachineInstr::findFirstPredOperandIdx() const { 934b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MCInstrDesc &MCID = getDesc(); 935b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID.isPredicable()) { 936b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 937b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID.OpInfo[i].isPredicate()) 938b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return i; 939b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 940b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 941b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return -1; 942b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 943b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 944b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// isRegTiedToUseOperand - Given the index of a register def operand, 945b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// check if the register def is tied to a source operand, due to either 946b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// two-address elimination or inline assembly constraints. Returns the 947b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// first tied use operand index by reference is UseOpIdx is not null. 948b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querubool MachineInstr:: 949b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruisRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx) const { 950b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isInlineAsm()) { 951b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(DefOpIdx > InlineAsm::MIOp_FirstOperand); 952b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(DefOpIdx); 953b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0) 954b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 955b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Determine the actual operand index that corresponds to this index. 956b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned DefNo = 0; 957b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned DefPart = 0; 958b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = InlineAsm::MIOp_FirstOperand, e = getNumOperands(); 959b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru i < e; ) { 960b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &FMO = getOperand(i); 961b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // After the normal asm operands there may be additional imp-def regs. 962b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!FMO.isImm()) 963b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 964b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Skip over this def. 965b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned NumOps = InlineAsm::getNumOperandRegisters(FMO.getImm()); 966b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned PrevDef = i + 1; 967b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru i = PrevDef + NumOps; 968b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (i > DefOpIdx) { 969b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru DefPart = DefOpIdx - PrevDef; 970b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 971b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 972b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ++DefNo; 973b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 974b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = InlineAsm::MIOp_FirstOperand, e = getNumOperands(); 975b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru i != e; ++i) { 976b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &FMO = getOperand(i); 977b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!FMO.isImm()) 978b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 979b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (i+1 >= e || !getOperand(i+1).isReg() || !getOperand(i+1).isUse()) 980b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 981b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned Idx; 982b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (InlineAsm::isUseOperandTiedToDef(FMO.getImm(), Idx) && 983b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru Idx == DefNo) { 984b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (UseOpIdx) 985b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru *UseOpIdx = (unsigned)i + 1 + DefPart; 986b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 987b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 988b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 989b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 990b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 991b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 992b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(getOperand(DefOpIdx).isDef() && "DefOpIdx is not a def!"); 993b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MCInstrDesc &MCID = getDesc(); 994b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = MCID.getNumOperands(); i != e; ++i) { 995b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(i); 996b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MO.isReg() && MO.isUse() && 997b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MCID.getOperandConstraint(i, MCOI::TIED_TO) == (int)DefOpIdx) { 998b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (UseOpIdx) 999b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru *UseOpIdx = (unsigned)i; 1000b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 1001b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1002b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1003b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1004b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 1005b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1006b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// isRegTiedToDefOperand - Return true if the operand of the specified index 1007b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// is a register use and it is tied to an def operand. It also returns the def 1008b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// operand index by reference. 1009b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Querubool MachineInstr:: 1010b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste QueruisRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx) const { 1011b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (isInlineAsm()) { 1012b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(UseOpIdx); 1013b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0) 1014b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1015b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1016b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Find the flag operand corresponding to UseOpIdx 1017b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned FlagIdx, NumOps=0; 1018b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (FlagIdx = InlineAsm::MIOp_FirstOperand; 1019b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru FlagIdx < UseOpIdx; FlagIdx += NumOps+1) { 1020b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &UFMO = getOperand(FlagIdx); 1021b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // After the normal asm operands there may be additional imp-def regs. 1022b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!UFMO.isImm()) 1023b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1024b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru NumOps = InlineAsm::getNumOperandRegisters(UFMO.getImm()); 1025b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(NumOps < getNumOperands() && "Invalid inline asm flag"); 1026b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (UseOpIdx < FlagIdx+NumOps+1) 1027b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 1028b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1029b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (FlagIdx >= UseOpIdx) 1030b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1031b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &UFMO = getOperand(FlagIdx); 1032b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned DefNo; 1033b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (InlineAsm::isUseOperandTiedToDef(UFMO.getImm(), DefNo)) { 1034b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!DefOpIdx) 1035b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 1036b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1037b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned DefIdx = InlineAsm::MIOp_FirstOperand; 1038b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Remember to adjust the index. First operand is asm string, second is 1039b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // the HasSideEffects and AlignStack bits, then there is a flag for each. 1040b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru while (DefNo) { 1041b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &FMO = getOperand(DefIdx); 1042b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru assert(FMO.isImm()); 1043b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Skip over this def. 1044b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru DefIdx += InlineAsm::getNumOperandRegisters(FMO.getImm()) + 1; 1045b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru --DefNo; 1046b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1047b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru *DefOpIdx = DefIdx + UseOpIdx - FlagIdx; 1048b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 1049b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1050b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1051b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1052b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1053b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MCInstrDesc &MCID = getDesc(); 1054b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (UseOpIdx >= MCID.getNumOperands()) 1055b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1056b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = getOperand(UseOpIdx); 1057b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || !MO.isUse()) 1058b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1059b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru int DefIdx = MCID.getOperandConstraint(UseOpIdx, MCOI::TIED_TO); 1060b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (DefIdx == -1) 1061b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return false; 1062b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (DefOpIdx) 1063b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru *DefOpIdx = (unsigned)DefIdx; 1064b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return true; 1065b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 1066b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1067b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// clearKillInfo - Clears kill flags on all operands. 1068b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 1069b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::clearKillInfo() { 1070b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1071b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineOperand &MO = getOperand(i); 1072b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MO.isReg() && MO.isUse()) 1073b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MO.setIsKill(false); 1074b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1075b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 1076b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1077b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// copyKillDeadInfo - Copies kill / dead operand properties from MI. 1078b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// 1079b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::copyKillDeadInfo(const MachineInstr *MI) { 1080b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 1081b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MachineOperand &MO = MI->getOperand(i); 1082b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MO.isReg() || (!MO.isKill() && !MO.isDead())) 1083b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 1084b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) { 1085b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineOperand &MOp = getOperand(j); 1086b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MOp.isIdenticalTo(MO)) 1087b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru continue; 1088b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MO.isKill()) 1089b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MOp.setIsKill(); 1090b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru else 1091b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MOp.setIsDead(); 1092b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru break; 1093b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1094b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1095b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 1096b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1097b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru/// copyPredicates - Copies predicate operand(s) from MI. 1098b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::copyPredicates(const MachineInstr *MI) { 1099b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const MCInstrDesc &MCID = MI->getDesc(); 1100b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (!MCID.isPredicable()) 1101b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru return; 1102b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 1103b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (MCID.OpInfo[i].isPredicate()) { 1104b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru // Predicated operands must be last operands. 1105b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru addOperand(MI->getOperand(i)); 1106b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1107b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru } 1108b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru} 1109b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru 1110b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queruvoid MachineInstr::substituteRegister(unsigned FromReg, 1111b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned ToReg, 1112b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru unsigned SubIdx, 1113b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru const TargetRegisterInfo &RegInfo) { 1114b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (TargetRegisterInfo::isPhysicalRegister(ToReg)) { 1115b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru if (SubIdx) 1116b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru ToReg = RegInfo.getSubReg(ToReg, SubIdx); 1117b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1118b13da9df870a61b11249bf741347908dbea0edd8Jean-Baptiste Queru MachineOperand &MO = getOperand(i); 1119 if (!MO.isReg() || MO.getReg() != FromReg) 1120 continue; 1121 MO.substPhysReg(ToReg, RegInfo); 1122 } 1123 } else { 1124 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1125 MachineOperand &MO = getOperand(i); 1126 if (!MO.isReg() || MO.getReg() != FromReg) 1127 continue; 1128 MO.substVirtReg(ToReg, SubIdx, RegInfo); 1129 } 1130 } 1131} 1132 1133/// isSafeToMove - Return true if it is safe to move this instruction. If 1134/// SawStore is set to true, it means that there is a store (or call) between 1135/// the instruction's location and its intended destination. 1136bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII, 1137 AliasAnalysis *AA, 1138 bool &SawStore) const { 1139 // Ignore stuff that we obviously can't move. 1140 if (MCID->mayStore() || MCID->isCall()) { 1141 SawStore = true; 1142 return false; 1143 } 1144 1145 if (isLabel() || isDebugValue() || 1146 MCID->isTerminator() || hasUnmodeledSideEffects()) 1147 return false; 1148 1149 // See if this instruction does a load. If so, we have to guarantee that the 1150 // loaded value doesn't change between the load and the its intended 1151 // destination. The check for isInvariantLoad gives the targe the chance to 1152 // classify the load as always returning a constant, e.g. a constant pool 1153 // load. 1154 if (MCID->mayLoad() && !isInvariantLoad(AA)) 1155 // Otherwise, this is a real load. If there is a store between the load and 1156 // end of block, or if the load is volatile, we can't move it. 1157 return !SawStore && !hasVolatileMemoryRef(); 1158 1159 return true; 1160} 1161 1162/// isSafeToReMat - Return true if it's safe to rematerialize the specified 1163/// instruction which defined the specified register instead of copying it. 1164bool MachineInstr::isSafeToReMat(const TargetInstrInfo *TII, 1165 AliasAnalysis *AA, 1166 unsigned DstReg) const { 1167 bool SawStore = false; 1168 if (!TII->isTriviallyReMaterializable(this, AA) || 1169 !isSafeToMove(TII, AA, SawStore)) 1170 return false; 1171 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1172 const MachineOperand &MO = getOperand(i); 1173 if (!MO.isReg()) 1174 continue; 1175 // FIXME: For now, do not remat any instruction with register operands. 1176 // Later on, we can loosen the restriction is the register operands have 1177 // not been modified between the def and use. Note, this is different from 1178 // MachineSink because the code is no longer in two-address form (at least 1179 // partially). 1180 if (MO.isUse()) 1181 return false; 1182 else if (!MO.isDead() && MO.getReg() != DstReg) 1183 return false; 1184 } 1185 return true; 1186} 1187 1188/// hasVolatileMemoryRef - Return true if this instruction may have a 1189/// volatile memory reference, or if the information describing the 1190/// memory reference is not available. Return false if it is known to 1191/// have no volatile memory references. 1192bool MachineInstr::hasVolatileMemoryRef() const { 1193 // An instruction known never to access memory won't have a volatile access. 1194 if (!MCID->mayStore() && 1195 !MCID->mayLoad() && 1196 !MCID->isCall() && 1197 !hasUnmodeledSideEffects()) 1198 return false; 1199 1200 // Otherwise, if the instruction has no memory reference information, 1201 // conservatively assume it wasn't preserved. 1202 if (memoperands_empty()) 1203 return true; 1204 1205 // Check the memory reference information for volatile references. 1206 for (mmo_iterator I = memoperands_begin(), E = memoperands_end(); I != E; ++I) 1207 if ((*I)->isVolatile()) 1208 return true; 1209 1210 return false; 1211} 1212 1213/// isInvariantLoad - Return true if this instruction is loading from a 1214/// location whose value is invariant across the function. For example, 1215/// loading a value from the constant pool or from the argument area 1216/// of a function if it does not change. This should only return true of 1217/// *all* loads the instruction does are invariant (if it does multiple loads). 1218bool MachineInstr::isInvariantLoad(AliasAnalysis *AA) const { 1219 // If the instruction doesn't load at all, it isn't an invariant load. 1220 if (!MCID->mayLoad()) 1221 return false; 1222 1223 // If the instruction has lost its memoperands, conservatively assume that 1224 // it may not be an invariant load. 1225 if (memoperands_empty()) 1226 return false; 1227 1228 const MachineFrameInfo *MFI = getParent()->getParent()->getFrameInfo(); 1229 1230 for (mmo_iterator I = memoperands_begin(), 1231 E = memoperands_end(); I != E; ++I) { 1232 if ((*I)->isVolatile()) return false; 1233 if ((*I)->isStore()) return false; 1234 1235 if (const Value *V = (*I)->getValue()) { 1236 // A load from a constant PseudoSourceValue is invariant. 1237 if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V)) 1238 if (PSV->isConstant(MFI)) 1239 continue; 1240 // If we have an AliasAnalysis, ask it whether the memory is constant. 1241 if (AA && AA->pointsToConstantMemory( 1242 AliasAnalysis::Location(V, (*I)->getSize(), 1243 (*I)->getTBAAInfo()))) 1244 continue; 1245 } 1246 1247 // Otherwise assume conservatively. 1248 return false; 1249 } 1250 1251 // Everything checks out. 1252 return true; 1253} 1254 1255/// isConstantValuePHI - If the specified instruction is a PHI that always 1256/// merges together the same virtual register, return the register, otherwise 1257/// return 0. 1258unsigned MachineInstr::isConstantValuePHI() const { 1259 if (!isPHI()) 1260 return 0; 1261 assert(getNumOperands() >= 3 && 1262 "It's illegal to have a PHI without source operands"); 1263 1264 unsigned Reg = getOperand(1).getReg(); 1265 for (unsigned i = 3, e = getNumOperands(); i < e; i += 2) 1266 if (getOperand(i).getReg() != Reg) 1267 return 0; 1268 return Reg; 1269} 1270 1271bool MachineInstr::hasUnmodeledSideEffects() const { 1272 if (getDesc().hasUnmodeledSideEffects()) 1273 return true; 1274 if (isInlineAsm()) { 1275 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm(); 1276 if (ExtraInfo & InlineAsm::Extra_HasSideEffects) 1277 return true; 1278 } 1279 1280 return false; 1281} 1282 1283/// allDefsAreDead - Return true if all the defs of this instruction are dead. 1284/// 1285bool MachineInstr::allDefsAreDead() const { 1286 for (unsigned i = 0, e = getNumOperands(); i < e; ++i) { 1287 const MachineOperand &MO = getOperand(i); 1288 if (!MO.isReg() || MO.isUse()) 1289 continue; 1290 if (!MO.isDead()) 1291 return false; 1292 } 1293 return true; 1294} 1295 1296/// copyImplicitOps - Copy implicit register operands from specified 1297/// instruction to this instruction. 1298void MachineInstr::copyImplicitOps(const MachineInstr *MI) { 1299 for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands(); 1300 i != e; ++i) { 1301 const MachineOperand &MO = MI->getOperand(i); 1302 if (MO.isReg() && MO.isImplicit()) 1303 addOperand(MO); 1304 } 1305} 1306 1307void MachineInstr::dump() const { 1308 dbgs() << " " << *this; 1309} 1310 1311static void printDebugLoc(DebugLoc DL, const MachineFunction *MF, 1312 raw_ostream &CommentOS) { 1313 const LLVMContext &Ctx = MF->getFunction()->getContext(); 1314 if (!DL.isUnknown()) { // Print source line info. 1315 DIScope Scope(DL.getScope(Ctx)); 1316 // Omit the directory, because it's likely to be long and uninteresting. 1317 if (Scope.Verify()) 1318 CommentOS << Scope.getFilename(); 1319 else 1320 CommentOS << "<unknown>"; 1321 CommentOS << ':' << DL.getLine(); 1322 if (DL.getCol() != 0) 1323 CommentOS << ':' << DL.getCol(); 1324 DebugLoc InlinedAtDL = DebugLoc::getFromDILocation(DL.getInlinedAt(Ctx)); 1325 if (!InlinedAtDL.isUnknown()) { 1326 CommentOS << " @[ "; 1327 printDebugLoc(InlinedAtDL, MF, CommentOS); 1328 CommentOS << " ]"; 1329 } 1330 } 1331} 1332 1333void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const { 1334 // We can be a bit tidier if we know the TargetMachine and/or MachineFunction. 1335 const MachineFunction *MF = 0; 1336 const MachineRegisterInfo *MRI = 0; 1337 if (const MachineBasicBlock *MBB = getParent()) { 1338 MF = MBB->getParent(); 1339 if (!TM && MF) 1340 TM = &MF->getTarget(); 1341 if (MF) 1342 MRI = &MF->getRegInfo(); 1343 } 1344 1345 // Save a list of virtual registers. 1346 SmallVector<unsigned, 8> VirtRegs; 1347 1348 // Print explicitly defined operands on the left of an assignment syntax. 1349 unsigned StartOp = 0, e = getNumOperands(); 1350 for (; StartOp < e && getOperand(StartOp).isReg() && 1351 getOperand(StartOp).isDef() && 1352 !getOperand(StartOp).isImplicit(); 1353 ++StartOp) { 1354 if (StartOp != 0) OS << ", "; 1355 getOperand(StartOp).print(OS, TM); 1356 unsigned Reg = getOperand(StartOp).getReg(); 1357 if (TargetRegisterInfo::isVirtualRegister(Reg)) 1358 VirtRegs.push_back(Reg); 1359 } 1360 1361 if (StartOp != 0) 1362 OS << " = "; 1363 1364 // Print the opcode name. 1365 OS << getDesc().getName(); 1366 1367 // Print the rest of the operands. 1368 bool OmittedAnyCallClobbers = false; 1369 bool FirstOp = true; 1370 unsigned AsmDescOp = ~0u; 1371 unsigned AsmOpCount = 0; 1372 1373 if (isInlineAsm()) { 1374 // Print asm string. 1375 OS << " "; 1376 getOperand(InlineAsm::MIOp_AsmString).print(OS, TM); 1377 1378 // Print HasSideEffects, IsAlignStack 1379 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm(); 1380 if (ExtraInfo & InlineAsm::Extra_HasSideEffects) 1381 OS << " [sideeffect]"; 1382 if (ExtraInfo & InlineAsm::Extra_IsAlignStack) 1383 OS << " [alignstack]"; 1384 1385 StartOp = AsmDescOp = InlineAsm::MIOp_FirstOperand; 1386 FirstOp = false; 1387 } 1388 1389 1390 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { 1391 const MachineOperand &MO = getOperand(i); 1392 1393 if (MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) 1394 VirtRegs.push_back(MO.getReg()); 1395 1396 // Omit call-clobbered registers which aren't used anywhere. This makes 1397 // call instructions much less noisy on targets where calls clobber lots 1398 // of registers. Don't rely on MO.isDead() because we may be called before 1399 // LiveVariables is run, or we may be looking at a non-allocatable reg. 1400 if (MF && getDesc().isCall() && 1401 MO.isReg() && MO.isImplicit() && MO.isDef()) { 1402 unsigned Reg = MO.getReg(); 1403 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 1404 const MachineRegisterInfo &MRI = MF->getRegInfo(); 1405 if (MRI.use_empty(Reg) && !MRI.isLiveOut(Reg)) { 1406 bool HasAliasLive = false; 1407 for (const unsigned *Alias = TM->getRegisterInfo()->getAliasSet(Reg); 1408 unsigned AliasReg = *Alias; ++Alias) 1409 if (!MRI.use_empty(AliasReg) || MRI.isLiveOut(AliasReg)) { 1410 HasAliasLive = true; 1411 break; 1412 } 1413 if (!HasAliasLive) { 1414 OmittedAnyCallClobbers = true; 1415 continue; 1416 } 1417 } 1418 } 1419 } 1420 1421 if (FirstOp) FirstOp = false; else OS << ","; 1422 OS << " "; 1423 if (i < getDesc().NumOperands) { 1424 const MCOperandInfo &MCOI = getDesc().OpInfo[i]; 1425 if (MCOI.isPredicate()) 1426 OS << "pred:"; 1427 if (MCOI.isOptionalDef()) 1428 OS << "opt:"; 1429 } 1430 if (isDebugValue() && MO.isMetadata()) { 1431 // Pretty print DBG_VALUE instructions. 1432 const MDNode *MD = MO.getMetadata(); 1433 if (const MDString *MDS = dyn_cast<MDString>(MD->getOperand(2))) 1434 OS << "!\"" << MDS->getString() << '\"'; 1435 else 1436 MO.print(OS, TM); 1437 } else if (TM && (isInsertSubreg() || isRegSequence()) && MO.isImm()) { 1438 OS << TM->getRegisterInfo()->getSubRegIndexName(MO.getImm()); 1439 } else if (i == AsmDescOp && MO.isImm()) { 1440 // Pretty print the inline asm operand descriptor. 1441 OS << '$' << AsmOpCount++; 1442 unsigned Flag = MO.getImm(); 1443 switch (InlineAsm::getKind(Flag)) { 1444 case InlineAsm::Kind_RegUse: OS << ":[reguse]"; break; 1445 case InlineAsm::Kind_RegDef: OS << ":[regdef]"; break; 1446 case InlineAsm::Kind_RegDefEarlyClobber: OS << ":[regdef-ec]"; break; 1447 case InlineAsm::Kind_Clobber: OS << ":[clobber]"; break; 1448 case InlineAsm::Kind_Imm: OS << ":[imm]"; break; 1449 case InlineAsm::Kind_Mem: OS << ":[mem]"; break; 1450 default: OS << ":[??" << InlineAsm::getKind(Flag) << ']'; break; 1451 } 1452 1453 unsigned TiedTo = 0; 1454 if (InlineAsm::isUseOperandTiedToDef(Flag, TiedTo)) 1455 OS << " [tiedto:$" << TiedTo << ']'; 1456 1457 // Compute the index of the next operand descriptor. 1458 AsmDescOp += 1 + InlineAsm::getNumOperandRegisters(Flag); 1459 } else 1460 MO.print(OS, TM); 1461 } 1462 1463 // Briefly indicate whether any call clobbers were omitted. 1464 if (OmittedAnyCallClobbers) { 1465 if (!FirstOp) OS << ","; 1466 OS << " ..."; 1467 } 1468 1469 bool HaveSemi = false; 1470 if (Flags) { 1471 if (!HaveSemi) OS << ";"; HaveSemi = true; 1472 OS << " flags: "; 1473 1474 if (Flags & FrameSetup) 1475 OS << "FrameSetup"; 1476 } 1477 1478 if (!memoperands_empty()) { 1479 if (!HaveSemi) OS << ";"; HaveSemi = true; 1480 1481 OS << " mem:"; 1482 for (mmo_iterator i = memoperands_begin(), e = memoperands_end(); 1483 i != e; ++i) { 1484 OS << **i; 1485 if (llvm::next(i) != e) 1486 OS << " "; 1487 } 1488 } 1489 1490 // Print the regclass of any virtual registers encountered. 1491 if (MRI && !VirtRegs.empty()) { 1492 if (!HaveSemi) OS << ";"; HaveSemi = true; 1493 for (unsigned i = 0; i != VirtRegs.size(); ++i) { 1494 const TargetRegisterClass *RC = MRI->getRegClass(VirtRegs[i]); 1495 OS << " " << RC->getName() << ':' << PrintReg(VirtRegs[i]); 1496 for (unsigned j = i+1; j != VirtRegs.size();) { 1497 if (MRI->getRegClass(VirtRegs[j]) != RC) { 1498 ++j; 1499 continue; 1500 } 1501 if (VirtRegs[i] != VirtRegs[j]) 1502 OS << "," << PrintReg(VirtRegs[j]); 1503 VirtRegs.erase(VirtRegs.begin()+j); 1504 } 1505 } 1506 } 1507 1508 // Print debug location information. 1509 if (!debugLoc.isUnknown() && MF) { 1510 if (!HaveSemi) OS << ";"; HaveSemi = true; 1511 OS << " dbg:"; 1512 printDebugLoc(debugLoc, MF, OS); 1513 } 1514 1515 OS << '\n'; 1516} 1517 1518bool MachineInstr::addRegisterKilled(unsigned IncomingReg, 1519 const TargetRegisterInfo *RegInfo, 1520 bool AddIfNotFound) { 1521 bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); 1522 bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); 1523 bool Found = false; 1524 SmallVector<unsigned,4> DeadOps; 1525 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1526 MachineOperand &MO = getOperand(i); 1527 if (!MO.isReg() || !MO.isUse() || MO.isUndef()) 1528 continue; 1529 unsigned Reg = MO.getReg(); 1530 if (!Reg) 1531 continue; 1532 1533 if (Reg == IncomingReg) { 1534 if (!Found) { 1535 if (MO.isKill()) 1536 // The register is already marked kill. 1537 return true; 1538 if (isPhysReg && isRegTiedToDefOperand(i)) 1539 // Two-address uses of physregs must not be marked kill. 1540 return true; 1541 MO.setIsKill(); 1542 Found = true; 1543 } 1544 } else if (hasAliases && MO.isKill() && 1545 TargetRegisterInfo::isPhysicalRegister(Reg)) { 1546 // A super-register kill already exists. 1547 if (RegInfo->isSuperRegister(IncomingReg, Reg)) 1548 return true; 1549 if (RegInfo->isSubRegister(IncomingReg, Reg)) 1550 DeadOps.push_back(i); 1551 } 1552 } 1553 1554 // Trim unneeded kill operands. 1555 while (!DeadOps.empty()) { 1556 unsigned OpIdx = DeadOps.back(); 1557 if (getOperand(OpIdx).isImplicit()) 1558 RemoveOperand(OpIdx); 1559 else 1560 getOperand(OpIdx).setIsKill(false); 1561 DeadOps.pop_back(); 1562 } 1563 1564 // If not found, this means an alias of one of the operands is killed. Add a 1565 // new implicit operand if required. 1566 if (!Found && AddIfNotFound) { 1567 addOperand(MachineOperand::CreateReg(IncomingReg, 1568 false /*IsDef*/, 1569 true /*IsImp*/, 1570 true /*IsKill*/)); 1571 return true; 1572 } 1573 return Found; 1574} 1575 1576bool MachineInstr::addRegisterDead(unsigned IncomingReg, 1577 const TargetRegisterInfo *RegInfo, 1578 bool AddIfNotFound) { 1579 bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); 1580 bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); 1581 bool Found = false; 1582 SmallVector<unsigned,4> DeadOps; 1583 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1584 MachineOperand &MO = getOperand(i); 1585 if (!MO.isReg() || !MO.isDef()) 1586 continue; 1587 unsigned Reg = MO.getReg(); 1588 if (!Reg) 1589 continue; 1590 1591 if (Reg == IncomingReg) { 1592 MO.setIsDead(); 1593 Found = true; 1594 } else if (hasAliases && MO.isDead() && 1595 TargetRegisterInfo::isPhysicalRegister(Reg)) { 1596 // There exists a super-register that's marked dead. 1597 if (RegInfo->isSuperRegister(IncomingReg, Reg)) 1598 return true; 1599 if (RegInfo->getSubRegisters(IncomingReg) && 1600 RegInfo->getSuperRegisters(Reg) && 1601 RegInfo->isSubRegister(IncomingReg, Reg)) 1602 DeadOps.push_back(i); 1603 } 1604 } 1605 1606 // Trim unneeded dead operands. 1607 while (!DeadOps.empty()) { 1608 unsigned OpIdx = DeadOps.back(); 1609 if (getOperand(OpIdx).isImplicit()) 1610 RemoveOperand(OpIdx); 1611 else 1612 getOperand(OpIdx).setIsDead(false); 1613 DeadOps.pop_back(); 1614 } 1615 1616 // If not found, this means an alias of one of the operands is dead. Add a 1617 // new implicit operand if required. 1618 if (Found || !AddIfNotFound) 1619 return Found; 1620 1621 addOperand(MachineOperand::CreateReg(IncomingReg, 1622 true /*IsDef*/, 1623 true /*IsImp*/, 1624 false /*IsKill*/, 1625 true /*IsDead*/)); 1626 return true; 1627} 1628 1629void MachineInstr::addRegisterDefined(unsigned IncomingReg, 1630 const TargetRegisterInfo *RegInfo) { 1631 if (TargetRegisterInfo::isPhysicalRegister(IncomingReg)) { 1632 MachineOperand *MO = findRegisterDefOperand(IncomingReg, false, RegInfo); 1633 if (MO) 1634 return; 1635 } else { 1636 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1637 const MachineOperand &MO = getOperand(i); 1638 if (MO.isReg() && MO.getReg() == IncomingReg && MO.isDef() && 1639 MO.getSubReg() == 0) 1640 return; 1641 } 1642 } 1643 addOperand(MachineOperand::CreateReg(IncomingReg, 1644 true /*IsDef*/, 1645 true /*IsImp*/)); 1646} 1647 1648void MachineInstr::setPhysRegsDeadExcept(const SmallVectorImpl<unsigned> &UsedRegs, 1649 const TargetRegisterInfo &TRI) { 1650 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1651 MachineOperand &MO = getOperand(i); 1652 if (!MO.isReg() || !MO.isDef()) continue; 1653 unsigned Reg = MO.getReg(); 1654 if (Reg == 0) continue; 1655 bool Dead = true; 1656 for (SmallVectorImpl<unsigned>::const_iterator I = UsedRegs.begin(), 1657 E = UsedRegs.end(); I != E; ++I) 1658 if (TRI.regsOverlap(*I, Reg)) { 1659 Dead = false; 1660 break; 1661 } 1662 // If there are no uses, including partial uses, the def is dead. 1663 if (Dead) MO.setIsDead(); 1664 } 1665} 1666 1667unsigned 1668MachineInstrExpressionTrait::getHashValue(const MachineInstr* const &MI) { 1669 unsigned Hash = MI->getOpcode() * 37; 1670 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 1671 const MachineOperand &MO = MI->getOperand(i); 1672 uint64_t Key = (uint64_t)MO.getType() << 32; 1673 switch (MO.getType()) { 1674 default: break; 1675 case MachineOperand::MO_Register: 1676 if (MO.isDef() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) 1677 continue; // Skip virtual register defs. 1678 Key |= MO.getReg(); 1679 break; 1680 case MachineOperand::MO_Immediate: 1681 Key |= MO.getImm(); 1682 break; 1683 case MachineOperand::MO_FrameIndex: 1684 case MachineOperand::MO_ConstantPoolIndex: 1685 case MachineOperand::MO_JumpTableIndex: 1686 Key |= MO.getIndex(); 1687 break; 1688 case MachineOperand::MO_MachineBasicBlock: 1689 Key |= DenseMapInfo<void*>::getHashValue(MO.getMBB()); 1690 break; 1691 case MachineOperand::MO_GlobalAddress: 1692 Key |= DenseMapInfo<void*>::getHashValue(MO.getGlobal()); 1693 break; 1694 case MachineOperand::MO_BlockAddress: 1695 Key |= DenseMapInfo<void*>::getHashValue(MO.getBlockAddress()); 1696 break; 1697 case MachineOperand::MO_MCSymbol: 1698 Key |= DenseMapInfo<void*>::getHashValue(MO.getMCSymbol()); 1699 break; 1700 } 1701 Key += ~(Key << 32); 1702 Key ^= (Key >> 22); 1703 Key += ~(Key << 13); 1704 Key ^= (Key >> 8); 1705 Key += (Key << 3); 1706 Key ^= (Key >> 15); 1707 Key += ~(Key << 27); 1708 Key ^= (Key >> 31); 1709 Hash = (unsigned)Key + Hash * 37; 1710 } 1711 return Hash; 1712} 1713