SplitKit.h revision a2cae58411b36a58f658f9402e8d039add31ae4d
1//===-------- SplitKit.h - Toolkit for splitting live ranges ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the SplitAnalysis class as well as mutator functions for
11// live range splitting.
12//
13//===----------------------------------------------------------------------===//
14
15#include "llvm/ADT/DenseMap.h"
16#include "llvm/ADT/IntervalMap.h"
17#include "llvm/ADT/SmallPtrSet.h"
18#include "llvm/CodeGen/SlotIndexes.h"
19
20namespace llvm {
21
22class ConnectedVNInfoEqClasses;
23class LiveInterval;
24class LiveIntervals;
25class LiveRangeEdit;
26class MachineInstr;
27class MachineLoopInfo;
28class MachineRegisterInfo;
29class TargetInstrInfo;
30class TargetRegisterInfo;
31class VirtRegMap;
32class VNInfo;
33class raw_ostream;
34
35/// At some point we should just include MachineDominators.h:
36class MachineDominatorTree;
37template <class NodeT> class DomTreeNodeBase;
38typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
39
40
41/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
42/// opportunities.
43class SplitAnalysis {
44public:
45  const MachineFunction &MF;
46  const VirtRegMap &VRM;
47  const LiveIntervals &LIS;
48  const MachineLoopInfo &Loops;
49  const TargetInstrInfo &TII;
50
51  // Instructions using the the current register.
52  typedef SmallPtrSet<const MachineInstr*, 16> InstrPtrSet;
53  InstrPtrSet UsingInstrs;
54
55  // Sorted slot indexes of using instructions.
56  SmallVector<SlotIndex, 8> UseSlots;
57
58  // The number of instructions using CurLI in each basic block.
59  typedef DenseMap<const MachineBasicBlock*, unsigned> BlockCountMap;
60  BlockCountMap UsingBlocks;
61
62  /// Additional information about basic blocks where the current variable is
63  /// live. Such a block will look like one of these templates:
64  ///
65  ///  1. |   o---x   | Internal to block. Variable is only live in this block.
66  ///  2. |---x       | Live-in, kill.
67  ///  3. |       o---| Def, live-out.
68  ///  4. |---x   o---| Live-in, kill, def, live-out.
69  ///  5. |---o---o---| Live-through with uses or defs.
70  ///  6. |-----------| Live-through without uses. Transparent.
71  ///
72  struct BlockInfo {
73    MachineBasicBlock *MBB;
74    SlotIndex FirstUse;   ///< First instr using current reg.
75    SlotIndex LastUse;    ///< Last instr using current reg.
76    SlotIndex Kill;       ///< Interval end point inside block.
77    SlotIndex Def;        ///< Interval start point inside block.
78    /// Last possible point for splitting live ranges.
79    SlotIndex LastSplitPoint;
80    bool Uses;            ///< Current reg has uses or defs in block.
81    bool LiveThrough;     ///< Live in whole block (Templ 5. or 6. above).
82    bool LiveIn;          ///< Current reg is live in.
83    bool LiveOut;         ///< Current reg is live out.
84
85    // Per-interference pattern scratch data.
86    bool OverlapEntry;    ///< Interference overlaps entering interval.
87    bool OverlapExit;     ///< Interference overlaps exiting interval.
88  };
89
90  /// Basic blocks where var is live. This array is parallel to
91  /// SpillConstraints.
92  SmallVector<BlockInfo, 8> LiveBlocks;
93
94private:
95  // Current live interval.
96  const LiveInterval *CurLI;
97
98  // Sumarize statistics by counting instructions using CurLI.
99  void analyzeUses();
100
101  /// calcLiveBlockInfo - Compute per-block information about CurLI.
102  void calcLiveBlockInfo();
103
104  /// canAnalyzeBranch - Return true if MBB ends in a branch that can be
105  /// analyzed.
106  bool canAnalyzeBranch(const MachineBasicBlock *MBB);
107
108public:
109  SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
110                const MachineLoopInfo &mli);
111
112  /// analyze - set CurLI to the specified interval, and analyze how it may be
113  /// split.
114  void analyze(const LiveInterval *li);
115
116  /// clear - clear all data structures so SplitAnalysis is ready to analyze a
117  /// new interval.
118  void clear();
119
120  /// getParent - Return the last analyzed interval.
121  const LiveInterval &getParent() const { return *CurLI; }
122
123  /// hasUses - Return true if MBB has any uses of CurLI.
124  bool hasUses(const MachineBasicBlock *MBB) const {
125    return UsingBlocks.lookup(MBB);
126  }
127
128  /// isOriginalEndpoint - Return true if the original live range was killed or
129  /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
130  /// and 'use' for an early-clobber def.
131  /// This can be used to recognize code inserted by earlier live range
132  /// splitting.
133  bool isOriginalEndpoint(SlotIndex Idx) const;
134
135  typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
136
137  // Print a set of blocks with use counts.
138  void print(const BlockPtrSet&, raw_ostream&) const;
139
140  /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from
141  /// having CurLI split to a new live interval. Return true if Blocks can be
142  /// passed to SplitEditor::splitSingleBlocks.
143  bool getMultiUseBlocks(BlockPtrSet &Blocks);
144};
145
146
147/// SplitEditor - Edit machine code and LiveIntervals for live range
148/// splitting.
149///
150/// - Create a SplitEditor from a SplitAnalysis.
151/// - Start a new live interval with openIntv.
152/// - Mark the places where the new interval is entered using enterIntv*
153/// - Mark the ranges where the new interval is used with useIntv*
154/// - Mark the places where the interval is exited with exitIntv*.
155/// - Finish the current interval with closeIntv and repeat from 2.
156/// - Rewrite instructions with finish().
157///
158class SplitEditor {
159  SplitAnalysis &SA;
160  LiveIntervals &LIS;
161  VirtRegMap &VRM;
162  MachineRegisterInfo &MRI;
163  MachineDominatorTree &MDT;
164  const TargetInstrInfo &TII;
165  const TargetRegisterInfo &TRI;
166
167  /// Edit - The current parent register and new intervals created.
168  LiveRangeEdit *Edit;
169
170  /// Index into Edit of the currently open interval.
171  /// The index 0 is used for the complement, so the first interval started by
172  /// openIntv will be 1.
173  unsigned OpenIdx;
174
175  typedef IntervalMap<SlotIndex, unsigned> RegAssignMap;
176
177  /// Allocator for the interval map. This will eventually be shared with
178  /// SlotIndexes and LiveIntervals.
179  RegAssignMap::Allocator Allocator;
180
181  /// RegAssign - Map of the assigned register indexes.
182  /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
183  /// Idx.
184  RegAssignMap RegAssign;
185
186  typedef DenseMap<std::pair<unsigned, unsigned>, VNInfo*> ValueMap;
187
188  /// Values - keep track of the mapping from parent values to values in the new
189  /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
190  ///
191  /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
192  /// 2. Null - the value is mapped to multiple values in Edit.get(RegIdx).
193  ///    Each value is represented by a minimal live range at its def.
194  /// 3. A non-null VNInfo - the value is mapped to a single new value.
195  ///    The new value has no live ranges anywhere.
196  ValueMap Values;
197
198  typedef std::pair<VNInfo*, MachineDomTreeNode*> LiveOutPair;
199  typedef DenseMap<MachineBasicBlock*,LiveOutPair> LiveOutMap;
200
201  // LiveOutCache - Map each basic block where a new register is live out to the
202  // live-out value and its defining block.
203  // One of these conditions shall be true:
204  //
205  //  1. !LiveOutCache.count(MBB)
206  //  2. LiveOutCache[MBB].second.getNode() == MBB
207  //  3. forall P in preds(MBB): LiveOutCache[P] == LiveOutCache[MBB]
208  //
209  // This is only a cache, the values can be computed as:
210  //
211  //  VNI = Edit.get(RegIdx)->getVNInfoAt(LIS.getMBBEndIdx(MBB))
212  //  Node = mbt_[LIS.getMBBFromIndex(VNI->def)]
213  //
214  // The cache is also used as a visited set by extendRange(). It can be shared
215  // by all the new registers because at most one is live out of each block.
216  LiveOutMap LiveOutCache;
217
218  /// defValue - define a value in RegIdx from ParentVNI at Idx.
219  /// Idx does not have to be ParentVNI->def, but it must be contained within
220  /// ParentVNI's live range in ParentLI. The new value is added to the value
221  /// map.
222  /// Return the new LI value.
223  VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx);
224
225  /// markComplexMapped - Mark ParentVNI as complex mapped in RegIdx regardless
226  /// of the number of defs.
227  void markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI);
228
229  /// defFromParent - Define Reg from ParentVNI at UseIdx using either
230  /// rematerialization or a COPY from parent. Return the new value.
231  VNInfo *defFromParent(unsigned RegIdx,
232                        VNInfo *ParentVNI,
233                        SlotIndex UseIdx,
234                        MachineBasicBlock &MBB,
235                        MachineBasicBlock::iterator I);
236
237  /// extendRange - Extend the live range of Edit.get(RegIdx) so it reaches Idx.
238  /// Insert PHIDefs as needed to preserve SSA form.
239  void extendRange(unsigned RegIdx, SlotIndex Idx);
240
241  /// updateSSA - Insert PHIDefs as necessary and update LiveOutCache such that
242  /// Edit.get(RegIdx) is live-in to all the blocks in LiveIn.
243  /// Return the value that is eventually live-in to IdxMBB.
244  VNInfo *updateSSA(unsigned RegIdx,
245                    SmallVectorImpl<MachineDomTreeNode*> &LiveIn,
246                    SlotIndex Idx,
247                    const MachineBasicBlock *IdxMBB);
248
249  /// transferSimpleValues - Transfer simply defined values to the new ranges.
250  /// Return true if any complex ranges were skipped.
251  bool transferSimpleValues();
252
253  /// extendPHIKillRanges - Extend the ranges of all values killed by original
254  /// parent PHIDefs.
255  void extendPHIKillRanges();
256
257  /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
258  void rewriteAssigned(bool ExtendRanges);
259
260  /// rewriteComponents - Rewrite all uses of Intv[0] according to the eq
261  /// classes in ConEQ.
262  /// This must be done when Intvs[0] is styill live at all uses, before calling
263  /// ConEq.Distribute().
264  void rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
265                         const ConnectedVNInfoEqClasses &ConEq);
266
267public:
268  /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
269  /// Newly created intervals will be appended to newIntervals.
270  SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
271              MachineDominatorTree&, LiveRangeEdit&);
272
273  /// getAnalysis - Get the corresponding analysis.
274  SplitAnalysis &getAnalysis() { return SA; }
275
276  /// Create a new virtual register and live interval.
277  void openIntv();
278
279  /// enterIntvBefore - Enter the open interval before the instruction at Idx.
280  /// If the parent interval is not live before Idx, a COPY is not inserted.
281  /// Return the beginning of the new live range.
282  SlotIndex enterIntvBefore(SlotIndex Idx);
283
284  /// enterIntvAtEnd - Enter the open interval at the end of MBB.
285  /// Use the open interval from he inserted copy to the MBB end.
286  /// Return the beginning of the new live range.
287  SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
288
289  /// useIntv - indicate that all instructions in MBB should use OpenLI.
290  void useIntv(const MachineBasicBlock &MBB);
291
292  /// useIntv - indicate that all instructions in range should use OpenLI.
293  void useIntv(SlotIndex Start, SlotIndex End);
294
295  /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
296  /// Return the end of the live range.
297  SlotIndex leaveIntvAfter(SlotIndex Idx);
298
299  /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
300  /// Return the end of the live range.
301  SlotIndex leaveIntvBefore(SlotIndex Idx);
302
303  /// leaveIntvAtTop - Leave the interval at the top of MBB.
304  /// Add liveness from the MBB top to the copy.
305  /// Return the end of the live range.
306  SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
307
308  /// overlapIntv - Indicate that all instructions in range should use the open
309  /// interval, but also let the complement interval be live.
310  ///
311  /// This doubles the register pressure, but is sometimes required to deal with
312  /// register uses after the last valid split point.
313  ///
314  /// The Start index should be a return value from a leaveIntv* call, and End
315  /// should be in the same basic block. The parent interval must have the same
316  /// value across the range.
317  ///
318  void overlapIntv(SlotIndex Start, SlotIndex End);
319
320  /// closeIntv - Indicate that we are done editing the currently open
321  /// LiveInterval, and ranges can be trimmed.
322  void closeIntv();
323
324  /// finish - after all the new live ranges have been created, compute the
325  /// remaining live range, and rewrite instructions to use the new registers.
326  void finish();
327
328  /// dump - print the current interval maping to dbgs().
329  void dump() const;
330
331  // ===--- High level methods ---===
332
333  /// splitSingleBlocks - Split CurLI into a separate live interval inside each
334  /// basic block in Blocks.
335  void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks);
336};
337
338}
339