ARMAsmPrinter.cpp revision 375db7f39af8da118f3947d24ea91967c4a6b526
197f06937449c593a248dbbb1365e6ae408fb9decChris Lattner//===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===// 297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner// 37bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// The LLVM Compiler Infrastructure 47bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 67bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// License. See LICENSE.TXT for details. 77bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 87bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 97bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 107bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// This file contains a printer that converts from our internal representation 117bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// of machine-dependent LLVM code to GAS-format ARM assembly language. 127bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 137bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 147bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1595b2c7da5e83670881270c1cd231a240be0556d9Chris Lattner#define DEBUG_TYPE "asm-printer" 167bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "ARM.h" 17b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMAsmPrinter.h" 18a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "ARMAddressingModes.h" 19b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMBuildAttrs.h" 20b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMBaseRegisterInfo.h" 21a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "ARMConstantPoolValue.h" 2297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "ARMMachineFunctionInfo.h" 235de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng#include "ARMMCExpr.h" 2497f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "ARMTargetMachine.h" 2517b443df4368acfad853d09858c033c45c468d5cJason W Kim#include "ARMTargetObjectFile.h" 26b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "InstPrinter/ARMInstPrinter.h" 273f282aa94b80f4a93ff3cbc37cf3cd4a851c8432Dale Johannesen#include "llvm/Analysis/DebugInfo.h" 287bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Constants.h" 297bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Module.h" 30e55b15fa4753ef08cbfa2127d2d220b77aa07d87Benjamin Kramer#include "llvm/Type.h" 31cf20ac4fd12ea3510a8f32a24fff69eebe7b6f4aDan Gohman#include "llvm/Assembly/Writer.h" 32b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/CodeGen/MachineModuleInfoImpls.h" 337bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineFunctionPass.h" 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/MachineJumpTableInfo.h" 35b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/MC/MCAsmInfo.h" 36cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola#include "llvm/MC/MCAssembler.h" 37b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/MC/MCContext.h" 38becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling#include "llvm/MC/MCExpr.h" 3997f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "llvm/MC/MCInst.h" 40f9bdeddb96043559c61f176f8077e3b91a0c544fChris Lattner#include "llvm/MC/MCSectionMachO.h" 41cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola#include "llvm/MC/MCObjectStreamer.h" 426c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner#include "llvm/MC/MCStreamer.h" 43325d3dcfe4d5efc91db0f59b20a72a11dea024edChris Lattner#include "llvm/MC/MCSymbol.h" 44d62f1b4168d4327c119642d28c26c836ae6717abChris Lattner#include "llvm/Target/Mangler.h" 45b01c4bbb4573e0007444e218b683840e4519e0c8Rafael Espindola#include "llvm/Target/TargetData.h" 467bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Target/TargetMachine.h" 475be54b00bdbe1abd02dde46ca2c4b0e5aaf7b537Evan Cheng#include "llvm/Target/TargetOptions.h" 4851b198af83cb0080c2709b04c129a3d774c07765Daniel Dunbar#include "llvm/Target/TargetRegistry.h" 49c324ecb7bc93a1f09db29851438ec5ee72b143ebEvan Cheng#include "llvm/ADT/SmallPtrSet.h" 50c40d9f9bae70c83947bf8fa5f9ee97adbf1bb0c0Jim Grosbach#include "llvm/ADT/SmallString.h" 5154c78ef2fed32e82e6aea8cbeb89156814eaf27cBob Wilson#include "llvm/ADT/StringExtras.h" 5297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "llvm/Support/CommandLine.h" 5359135f49e1699daec9a43fc2d15715d55b910f54Devang Patel#include "llvm/Support/Debug.h" 543046470919e648ff7c011bda9c094163062c83dcTorok Edwin#include "llvm/Support/ErrorHandling.h" 55b23569aff0a6d2b231cb93cc4acd0ac060ba560fChris Lattner#include "llvm/Support/raw_ostream.h" 567bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include <cctype> 577bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolausing namespace llvm; 587bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 5995b2c7da5e83670881270c1cd231a240be0556d9Chris Lattnernamespace { 60cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 61cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // Per section and per symbol attributes are not supported. 62cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // To implement them we would need the ability to delay this emission 63cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // until the assembly file is fully parsed/generated as only then do we 64cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // know the symbol and section numbers. 65cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class AttributeEmitter { 66cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 67cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void MaybeSwitchVendor(StringRef Vendor) = 0; 68cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0; 69f009a961caa75465999ef3bc764984d97a7da331Jason W Kim virtual void EmitTextAttribute(unsigned Attribute, StringRef String) = 0; 70cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void Finish() = 0; 714921e2356ef8f3b3f9ebd0c154b091c3d5dd2ce4Rafael Espindola virtual ~AttributeEmitter() {} 72cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 73cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 74cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class AsmAttributeEmitter : public AttributeEmitter { 75cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCStreamer &Streamer; 76cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 77cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 78cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AsmAttributeEmitter(MCStreamer &Streamer_) : Streamer(Streamer_) {} 79cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void MaybeSwitchVendor(StringRef Vendor) { } 80cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 81cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void EmitAttribute(unsigned Attribute, unsigned Value) { 82cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer.EmitRawText("\t.eabi_attribute " + 83cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Twine(Attribute) + ", " + Twine(Value)); 84cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 85cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 86f009a961caa75465999ef3bc764984d97a7da331Jason W Kim void EmitTextAttribute(unsigned Attribute, StringRef String) { 87f009a961caa75465999ef3bc764984d97a7da331Jason W Kim switch (Attribute) { 88f009a961caa75465999ef3bc764984d97a7da331Jason W Kim case ARMBuildAttrs::CPU_name: 89c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim Streamer.EmitRawText(StringRef("\t.cpu ") + LowercaseString(String)); 90f009a961caa75465999ef3bc764984d97a7da331Jason W Kim break; 91728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* GAS requires .fpu to be emitted regardless of EABI attribute */ 92728ff0db783152ed4f21f7746bd7874b49708172Renato Golin case ARMBuildAttrs::Advanced_SIMD_arch: 93728ff0db783152ed4f21f7746bd7874b49708172Renato Golin case ARMBuildAttrs::VFP_arch: 94728ff0db783152ed4f21f7746bd7874b49708172Renato Golin Streamer.EmitRawText(StringRef("\t.fpu ") + LowercaseString(String)); 95728ff0db783152ed4f21f7746bd7874b49708172Renato Golin break; 96f009a961caa75465999ef3bc764984d97a7da331Jason W Kim default: assert(0 && "Unsupported Text attribute in ASM Mode"); break; 97f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 98f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 99cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void Finish() { } 100cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 101cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 102cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class ObjectAttributeEmitter : public AttributeEmitter { 103cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCObjectStreamer &Streamer; 104cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola StringRef CurrentVendor; 105cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola SmallString<64> Contents; 106cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 107cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 108cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola ObjectAttributeEmitter(MCObjectStreamer &Streamer_) : 109cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer(Streamer_), CurrentVendor("") { } 110cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 111cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void MaybeSwitchVendor(StringRef Vendor) { 112cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola assert(!Vendor.empty() && "Vendor cannot be empty."); 113cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 114cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola if (CurrentVendor.empty()) 115cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola CurrentVendor = Vendor; 116cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola else if (CurrentVendor == Vendor) 117cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola return; 118cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola else 119cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Finish(); 120cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 121cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola CurrentVendor = Vendor; 122cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1233336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola assert(Contents.size() == 0); 124cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 125cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 126cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void EmitAttribute(unsigned Attribute, unsigned Value) { 127cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // FIXME: should be ULEB 128cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Contents += Attribute; 129cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Contents += Value; 130cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 131cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 132f009a961caa75465999ef3bc764984d97a7da331Jason W Kim void EmitTextAttribute(unsigned Attribute, StringRef String) { 133f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Contents += Attribute; 134c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim Contents += UppercaseString(String); 135f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Contents += 0; 136f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 137f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 138cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void Finish() { 1393336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t ContentsSize = Contents.size(); 1403336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1413336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola // Vendor size + Vendor name + '\0' 1423336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t VendorHeaderSize = 4 + CurrentVendor.size() + 1; 143cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1443336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola // Tag + Tag Size 1453336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t TagHeaderSize = 1 + 4; 146cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1473336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(VendorHeaderSize + TagHeaderSize + ContentsSize, 4); 1483336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitBytes(CurrentVendor, 0); 1493336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(0, 1); // '\0' 1503336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1513336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(ARMBuildAttrs::File, 1); 1523336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(TagHeaderSize + ContentsSize, 4); 153cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 154cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer.EmitBytes(Contents, 0); 1553336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1563336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Contents.clear(); 157cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 158cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 159cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1607bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} // end of anonymous namespace 1617bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 162baf120fbe8056ef68fc91b16465590fdf2311c27Jim GrosbachMachineLocation ARMAsmPrinter:: 163baf120fbe8056ef68fc91b16465590fdf2311c27Jim GrosbachgetDebugValueLocation(const MachineInstr *MI) const { 164baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach MachineLocation Location; 165baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach assert(MI->getNumOperands() == 4 && "Invalid no. of machine operands!"); 166baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach // Frame address. Currently handles register +- offset only. 167baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm()) 168baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm()); 169baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach else { 170baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n"); 171baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach } 172baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach return Location; 173baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach} 174baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach 17527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel/// EmitDwarfRegOp - Emit dwarf register operation. 1760be77dff1147488814b8eea6ec8619f56e3d9f5eDevang Patelvoid ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { 17727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel const TargetRegisterInfo *RI = TM.getRegisterInfo(); 17827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) 1790be77dff1147488814b8eea6ec8619f56e3d9f5eDevang Patel AsmPrinter::EmitDwarfRegOp(MLoc); 18027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel else { 18127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned Reg = MLoc.getReg(); 18227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (Reg >= ARM::S0 && Reg <= ARM::S31) { 1830a6ea83f393d06fb424c470777a1c3e8a8c50ab1Devang Patel assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); 18427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S registers are described as bit-pieces of a register 18527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0) 18627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32) 18727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 18827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned SReg = Reg - ARM::S0; 18927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel bool odd = SReg & 0x1; 19027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned Rx = 256 + (SReg >> 1); 19127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 19227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_regx for S register"); 19327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_regx); 19427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 19527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment(Twine(SReg)); 19627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(Rx); 19727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 19827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (odd) { 19927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_bit_piece 32 32"); 20027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_bit_piece); 20127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 20227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 20327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } else { 20427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_bit_piece 32 0"); 20527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_bit_piece); 20627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 20727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(0); 20827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 20971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel } else if (Reg >= ARM::Q0 && Reg <= ARM::Q15) { 2100a6ea83f393d06fb424c470777a1c3e8a8c50ab1Devang Patel assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering"); 21171f3f1146f2ba2773f0467767b67c12258960f34Devang Patel // Q registers Q0-Q15 are described by composing two D registers together. 21271f3f1146f2ba2773f0467767b67c12258960f34Devang Patel // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8) 21371f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 21471f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned QReg = Reg - ARM::Q0; 21571f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned D1 = 256 + 2 * QReg; 21671f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned D2 = D1 + 1; 21771f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 21871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_regx for Q register: D1"); 21971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_regx); 22071f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(D1); 22171f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_piece 8"); 22271f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_piece); 22371f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(8); 22471f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 22571f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_regx for Q register: D2"); 22671f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_regx); 22771f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(D2); 22871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_piece 8"); 22971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_piece); 23071f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(8); 23127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 23227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 23327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel} 23427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 235953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattnervoid ARMAsmPrinter::EmitFunctionEntryLabel() { 236953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner if (AFI->isThumbFunction()) { 237ce79299f78bb04e76e1860ab119b85d69f3a19c7Jim Grosbach OutStreamer.EmitAssemblerFlag(MCAF_Code16); 2386469540adf63d94a876c2b623cb4ca70479647f7Rafael Espindola OutStreamer.EmitThumbFunc(CurrentFnSym); 239953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner } 240b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 241953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner OutStreamer.EmitLabel(CurrentFnSym); 242953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner} 243953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner 2442317e40539aac11da00bd587b5f0def04d989769Jim Grosbach/// runOnMachineFunction - This uses the EmitInstruction() 2457bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola/// method to print assembly for each instruction. 2467bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola/// 2477bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolabool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { 248a8e2989ece6dc46df59b0768184028257f913843Evan Cheng AFI = MF.getInfo<ARMFunctionInfo>(); 2496d63a728586d56eb3e881905beb9db27f520f5d3Evan Cheng MCP = MF.getConstantPool(); 250a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 251d49fe1b6bc4615684c2ec71140a21e9c4cd69ce3Chris Lattner return AsmPrinter::runOnMachineFunction(MF); 25232bd5f4f6a374f9ab0fcbd2cf6a8561019a6fd56Rafael Espindola} 25332bd5f4f6a374f9ab0fcbd2cf6a8561019a6fd56Rafael Espindola 254055b0310f862b91f33699037ce67d3ab8137c20cEvan Chengvoid ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 25535c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner raw_ostream &O, const char *Modifier) { 256055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng const MachineOperand &MO = MI->getOperand(OpNum); 2575cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov unsigned TF = MO.getTargetFlags(); 2585cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov 2592f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola switch (MO.getType()) { 2608bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner default: 2618bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner assert(0 && "<unknown operand type>"); 2625bafff36c798608a189c517d37527e4a38863071Bob Wilson case MachineOperand::MO_Register: { 2635bafff36c798608a189c517d37527e4a38863071Bob Wilson unsigned Reg = MO.getReg(); 2648bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner assert(TargetRegisterInfo::isPhysicalRegister(Reg)); 26535636281c7ab6eb128b4ced6bf7ae0b6b8458dd2Jim Grosbach assert(!MO.getSubReg() && "Subregs should be eliminated!"); 26635636281c7ab6eb128b4ced6bf7ae0b6b8458dd2Jim Grosbach O << ARMInstPrinter::getRegisterName(Reg); 2672f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 2685bafff36c798608a189c517d37527e4a38863071Bob Wilson } 269a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_Immediate: { 2705adb66a646e2ec32265263739f5b01c3f50c176aEvan Cheng int64_t Imm = MO.getImm(); 271632606c724ebcfa6a9da71c443151e7a65829c99Anton Korobeynikov O << '#'; 2725cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov if ((Modifier && strcmp(Modifier, "lo16") == 0) || 273650b7d76afbc7db2dd1a4590149d50a162bb25d8Jason W Kim (TF == ARMII::MO_LO16)) 2745cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":lower16:"; 2755cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov else if ((Modifier && strcmp(Modifier, "hi16") == 0) || 276650b7d76afbc7db2dd1a4590149d50a162bb25d8Jason W Kim (TF == ARMII::MO_HI16)) 2775cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":upper16:"; 278632606c724ebcfa6a9da71c443151e7a65829c99Anton Korobeynikov O << Imm; 2792f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 280a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 2812f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola case MachineOperand::MO_MachineBasicBlock: 2821b2eb0e8a6aaf034675b17be6d853cb1c666200fChris Lattner O << *MO.getMBB()->getSymbol(); 2832f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola return; 28484b19be6ab9544f72eafb11048a1121f5ea77c95Rafael Espindola case MachineOperand::MO_GlobalAddress: { 28546510a73e977273ec67747eb34cbdb43f815e451Dan Gohman const GlobalValue *GV = MO.getGlobal(); 2865cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov if ((Modifier && strcmp(Modifier, "lo16") == 0) || 2875cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov (TF & ARMII::MO_LO16)) 2885cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":lower16:"; 2895cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov else if ((Modifier && strcmp(Modifier, "hi16") == 0) || 2905cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov (TF & ARMII::MO_HI16)) 2915cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":upper16:"; 292d62f1b4168d4327c119642d28c26c836ae6717abChris Lattner O << *Mang->getSymbol(GV); 2937751ad92daeea5a3502fbc266ae814baec5c03e6Anton Korobeynikov 2940c08d092049c025c9ccf7143e39f39dc4e30d6b4Chris Lattner printOffset(MO.getOffset(), O); 2951d6111c5ac97c321782637b2cd72e2c3e4d3d694Jim Grosbach if (TF == ARMII::MO_PLT) 2960ae4a3357a556261f25b1584a2d9914637c69e65Lauro Ramos Venancio O << "(PLT)"; 2972f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 298a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 299a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_ExternalSymbol: { 30010b318bcb39218d2ed525e4862c854bc8d1baf63Chris Lattner O << *GetExternalSymbolSymbol(MO.getSymbolName()); 3011d6111c5ac97c321782637b2cd72e2c3e4d3d694Jim Grosbach if (TF == ARMII::MO_PLT) 3020ae4a3357a556261f25b1584a2d9914637c69e65Lauro Ramos Venancio O << "(PLT)"; 3032f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 304a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 3052f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola case MachineOperand::MO_ConstantPoolIndex: 3061b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner O << *GetCPISymbol(MO.getIndex()); 3072f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 308a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_JumpTableIndex: 3091b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner O << *GetJTISymbol(MO.getIndex()); 310a8e2989ece6dc46df59b0768184028257f913843Evan Cheng break; 3112f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola } 3127bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 3137bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 314055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng//===--------------------------------------------------------------------===// 315055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng 3160890cf124f00da3dc943c1882f4221955e0281edChris LattnerMCSymbol *ARMAsmPrinter:: 3170890cf124f00da3dc943c1882f4221955e0281edChris LattnerGetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2, 3180890cf124f00da3dc943c1882f4221955e0281edChris Lattner const MachineBasicBlock *MBB) const { 3190890cf124f00da3dc943c1882f4221955e0281edChris Lattner SmallString<60> Name; 3200890cf124f00da3dc943c1882f4221955e0281edChris Lattner raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() 321bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner << getFunctionNumber() << '_' << uid << '_' << uid2 3220890cf124f00da3dc943c1882f4221955e0281edChris Lattner << "_set_" << MBB->getNumber(); 3239b97a73dedf736e14b04a3d1a153f10d25b2507bChris Lattner return OutContext.GetOrCreateSymbol(Name.str()); 3240890cf124f00da3dc943c1882f4221955e0281edChris Lattner} 3250890cf124f00da3dc943c1882f4221955e0281edChris Lattner 3260890cf124f00da3dc943c1882f4221955e0281edChris LattnerMCSymbol *ARMAsmPrinter:: 3270890cf124f00da3dc943c1882f4221955e0281edChris LattnerGetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const { 3280890cf124f00da3dc943c1882f4221955e0281edChris Lattner SmallString<60> Name; 3290890cf124f00da3dc943c1882f4221955e0281edChris Lattner raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI" 330281e7767df71b3f727ade80a16ff0c4fe5a49dd9Chris Lattner << getFunctionNumber() << '_' << uid << '_' << uid2; 3319b97a73dedf736e14b04a3d1a153f10d25b2507bChris Lattner return OutContext.GetOrCreateSymbol(Name.str()); 332bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner} 333bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner 334433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 335433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim GrosbachMCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel(void) const { 336433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach SmallString<60> Name; 337433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "SJLJEH" 338433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach << getFunctionNumber(); 339433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach return OutContext.GetOrCreateSymbol(Name.str()); 340433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach} 341433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 342055b0310f862b91f33699037ce67d3ab8137c20cEvan Chengbool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 343c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner unsigned AsmVariant, const char *ExtraCode, 344c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner raw_ostream &O) { 345a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Does this asm operand have a single letter operand modifier? 346a8e2989ece6dc46df59b0768184028257f913843Evan Cheng if (ExtraCode && ExtraCode[0]) { 347a8e2989ece6dc46df59b0768184028257f913843Evan Cheng if (ExtraCode[1] != 0) return true; // Unknown modifier. 3488e9ece75db5045ec057efbbdba6550fa0d85e695Anton Korobeynikov 349a8e2989ece6dc46df59b0768184028257f913843Evan Cheng switch (ExtraCode[0]) { 350a8e2989ece6dc46df59b0768184028257f913843Evan Cheng default: return true; // Unknown modifier. 3519b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson case 'a': // Print as a memory address. 3529b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson if (MI->getOperand(OpNum).isReg()) { 3532f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach O << "[" 3542f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 3552f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach << "]"; 3569b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson return false; 3579b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson } 3589b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson // Fallthrough 3599b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson case 'c': // Don't print "#" before an immediate operand. 3604f38b383d5089c49489a9a56d8efd0eb76048b3fBob Wilson if (!MI->getOperand(OpNum).isImm()) 3614f38b383d5089c49489a9a56d8efd0eb76048b3fBob Wilson return true; 3622317e40539aac11da00bd587b5f0def04d989769Jim Grosbach O << MI->getOperand(OpNum).getImm(); 3638f3434647d3d39b49475239e3be1b8afb06415cfBob Wilson return false; 364e21e39666e8a41ffd4971d8bb023b70b59297267Evan Cheng case 'P': // Print a VFP double precision register. 365d831cda3e74235704f163d5a18352584d537517aEvan Cheng case 'q': // Print a NEON quad precision register. 36635c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner printOperand(MI, OpNum, O); 36723a95704949b99ca07afe45c6946d0fa26baf9f3Evan Cheng return false; 3680628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher case 'y': // Print a VFP single precision register as indexed double. 3690628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher // This uses the ordering of the alias table to get the first 'd' register 3700628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher // that overlaps the 's' register. Also, s0 is an odd register, hence the 3710628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher // odd modulus check below. 3720628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher if (MI->getOperand(OpNum).isReg()) { 3730628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher unsigned Reg = MI->getOperand(OpNum).getReg(); 3740628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 3750628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher O << ARMInstPrinter::getRegisterName(TRI->getAliasSet(Reg)[0]) << 3760628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher (((Reg % 2) == 1) ? "[0]" : "[1]"); 3770628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher return false; 3780628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher } 3794db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher return true; 380fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'B': // Bitwise inverse of integer or symbol without a preceding #. 381e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher if (!MI->getOperand(OpNum).isImm()) 382e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher return true; 383e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher O << ~(MI->getOperand(OpNum).getImm()); 384e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher return false; 385fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'L': // The low 16 bits of an immediate constant. 3864db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher if (!MI->getOperand(OpNum).isImm()) 3874db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher return true; 3884db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher O << (MI->getOperand(OpNum).getImm() & 0xffff); 3894db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher return false; 3903c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher case 'M': { // A register range suitable for LDM/STM. 3913c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher if (!MI->getOperand(OpNum).isReg()) 3923c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher return true; 3933c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher const MachineOperand &MO = MI->getOperand(OpNum); 3943c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher unsigned RegBegin = MO.getReg(); 3953c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // This takes advantage of the 2 operand-ness of ldm/stm and that we've 3963c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // already got the operands in registers that are operands to the 3973c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // inline asm statement. 3983c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher 3993c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher O << "{" << ARMInstPrinter::getRegisterName(RegBegin); 4003c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher 4013c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // FIXME: The register allocator not only may not have given us the 4023c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // registers in sequence, but may not be in ascending registers. This 4033c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // will require changes in the register allocator that'll need to be 4043c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // propagated down here if the operands change. 4053c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher unsigned RegOps = OpNum + 1; 4063c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher while (MI->getOperand(RegOps).isReg()) { 4073c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher O << ", " 4083c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher << ARMInstPrinter::getRegisterName(MI->getOperand(RegOps).getReg()); 4093c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher RegOps++; 4103c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher } 4113c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher 4123c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher O << "}"; 4133c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher 4143c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher return false; 4153c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher } 4163c14f24c9da3f811d3530e984e692acf1a471b91Eric Christopher // These modifiers are not yet supported. 417fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'p': // The high single-precision register of a VFP double-precision 418fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher // register. 419fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'e': // The low doubleword register of a NEON quad register. 420fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'f': // The high doubleword register of a NEON quad register. 421fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'h': // A range of VFP/NEON registers suitable for VLD1/VST1. 422fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'Q': // The least significant register of a pair. 423fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'R': // The most significant register of a pair. 424fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'H': // The highest-numbered register of a pair. 425d984eb6073d5445f08fb0cea67a668b1b5e888e0Bob Wilson return true; 42684f60b7359e1aa90794bb19de2bbf4d25dc2f01dEvan Cheng } 427a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 428e9952213086c865eb678bd3f4c9c7d849f0249d2Jim Grosbach 42935c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner printOperand(MI, OpNum, O); 430a8e2989ece6dc46df59b0768184028257f913843Evan Cheng return false; 431a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 432a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 433224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilsonbool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 434055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng unsigned OpNum, unsigned AsmVariant, 435c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner const char *ExtraCode, 436c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner raw_ostream &O) { 4378f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher // Does this asm operand have a single letter operand modifier? 4388f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher if (ExtraCode && ExtraCode[0]) { 4398f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher if (ExtraCode[1] != 0) return true; // Unknown modifier. 4408f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher 4418f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher switch (ExtraCode[0]) { 44232bfb2c513c4efdc1db9967ddfecce8c922dda4fEric Christopher case 'A': // A memory operand for a VLD1/VST1 instruction. 4438f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher default: return true; // Unknown modifier. 4448f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher case 'm': // The base register of a memory operand. 4458f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher if (!MI->getOperand(OpNum).isReg()) 4468f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher return true; 4478f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher O << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()); 4488f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher return false; 4498f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher } 4508f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher } 4518f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher 452765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson const MachineOperand &MO = MI->getOperand(OpNum); 453765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson assert(MO.isReg() && "unexpected inline asm memory operand"); 4542317e40539aac11da00bd587b5f0def04d989769Jim Grosbach O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]"; 455224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson return false; 456224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson} 457224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson 458812209a58c5520c604bc9279aa069e5ae066e860Bob Wilsonvoid ARMAsmPrinter::EmitStartOfAsmFile(Module &M) { 4590fb34683b9e33238288d2af1e090582464df8387Bob Wilson if (Subtarget->isTargetDarwin()) { 4600fb34683b9e33238288d2af1e090582464df8387Bob Wilson Reloc::Model RelocM = TM.getRelocationModel(); 4610fb34683b9e33238288d2af1e090582464df8387Bob Wilson if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) { 4620fb34683b9e33238288d2af1e090582464df8387Bob Wilson // Declare all the text sections up front (before the DWARF sections 4630fb34683b9e33238288d2af1e090582464df8387Bob Wilson // emitted by AsmPrinter::doInitialization) so the assembler will keep 4640fb34683b9e33238288d2af1e090582464df8387Bob Wilson // them together at the beginning of the object file. This helps 4650fb34683b9e33238288d2af1e090582464df8387Bob Wilson // avoid out-of-range branches that are due a fundamental limitation of 4660fb34683b9e33238288d2af1e090582464df8387Bob Wilson // the way symbol offsets are encoded with the current Darwin ARM 4670fb34683b9e33238288d2af1e090582464df8387Bob Wilson // relocations. 468b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach const TargetLoweringObjectFileMachO &TLOFMacho = 4690d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman static_cast<const TargetLoweringObjectFileMachO &>( 4700d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman getObjFileLowering()); 47129e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getTextSection()); 47229e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection()); 47329e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection()); 47429e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson if (RelocM == Reloc::DynamicNoPIC) { 47529e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson const MCSection *sect = 47622772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner OutContext.getMachOSection("__TEXT", "__symbol_stub4", 47722772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner MCSectionMachO::S_SYMBOL_STUBS, 47822772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner 12, SectionKind::getText()); 47929e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(sect); 48029e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson } else { 48129e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson const MCSection *sect = 48222772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner OutContext.getMachOSection("__TEXT", "__picsymbolstub4", 48322772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner MCSectionMachO::S_SYMBOL_STUBS, 48422772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner 16, SectionKind::getText()); 48529e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(sect); 48629e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson } 48763db594559dc8eac666204c7907bae664f5234daBob Wilson const MCSection *StaticInitSect = 48863db594559dc8eac666204c7907bae664f5234daBob Wilson OutContext.getMachOSection("__TEXT", "__StaticInit", 48963db594559dc8eac666204c7907bae664f5234daBob Wilson MCSectionMachO::S_REGULAR | 49063db594559dc8eac666204c7907bae664f5234daBob Wilson MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS, 49163db594559dc8eac666204c7907bae664f5234daBob Wilson SectionKind::getText()); 49263db594559dc8eac666204c7907bae664f5234daBob Wilson OutStreamer.SwitchSection(StaticInitSect); 4930fb34683b9e33238288d2af1e090582464df8387Bob Wilson } 4940fb34683b9e33238288d2af1e090582464df8387Bob Wilson } 4950fb34683b9e33238288d2af1e090582464df8387Bob Wilson 496e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach // Use unified assembler syntax. 497afd1cc25786f68ca56a63d29ea2bd297990e9f81Jason W Kim OutStreamer.EmitAssemblerFlag(MCAF_SyntaxUnified); 498d61eca533081580d56fabee38f86507d8019ca75Anton Korobeynikov 49988ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov // Emit ARM Build Attributes 50088ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov if (Subtarget->isTargetELF()) { 501b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 502def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim emitAttributes(); 50388ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov } 5047bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 5057bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 5060f3cc657387d44cd7c56e4ddea896a50ab9106b8Anton Korobeynikov 5074a071d667d995b00e7853243ff9c7c1269324478Chris Lattnervoid ARMAsmPrinter::EmitEndOfAsmFile(Module &M) { 5085be54b00bdbe1abd02dde46ca2c4b0e5aaf7b537Evan Cheng if (Subtarget->isTargetDarwin()) { 509f61159b574155b056dbd5d6d44f47f753d424056Chris Lattner // All darwin targets use mach-o. 5100d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman const TargetLoweringObjectFileMachO &TLOFMacho = 5110d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 512b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MachineModuleInfoMachO &MMIMacho = 513b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MMI->getObjFileInfo<MachineModuleInfoMachO>(); 514e9952213086c865eb678bd3f4c9c7d849f0249d2Jim Grosbach 515a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Output non-lazy-pointers for external and common global variables. 516b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 517cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling 518b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner if (!Stubs.empty()) { 519ff4bc460c52c1f285d8a56da173641bf92d49e3fChris Lattner // Switch with ".non_lazy_symbol_pointer" directive. 5206c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 521c076a9793936b140364671a5e39ee53bd266c6c3Chris Lattner EmitAlignment(2); 522b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 523becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // L_foo$stub: 524becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.EmitLabel(Stubs[i].first); 525becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // .indirect_symbol _foo 52652a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 52752a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol); 528cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 52952a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling if (MCSym.getInt()) 530cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling // External to current translation unit. 531cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); 532cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling else 533cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling // Internal to current translation unit. 5345e1b55d67288874f8669621b9176814ce449f8f5Bill Wendling // 5351b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // When we place the LSDA into the TEXT section, the type info 5361b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // pointers need to be indirect and pc-rel. We accomplish this by 5371b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // using NLPs; however, sometimes the types are local to the file. 5381b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // We need to fill in the value for the NLP in those cases. 53952a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(), 54052a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutContext), 541cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 4/*size*/, 0/*addrspace*/); 542ae94e594164b193236002516970aeec4c4574768Evan Cheng } 543becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling 544becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling Stubs.clear(); 545becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.AddBlankLine(); 546a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 547a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 548e4d9ea83c0d4bcc535bd978e1afa599eb3ebb893Chris Lattner Stubs = MMIMacho.GetHiddenGVStubList(); 549e4d9ea83c0d4bcc535bd978e1afa599eb3ebb893Chris Lattner if (!Stubs.empty()) { 5506c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner OutStreamer.SwitchSection(getObjFileLowering().getDataSection()); 551f3231de60bb64c3f6fc6770b3e6174f4f839a4f3Chris Lattner EmitAlignment(2); 552becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 553becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // L_foo$stub: 554becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.EmitLabel(Stubs[i].first); 555becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // .long _foo 556cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling OutStreamer.EmitValue(MCSymbolRefExpr:: 557cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling Create(Stubs[i].second.getPointer(), 558cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling OutContext), 559becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling 4/*size*/, 0/*addrspace*/); 560becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling } 561cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 562cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling Stubs.clear(); 563cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling OutStreamer.AddBlankLine(); 564ae94e594164b193236002516970aeec4c4574768Evan Cheng } 565ae94e594164b193236002516970aeec4c4574768Evan Cheng 566a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Funny Darwin hack: This flag tells the linker that no global symbols 567a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // contain code that falls through to other global symbols (e.g. the obvious 568a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // implementation of multiple entry points). If this doesn't occur, the 569a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // linker can safely perform dead code stripping. Since LLVM never 570a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // generates code that does this, it is always safe to set. 571a5ad93a10a5435f21090b09edb6b3a7e44967648Chris Lattner OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 572b01c4bbb4573e0007444e218b683840e4519e0c8Rafael Espindola } 5737bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 5740bd89712c03c59ea43ce37763685e7f7c0bdd977Anton Korobeynikov 57597f06937449c593a248dbbb1365e6ae408fb9decChris Lattner//===----------------------------------------------------------------------===// 576def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// Helper routines for EmitStartOfAsmFile() and EmitEndOfAsmFile() 577def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// FIXME: 578def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// The following seem like one-off assembler flags, but they actually need 579fa7fb64fad0e46e7329e4ba84a1edec5e979c31aJim Grosbach// to appear in the .ARM.attributes section in ELF. 580def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// Instead of subclassing the MCELFStreamer, we do the work here. 581def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 582def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kimvoid ARMAsmPrinter::emitAttributes() { 583fa7fb64fad0e46e7329e4ba84a1edec5e979c31aJim Grosbach 58417b443df4368acfad853d09858c033c45c468d5cJason W Kim emitARMAttributeSection(); 58517b443df4368acfad853d09858c033c45c468d5cJason W Kim 586728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* GAS expect .fpu to be emitted, regardless of VFP build attribute */ 587728ff0db783152ed4f21f7746bd7874b49708172Renato Golin bool emitFPU = false; 588cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttributeEmitter *AttrEmitter; 589728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (OutStreamer.hasRawTextSupport()) { 590cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter = new AsmAttributeEmitter(OutStreamer); 591728ff0db783152ed4f21f7746bd7874b49708172Renato Golin emitFPU = true; 592728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } else { 593cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCObjectStreamer &O = static_cast<MCObjectStreamer&>(OutStreamer); 594cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter = new ObjectAttributeEmitter(O); 595cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 596cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 597cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->MaybeSwitchVendor("aeabi"); 598cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 599def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim std::string CPUString = Subtarget->getCPUString(); 600f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 601f009a961caa75465999ef3bc764984d97a7da331Jason W Kim if (CPUString == "cortex-a8" || 602f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Subtarget->isCortexA8()) { 603c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "cortex-a8"); 604f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7); 605f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile, 606f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::ApplicationProfile); 607f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 608f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 609f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 610f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowThumb32); 611f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // Fixme: figure out when this is emitted. 612f009a961caa75465999ef3bc764984d97a7da331Jason W Kim //AttrEmitter->EmitAttribute(ARMBuildAttrs::WMMX_arch, 613f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // ARMBuildAttrs::AllowWMMXv1); 614f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // 615f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 616f009a961caa75465999ef3bc764984d97a7da331Jason W Kim /// ADD additional Else-cases here! 617b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola } else if (CPUString == "xscale") { 618b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v5TEJ); 619b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 620b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola ARMBuildAttrs::Allowed); 621b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 622b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola ARMBuildAttrs::Allowed); 623f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } else if (CPUString == "generic") { 6247179d1e5c0acfbb0980eaf85f266cd8981dbd12dDale Johannesen // FIXME: Why these defaults? 6257179d1e5c0acfbb0980eaf85f266cd8981dbd12dDale Johannesen AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T); 626f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 627f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 628f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 629f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 630cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 631def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 632e89a05337a9946040251a5f19165c41b9a1a7b27Renato Golin if (Subtarget->hasNEON() && emitFPU) { 633728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* NEON is not exactly a VFP architecture, but GAS emit one of 634728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * neon/vfpv3/vfpv2 for .fpu parameters */ 635728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::Advanced_SIMD_arch, "neon"); 636728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* If emitted for NEON, omit from VFP below, since you can have both 637728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * NEON and VFP in build attributes but only one .fpu */ 638728ff0db783152ed4f21f7746bd7874b49708172Renato Golin emitFPU = false; 639728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 640728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 641728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* VFPv3 + .fpu */ 642728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (Subtarget->hasVFP3()) { 643728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 644728ff0db783152ed4f21f7746bd7874b49708172Renato Golin ARMBuildAttrs::AllowFPv3A); 645728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (emitFPU) 646728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "vfpv3"); 647728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 648728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* VFPv2 + .fpu */ 649728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } else if (Subtarget->hasVFP2()) { 650f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 651f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowFPv2); 652728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (emitFPU) 653728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "vfpv2"); 654728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 655728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 656728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* TODO: ARMBuildAttrs::Allowed is not completely accurate, 657375db7f39af8da118f3947d24ea91967c4a6b526Cameron Zwarich * since NEON can have 1 (allowed) or 2 (MAC operations) */ 658728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (Subtarget->hasNEON()) { 659728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitAttribute(ARMBuildAttrs::Advanced_SIMD_arch, 660728ff0db783152ed4f21f7746bd7874b49708172Renato Golin ARMBuildAttrs::Allowed); 661728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 662def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 663def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // Signal various FP modes. 664def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (!UnsafeFPMath) { 665f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 666f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 667f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 668f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 669def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim } 670def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 671def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (NoInfsFPMath && NoNaNsFPMath) 672f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 673f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 674def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim else 675f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 676f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowIEE754); 677def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 678f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // FIXME: add more flags to ARMBuildAttrs.h 679def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // 8-bytes alignment stuff. 680cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1); 681cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1); 682def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 683def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // Hard float. Use both S and D registers and conform to AAPCS-VFP. 684def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) { 685cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_HardFP_use, 3); 686cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_VFP_args, 1); 687def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim } 688def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // FIXME: Should we signal R9 usage? 689cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 690f009a961caa75465999ef3bc764984d97a7da331Jason W Kim if (Subtarget->hasDivide()) 691f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1); 692cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 693cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->Finish(); 694cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola delete AttrEmitter; 695def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim} 696def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 69717b443df4368acfad853d09858c033c45c468d5cJason W Kimvoid ARMAsmPrinter::emitARMAttributeSection() { 69817b443df4368acfad853d09858c033c45c468d5cJason W Kim // <format-version> 69917b443df4368acfad853d09858c033c45c468d5cJason W Kim // [ <section-length> "vendor-name" 70017b443df4368acfad853d09858c033c45c468d5cJason W Kim // [ <file-tag> <size> <attribute>* 70117b443df4368acfad853d09858c033c45c468d5cJason W Kim // | <section-tag> <size> <section-number>* 0 <attribute>* 70217b443df4368acfad853d09858c033c45c468d5cJason W Kim // | <symbol-tag> <size> <symbol-number>* 0 <attribute>* 70317b443df4368acfad853d09858c033c45c468d5cJason W Kim // ]+ 70417b443df4368acfad853d09858c033c45c468d5cJason W Kim // ]* 70517b443df4368acfad853d09858c033c45c468d5cJason W Kim 70617b443df4368acfad853d09858c033c45c468d5cJason W Kim if (OutStreamer.hasRawTextSupport()) 70717b443df4368acfad853d09858c033c45c468d5cJason W Kim return; 70817b443df4368acfad853d09858c033c45c468d5cJason W Kim 70917b443df4368acfad853d09858c033c45c468d5cJason W Kim const ARMElfTargetObjectFile &TLOFELF = 71017b443df4368acfad853d09858c033c45c468d5cJason W Kim static_cast<const ARMElfTargetObjectFile &> 71117b443df4368acfad853d09858c033c45c468d5cJason W Kim (getObjFileLowering()); 71217b443df4368acfad853d09858c033c45c468d5cJason W Kim 71317b443df4368acfad853d09858c033c45c468d5cJason W Kim OutStreamer.SwitchSection(TLOFELF.getAttributesSection()); 714def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 715cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // Format version 716cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola OutStreamer.EmitIntValue(0x41, 1); 71717b443df4368acfad853d09858c033c45c468d5cJason W Kim} 71817b443df4368acfad853d09858c033c45c468d5cJason W Kim 719def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim//===----------------------------------------------------------------------===// 72097f06937449c593a248dbbb1365e6ae408fb9decChris Lattner 721988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbachstatic MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber, 722988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach unsigned LabelId, MCContext &Ctx) { 723988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach 724988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach MCSymbol *Label = Ctx.GetOrCreateSymbol(Twine(Prefix) 725988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId)); 726988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach return Label; 727988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach} 728988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach 7292c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbachstatic MCSymbolRefExpr::VariantKind 7302c4d5125c708bb35140fc2a40b02beb1add101dbJim GrosbachgetModifierVariantKind(ARMCP::ARMCPModifier Modifier) { 7312c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach switch (Modifier) { 7322c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach default: llvm_unreachable("Unknown modifier!"); 7332c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::no_modifier: return MCSymbolRefExpr::VK_None; 7342c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::TLSGD: return MCSymbolRefExpr::VK_ARM_TLSGD; 7352c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::TPOFF: return MCSymbolRefExpr::VK_ARM_TPOFF; 7362c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOTTPOFF: return MCSymbolRefExpr::VK_ARM_GOTTPOFF; 7372c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOT: return MCSymbolRefExpr::VK_ARM_GOT; 7382c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOTOFF: return MCSymbolRefExpr::VK_ARM_GOTOFF; 7392c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach } 7402c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach return MCSymbolRefExpr::VK_None; 7412c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach} 7422c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach 7435de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan ChengMCSymbol *ARMAsmPrinter::GetARMGVSymbol(const GlobalValue *GV) { 7445de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng bool isIndirect = Subtarget->isTargetDarwin() && 7455de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel()); 7465de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng if (!isIndirect) 7475de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return Mang->getSymbol(GV); 7485de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 7495de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // FIXME: Remove this when Darwin transition to @GOT like syntax. 7505de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *MCSym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 7515de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MachineModuleInfoMachO &MMIMachO = 7525de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MMI->getObjFileInfo<MachineModuleInfoMachO>(); 7535de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MachineModuleInfoImpl::StubValueTy &StubSym = 7545de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(MCSym) : 7555de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MMIMachO.getGVStubEntry(MCSym); 7565de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng if (StubSym.getPointer() == 0) 7575de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng StubSym = MachineModuleInfoImpl:: 7585de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); 7595de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return MCSym; 7605de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng} 7615de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 7625df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbachvoid ARMAsmPrinter:: 7635df08d8f55f47aafc671c358d971dbcc10dfdeefJim GrosbachEmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { 7645df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach int Size = TM.getTargetData()->getTypeAllocSize(MCPV->getType()); 7655df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7665df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV); 7675df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7687c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSymbol *MCSym; 7695df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach if (ACPV->isLSDA()) { 7707c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach SmallString<128> Str; 7717c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach raw_svector_ostream OS(Str); 7725df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach OS << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber(); 7737c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = OutContext.GetOrCreateSymbol(OS.str()); 7745df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else if (ACPV->isBlockAddress()) { 7757c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = GetBlockAddressSymbol(ACPV->getBlockAddress()); 7765df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else if (ACPV->isGlobalValue()) { 7775df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach const GlobalValue *GV = ACPV->getGV(); 7785de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSym = GetARMGVSymbol(GV); 7795df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else { 7805df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach assert(ACPV->isExtSymbol() && "unrecognized constant pool value"); 7817c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = GetExternalSymbolSymbol(ACPV->getSymbol()); 7825df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 7835df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7845df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach // Create an MCSymbol for the reference. 7852c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *Expr = 7862c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbolRefExpr::Create(MCSym, getModifierVariantKind(ACPV->getModifier()), 7872c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 7882c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach 7892c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach if (ACPV->getPCAdjustment()) { 7902c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbol *PCLabel = getPICLabel(MAI->getPrivateGlobalPrefix(), 7912c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach getFunctionNumber(), 7922c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach ACPV->getLabelId(), 7932c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 7942c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *PCRelExpr = MCSymbolRefExpr::Create(PCLabel, OutContext); 7952c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach PCRelExpr = 7962c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCBinaryExpr::CreateAdd(PCRelExpr, 7972c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCConstantExpr::Create(ACPV->getPCAdjustment(), 7982c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext), 7992c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 8002c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach if (ACPV->mustAddCurrentAddress()) { 8012c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach // We want "(<expr> - .)", but MC doesn't have a concept of the '.' 8022c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach // label, so just emit a local label end reference that instead. 8032c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbol *DotSym = OutContext.CreateTempSymbol(); 8042c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutStreamer.EmitLabel(DotSym); 8052c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *DotExpr = MCSymbolRefExpr::Create(DotSym, OutContext); 8062c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach PCRelExpr = MCBinaryExpr::CreateSub(PCRelExpr, DotExpr, OutContext); 8075df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 8082c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach Expr = MCBinaryExpr::CreateSub(Expr, PCRelExpr, OutContext); 8095df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 8102c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutStreamer.EmitValue(Expr, Size); 8115df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach} 8125df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 813a2244cb38781e596110023399c7902b5ee5087feJim Grosbachvoid ARMAsmPrinter::EmitJumpTable(const MachineInstr *MI) { 814a2244cb38781e596110023399c7902b5ee5087feJim Grosbach unsigned Opcode = MI->getOpcode(); 815a2244cb38781e596110023399c7902b5ee5087feJim Grosbach int OpNum = 1; 816a2244cb38781e596110023399c7902b5ee5087feJim Grosbach if (Opcode == ARM::BR_JTadd) 817a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OpNum = 2; 818a2244cb38781e596110023399c7902b5ee5087feJim Grosbach else if (Opcode == ARM::BR_JTm) 819a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OpNum = 3; 820a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 821a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineOperand &MO1 = MI->getOperand(OpNum); 822a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id 823a2244cb38781e596110023399c7902b5ee5087feJim Grosbach unsigned JTI = MO1.getIndex(); 824a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 825a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Emit a label for the jump table. 826a2244cb38781e596110023399c7902b5ee5087feJim Grosbach MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 827a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutStreamer.EmitLabel(JTISymbol); 828a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 829a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Emit each entry of the table. 830a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); 831a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); 832a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; 833a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 834a2244cb38781e596110023399c7902b5ee5087feJim Grosbach for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { 835a2244cb38781e596110023399c7902b5ee5087feJim Grosbach MachineBasicBlock *MBB = JTBBs[i]; 836a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Construct an MCExpr for the entry. We want a value of the form: 837a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // (BasicBlockAddr - TableBeginAddr) 838a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // 839a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // For example, a table with entries jumping to basic blocks BB0 and BB1 840a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // would look like: 841a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // LJTI_0_0: 842a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // .word (LBB0 - LJTI_0_0) 843a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // .word (LBB1 - LJTI_0_0) 844a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MCExpr *Expr = MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext); 845a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 846a2244cb38781e596110023399c7902b5ee5087feJim Grosbach if (TM.getRelocationModel() == Reloc::PIC_) 847a2244cb38781e596110023399c7902b5ee5087feJim Grosbach Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(JTISymbol, 848a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutContext), 849a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutContext); 850a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutStreamer.EmitValue(Expr, 4); 851a2244cb38781e596110023399c7902b5ee5087feJim Grosbach } 852a2244cb38781e596110023399c7902b5ee5087feJim Grosbach} 853a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 854882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbachvoid ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) { 855882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach unsigned Opcode = MI->getOpcode(); 856882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; 857882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineOperand &MO1 = MI->getOperand(OpNum); 858882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id 859882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach unsigned JTI = MO1.getIndex(); 860882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 861882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Emit a label for the jump table. 862882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 863882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitLabel(JTISymbol); 864882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 865882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Emit each entry of the table. 866882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); 867882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); 868882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; 869205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach unsigned OffsetWidth = 4; 870d092a87ba3f905a6801a0bdf816267329cf0391cJim Grosbach if (MI->getOpcode() == ARM::t2TBB_JT) 871205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OffsetWidth = 1; 872d092a87ba3f905a6801a0bdf816267329cf0391cJim Grosbach else if (MI->getOpcode() == ARM::t2TBH_JT) 873205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OffsetWidth = 2; 874882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 875882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { 876882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MachineBasicBlock *MBB = JTBBs[i]; 877205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::Create(MBB->getSymbol(), 878205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 879882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // If this isn't a TBB or TBH, the entries are direct branch instructions. 880205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach if (OffsetWidth == 4) { 881882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCInst BrInst; 882882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach BrInst.setOpcode(ARM::t2B); 883205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr)); 884882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitInstruction(BrInst); 885882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach continue; 886882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 887882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Otherwise it's an offset from the dispatch instruction. Construct an 888205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // MCExpr for the entry. We want a value of the form: 889205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // (BasicBlockAddr - TableBeginAddr) / 2 890205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // 891205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // For example, a TBB table with entries jumping to basic blocks BB0 and BB1 892205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // would look like: 893205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // LJTI_0_0: 894205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // .byte (LBB0 - LJTI_0_0) / 2 895205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // .byte (LBB1 - LJTI_0_0) / 2 896205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach const MCExpr *Expr = 897205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach MCBinaryExpr::CreateSub(MBBSymbolExpr, 898205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach MCSymbolRefExpr::Create(JTISymbol, OutContext), 899205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 900205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach Expr = MCBinaryExpr::CreateDiv(Expr, MCConstantExpr::Create(2, OutContext), 901205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 902205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutStreamer.EmitValue(Expr, OffsetWidth); 903882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 904882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach} 905882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 9062d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbachvoid ARMAsmPrinter::PrintDebugValueComment(const MachineInstr *MI, 9072d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach raw_ostream &OS) { 9082d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach unsigned NOps = MI->getNumOperands(); 9092d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach assert(NOps==4); 9102d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; 9112d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach // cast away const; DIetc do not take const operands for some reason. 9122d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata())); 9132d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << V.getName(); 9142d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << " <- "; 9152d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach // Frame address. Currently handles register +- offset only. 9162d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm()); 9172d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS); 9182d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << ']'; 9192d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << "+"; 9202d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach printOperand(MI, NOps-2, OS); 9212d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach} 9222d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach 92340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbachstatic void populateADROperands(MCInst &Inst, unsigned Dest, 92440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach const MCSymbol *Label, 92540edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach unsigned pred, unsigned ccreg, 92640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MCContext &Ctx) { 92740edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, Ctx); 92840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateReg(Dest)); 92940edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateExpr(SymbolExpr)); 93040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach // Add predicate operands. 93140edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateImm(pred)); 93240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateReg(ccreg)); 93340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach} 93440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach 9354d7286083537833880901953d29786cf831affc4Anton Korobeynikovvoid ARMAsmPrinter::EmitPatchedInstruction(const MachineInstr *MI, 9364d7286083537833880901953d29786cf831affc4Anton Korobeynikov unsigned Opcode) { 9374d7286083537833880901953d29786cf831affc4Anton Korobeynikov MCInst TmpInst; 9384d7286083537833880901953d29786cf831affc4Anton Korobeynikov 9394d7286083537833880901953d29786cf831affc4Anton Korobeynikov // Emit the instruction as usual, just patch the opcode. 9404d7286083537833880901953d29786cf831affc4Anton Korobeynikov LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 9414d7286083537833880901953d29786cf831affc4Anton Korobeynikov TmpInst.setOpcode(Opcode); 9424d7286083537833880901953d29786cf831affc4Anton Korobeynikov OutStreamer.EmitInstruction(TmpInst); 9434d7286083537833880901953d29786cf831affc4Anton Korobeynikov} 9444d7286083537833880901953d29786cf831affc4Anton Korobeynikov 94557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikovvoid ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) { 94657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(MI->getFlag(MachineInstr::FrameSetup) && 94757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only instruction which are involved into frame setup code are allowed"); 94857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 94957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov const MachineFunction &MF = *MI->getParent()->getParent(); 95057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 951b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const ARMFunctionInfo &AFI = *MF.getInfo<ARMFunctionInfo>(); 95257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 95357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov unsigned FramePtr = RegInfo->getFrameRegister(MF); 95457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov unsigned Opc = MI->getOpcode(); 9557a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned SrcReg, DstReg; 9567a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov 9573daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov if (Opc == ARM::tPUSH || Opc == ARM::tLDRpci) { 9583daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // Two special cases: 9593daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // 1) tPUSH does not have src/dst regs. 9603daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // 2) for Thumb1 code we sometimes materialize the constant via constpool 9613daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // load. Yes, this is pretty fragile, but for now I don't see better 9623daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // way... :( 9637a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov SrcReg = DstReg = ARM::SP; 9647a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov } else { 9653daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov SrcReg = MI->getOperand(1).getReg(); 9667a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov DstReg = MI->getOperand(0).getReg(); 9677a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov } 96857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 96957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Try to figure out the unwinding opcode out of src / dst regs. 97057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (MI->getDesc().mayStore()) { 97157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Register saves. 97257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(DstReg == ARM::SP && 97357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a destination reg is supported"); 97457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 97557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov SmallVector<unsigned, 4> RegList; 9767a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Skip src & dst reg, and pred ops. 9777a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned StartOp = 2 + 2; 9787a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Use all the operands. 9797a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned NumOffset = 0; 9807a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov 98157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov switch (Opc) { 98257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov default: 98357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 98457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 9857a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tPUSH: 9867a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Special case here: no src & dst reg, but two extra imp ops. 9877a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov StartOp = 2; NumOffset = 2; 98857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::STMDB_UPD: 9897a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::t2STMDB_UPD: 99057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::VSTMDDB_UPD: 99157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(SrcReg == ARM::SP && 99257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a source reg is supported"); 9937a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; 9947a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov i != NumOps; ++i) 99557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov RegList.push_back(MI->getOperand(i).getReg()); 99657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 99757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::STR_PRE: 99857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(MI->getOperand(2).getReg() == ARM::SP && 99957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a source reg is supported"); 100057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov RegList.push_back(SrcReg); 100157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 100257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 100357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov OutStreamer.EmitRegSave(RegList, Opc == ARM::VSTMDDB_UPD); 100457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else { 100557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Changes of stack / frame pointer. 100657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (SrcReg == ARM::SP) { 100757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov int64_t Offset = 0; 100857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov switch (Opc) { 100957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov default: 101057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 101157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 101257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::MOVr: 101357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = 0; 101457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 101557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::ADDri: 101657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = -MI->getOperand(2).getImm(); 101757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 101857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::SUBri: 1019f6fd90910a552ad9883f031350ae517e26dfdb44Jim Grosbach Offset = MI->getOperand(2).getImm(); 102057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 10217a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tSUBspi: 1022f6fd90910a552ad9883f031350ae517e26dfdb44Jim Grosbach Offset = MI->getOperand(2).getImm()*4; 10237a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov break; 10247a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tADDspi: 10257a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tADDrSPi: 10267a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov Offset = -MI->getOperand(2).getImm()*4; 10277a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov break; 1028b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov case ARM::tLDRpci: { 1029b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // Grab the constpool index and check, whether it corresponds to 1030b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // original or cloned constpool entry. 1031b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov unsigned CPI = MI->getOperand(1).getIndex(); 1032b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const MachineConstantPool *MCP = MF.getConstantPool(); 1033b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov if (CPI >= MCP->getConstants().size()) 1034b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov CPI = AFI.getOriginalCPIdx(CPI); 1035b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov assert(CPI != -1U && "Invalid constpool index"); 1036b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov 1037b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // Derive the actual offset. 1038b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const MachineConstantPoolEntry &CPE = MCP->getConstants()[CPI]; 1039b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov assert(!CPE.isMachineConstantPoolEntry() && "Invalid constpool entry"); 1040b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // FIXME: Check for user, it should be "add" instruction! 1041b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov Offset = -cast<ConstantInt>(CPE.Val.ConstVal)->getSExtValue(); 10423daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov break; 104357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 1044b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov } 104557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 104657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (DstReg == FramePtr && FramePtr != ARM::SP) 1047e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // Set-up of the frame pointer. Positive values correspond to "add" 1048e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // instruction. 1049e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov OutStreamer.EmitSetFP(FramePtr, ARM::SP, -Offset); 105057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov else if (DstReg == ARM::SP) { 1051e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // Change of SP by an offset. Positive values correspond to "sub" 105257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // instruction. 105357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov OutStreamer.EmitPad(Offset); 105457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else { 105557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 105657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 105757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 105857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else if (DstReg == ARM::SP) { 105957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // FIXME: .movsp goes here 106057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 106157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 106257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 106357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov else { 106457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 106557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 106657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 106757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 106857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov} 106957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 107057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikovextern cl::opt<bool> EnableARMEHABI; 107157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 1072b454cdaebc6e4543099955ce043258c3903b1a0eJim Grosbachvoid ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { 10735de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng unsigned Opc = MI->getOpcode(); 10745de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng switch (Opc) { 10754d1522234192704f45dfd2527c2913fa60be616eChris Lattner default: break; 107672422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach case ARM::B: { 107772422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach // B is just a Bcc with an 'always' predicate. 107872422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach MCInst TmpInst; 107972422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 108072422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.setOpcode(ARM::Bcc); 108172422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach // Add predicate operands. 108272422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 108372422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 108472422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 108572422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach return; 108672422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach } 1087dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach case ARM::LDMIA_RET: { 1088dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // LDMIA_RET is just a normal LDMIA_UPD instruction that targets PC and as 1089dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // such has additional code-gen properties and scheduling information. 1090dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // To emit it, we just construct as normal and set the opcode to LDMIA_UPD. 1091dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach MCInst TmpInst; 1092dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 1093dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach TmpInst.setOpcode(ARM::LDMIA_UPD); 1094dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1095dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach return; 1096dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach } 109716f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach case ARM::t2LDMIA_RET: { 109816f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach // As above for LDMIA_RET. Map to the tPOP instruction. 109916f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach MCInst TmpInst; 110016f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 110116f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach TmpInst.setOpcode(ARM::t2LDMIA_UPD); 110216f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 110316f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach return; 110416f9924000a8d513353cd5c69d1d6307016fe280Jim Grosbach } 11054629d505011d6d88ce181985005761df0dd3cbefJim Grosbach case ARM::tPOP_RET: { 11064629d505011d6d88ce181985005761df0dd3cbefJim Grosbach // As above for LDMIA_RET. Map to the tPOP instruction. 11074629d505011d6d88ce181985005761df0dd3cbefJim Grosbach MCInst TmpInst; 11084629d505011d6d88ce181985005761df0dd3cbefJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 11094629d505011d6d88ce181985005761df0dd3cbefJim Grosbach TmpInst.setOpcode(ARM::tPOP); 11104629d505011d6d88ce181985005761df0dd3cbefJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11114629d505011d6d88ce181985005761df0dd3cbefJim Grosbach return; 11124629d505011d6d88ce181985005761df0dd3cbefJim Grosbach } 11139702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach 1114112f2390e19774a54c2dd50391b99fb617da0973Chris Lattner case ARM::t2MOVi32imm: assert(0 && "Should be lowered by thumb2it pass"); 11152d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach case ARM::DBG_VALUE: { 11162d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach if (isVerbose() && OutStreamer.hasRawTextSupport()) { 11172d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach SmallString<128> TmpStr; 11182d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach raw_svector_ostream OS(TmpStr); 11192d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach PrintDebugValueComment(MI, OS); 11202d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OutStreamer.EmitRawText(StringRef(OS.str())); 11212d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach } 11222d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach return; 11232d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach } 11243efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach case ARM::tBfar: { 11253efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach MCInst TmpInst; 11263efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach TmpInst.setOpcode(ARM::tBL); 11273efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create( 11283efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach MI->getOperand(0).getMBB()->getSymbol(), OutContext))); 11293efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11303efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach return; 11313efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach } 113240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach case ARM::LEApcrel: 1133d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::tLEApcrel: 113440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach case ARM::t2LEApcrel: { 1135dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach // FIXME: Need to also handle globals and externals 1136dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach MCInst TmpInst; 1137d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrel ? ARM::t2ADR 1138d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : (MI->getOpcode() == ARM::tLEApcrel ? ARM::tADR 1139d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : ARM::ADR)); 114040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach populateADROperands(TmpInst, MI->getOperand(0).getReg(), 114140edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach GetCPISymbol(MI->getOperand(1).getIndex()), 114240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(2).getImm(), MI->getOperand(3).getReg(), 114340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach OutContext); 1144dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1145dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach return; 1146dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach } 1147d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::LEApcrelJT: 1148d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::tLEApcrelJT: 1149d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::t2LEApcrelJT: { 11505d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach MCInst TmpInst; 1151d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrelJT ? ARM::t2ADR 1152d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : (MI->getOpcode() == ARM::tLEApcrelJT ? ARM::tADR 1153d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : ARM::ADR)); 115440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach populateADROperands(TmpInst, MI->getOperand(0).getReg(), 115540edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach GetARMJTIPICJumpTableLabel2(MI->getOperand(1).getIndex(), 115640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(2).getImm()), 115740edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(3).getImm(), MI->getOperand(4).getReg(), 115840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach OutContext); 11595d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11605d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach return; 11615d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach } 11622e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach case ARM::MOVPCRX: { 11632e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach MCInst TmpInst; 11642e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 11652e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 11662e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 11672e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach // Add predicate operands. 11682e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 11692e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 11702e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach // Add 's' bit operand (always reg0 for this) 11712e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 11722e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1173f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach return; 1174f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach } 1175f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach // Darwin call instructions are just normal call instructions with different 1176f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach // clobber semantics (they clobber R9). 1177f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9: 1178f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9_pred: 1179f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9: 1180f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9_pred: { 1181f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach unsigned newOpc; 1182f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach switch (Opc) { 1183f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach default: assert(0); 1184f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9: newOpc = ARM::BL; break; 1185f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9_pred: newOpc = ARM::BL_pred; break; 1186f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9: newOpc = ARM::BLX; break; 1187f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9_pred: newOpc = ARM::BLX_pred; break; 1188f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach } 1189f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach MCInst TmpInst; 1190f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 1191f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach TmpInst.setOpcode(newOpc); 1192f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11932e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach return; 11942e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach } 1195a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BXr9_CALL: 1196a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BX_CALL: { 1197a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1198a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1199a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1200a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1201a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1202a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1203a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1204a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1205a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1206a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1207a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1208a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1209a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1210a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1211a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::BX); 1212a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1213a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1214a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1215a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach return; 1216a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1217ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich case ARM::tBXr9_CALL: 1218ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich case ARM::tBX_CALL: { 1219ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich { 1220ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich MCInst TmpInst; 1221ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.setOpcode(ARM::tMOVr); 1222ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1223ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 122463b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach // Add predicate operands. 122563b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 122663b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1227ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich OutStreamer.EmitInstruction(TmpInst); 1228ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich } 1229ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich { 1230ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich MCInst TmpInst; 1231ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.setOpcode(ARM::tBX); 1232ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1233ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich // Add predicate operands. 1234ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1235ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(0)); 1236ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich OutStreamer.EmitInstruction(TmpInst); 1237ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich } 1238ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich return; 1239ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich } 1240a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BMOVPCRXr9_CALL: 1241a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BMOVPCRX_CALL: { 1242a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1243a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1244a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1245a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1246a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1247a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1248a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1249a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1250a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1251a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1252a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1253a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1254a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1255a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1256a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1257a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1258a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1259a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1260a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1261a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1262a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1263a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1264a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1265a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1266a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach return; 1267a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 126853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOVi16_ga_pcrel: 126953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOVi16_ga_pcrel: { 12705de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCInst TmpInst; 127153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); 12725de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 12735de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 127453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned TF = MI->getOperand(1).getTargetFlags(); 127553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = TF == ARMII::MO_LO16_NONLAZY_PIC; 12765de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const GlobalValue *GV = MI->getOperand(1).getGlobal(); 12775de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *GVSym = GetARMGVSymbol(GV); 12785de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext); 127953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (isPIC) { 128053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(), 128153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng getFunctionNumber(), 128253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI->getOperand(2).getImm(), OutContext); 128353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext); 128453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4; 128553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *PCRelExpr = 128653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ARMMCExpr::CreateLower16(MCBinaryExpr::CreateSub(GVSymExpr, 128753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCBinaryExpr::CreateAdd(LabelSymExpr, 128853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCConstantExpr::Create(PCAdj, OutContext), 12895de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutContext), OutContext), OutContext); 129053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); 129153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } else { 129253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *RefExpr= ARMMCExpr::CreateLower16(GVSymExpr, OutContext); 129353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); 129453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 129553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 12965de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add predicate operands. 12975de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 12985de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 12995de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add 's' bit operand (always reg0 for this) 13005de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13015de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutStreamer.EmitInstruction(TmpInst); 13025de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return; 13035de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 130453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOVTi16_ga_pcrel: 130553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOVTi16_ga_pcrel: { 13065de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCInst TmpInst; 130753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel 130853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARM::MOVTi16 : ARM::t2MOVTi16); 13095de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 13105de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 13115de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 131253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned TF = MI->getOperand(2).getTargetFlags(); 131353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = TF == ARMII::MO_HI16_NONLAZY_PIC; 13145de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const GlobalValue *GV = MI->getOperand(2).getGlobal(); 13155de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *GVSym = GetARMGVSymbol(GV); 13165de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext); 131753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (isPIC) { 131853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(), 131953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng getFunctionNumber(), 132053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI->getOperand(3).getImm(), OutContext); 132153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext); 132253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4; 132353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *PCRelExpr = 132453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ARMMCExpr::CreateUpper16(MCBinaryExpr::CreateSub(GVSymExpr, 132553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCBinaryExpr::CreateAdd(LabelSymExpr, 132653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCConstantExpr::Create(PCAdj, OutContext), 13275de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutContext), OutContext), OutContext); 132853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); 132953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } else { 133053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *RefExpr= ARMMCExpr::CreateUpper16(GVSymExpr, OutContext); 133153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); 133253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 13335de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add predicate operands. 13345de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 13355de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13365de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add 's' bit operand (always reg0 for this) 13375de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13385de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutStreamer.EmitInstruction(TmpInst); 13395de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return; 13405de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 1341fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach case ARM::tPICADD: { 1342fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // This is a pseudo op for a label + instruction sequence, which looks like: 1343fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // LPC0: 1344fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // add r0, pc 1345fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // This adds the address of LPC0 to r0. 1346fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach 1347fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Emit the label. 1348988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1349988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1350988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1351fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach 1352fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Form and emit the add. 1353fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach MCInst AddInst; 1354fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.setOpcode(ARM::tADDhirr); 1355fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1356fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1357fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1358fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Add predicate operands. 1359fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1360fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(0)); 1361fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach OutStreamer.EmitInstruction(AddInst); 1362fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach return; 1363fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach } 1364a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::PICADD: { 13654d1522234192704f45dfd2527c2913fa60be616eChris Lattner // This is a pseudo op for a label + instruction sequence, which looks like: 13664d1522234192704f45dfd2527c2913fa60be616eChris Lattner // LPC0: 13674d1522234192704f45dfd2527c2913fa60be616eChris Lattner // add r0, pc, r0 13684d1522234192704f45dfd2527c2913fa60be616eChris Lattner // This adds the address of LPC0 to r0. 1369b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 13704d1522234192704f45dfd2527c2913fa60be616eChris Lattner // Emit the label. 1371988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1372988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1373988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1374b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 1375f3f09527e6484143fcdef2ddfef0b2f016881e36Jim Grosbach // Form and emit the add. 13764d1522234192704f45dfd2527c2913fa60be616eChris Lattner MCInst AddInst; 13774d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.setOpcode(ARM::ADDrr); 13784d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 13794d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); 13804d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 13815b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach // Add predicate operands. 13825b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); 13835b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); 13845b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach // Add 's' bit operand (always reg0 for this) 13855b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(0)); 1386850d2e2a1b58ea30abed10ca955259d60d07d97aChris Lattner OutStreamer.EmitInstruction(AddInst); 13874d1522234192704f45dfd2527c2913fa60be616eChris Lattner return; 1388b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach } 1389a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTR: 1390a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRB: 1391a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRH: 1392a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDR: 1393a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRB: 1394a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRH: 1395a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSB: 1396a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSH: { 1397b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // This is a pseudo op for a label + instruction sequence, which looks like: 1398b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // LPC0: 1399a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach // OP r0, [pc, r0] 1400b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // The LCP0 label is referenced by a constant pool entry in order to get 1401b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // a PC-relative address at the ldr instruction. 1402b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1403b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Emit the label. 1404988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1405988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1406988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1407b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1408b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Form and emit the load 1409a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach unsigned Opcode; 1410a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach switch (MI->getOpcode()) { 1411a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach default: 1412a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach llvm_unreachable("Unexpected opcode!"); 14137e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach case ARM::PICSTR: Opcode = ARM::STRrs; break; 14147e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach case ARM::PICSTRB: Opcode = ARM::STRBrs; break; 1415a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRH: Opcode = ARM::STRH; break; 14163e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach case ARM::PICLDR: Opcode = ARM::LDRrs; break; 1417c1d30212e911d1e55ff6b25bffefb503708883c3Jim Grosbach case ARM::PICLDRB: Opcode = ARM::LDRBrs; break; 1418a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRH: Opcode = ARM::LDRH; break; 1419a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSB: Opcode = ARM::LDRSB; break; 1420a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSH: Opcode = ARM::LDRSH; break; 1421a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach } 1422a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach MCInst LdStInst; 1423a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.setOpcode(Opcode); 1424a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1425a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1426a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 1427a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateImm(0)); 1428b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Add predicate operands. 1429a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); 1430a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); 1431a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach OutStreamer.EmitInstruction(LdStInst); 1432b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1433b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach return; 14344d1522234192704f45dfd2527c2913fa60be616eChris Lattner } 1435a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::CONSTPOOL_ENTRY: { 1436a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool 1437a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// in the function. The first operand is the ID# for this instruction, the 1438a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// second is the index into the MachineConstantPool that this is, the third 1439a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// is the size in bytes of this constant pool entry. 1440a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner unsigned LabelId = (unsigned)MI->getOperand(0).getImm(); 1441a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex(); 1442a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner 1443a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitAlignment(2); 14441b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner OutStreamer.EmitLabel(GetCPISymbol(LabelId)); 1445a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner 1446a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx]; 1447a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner if (MCPE.isMachineConstantPoolEntry()) 1448a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal); 1449a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner else 1450a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitGlobalConstant(MCPE.Val.ConstVal); 1451b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 1452a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner return; 1453a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner } 1454882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach case ARM::t2BR_JT: { 1455882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 1456882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCInst TmpInst; 14572a7b41ba4d3eb3c6003f6768dc20b28d83eac265Jim Grosbach TmpInst.setOpcode(ARM::tMOVr); 14585ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14595ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14605ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14615ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14625ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14635ca66696e734f963b613de51e3df3684395daf1cJim Grosbach OutStreamer.EmitInstruction(TmpInst); 14645ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 14655ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitJump2Table(MI); 14665ca66696e734f963b613de51e3df3684395daf1cJim Grosbach return; 14675ca66696e734f963b613de51e3df3684395daf1cJim Grosbach } 14685ca66696e734f963b613de51e3df3684395daf1cJim Grosbach case ARM::t2TBB_JT: { 14695ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14705ca66696e734f963b613de51e3df3684395daf1cJim Grosbach MCInst TmpInst; 14715ca66696e734f963b613de51e3df3684395daf1cJim Grosbach 14725ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::t2TBB); 14735ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14745ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14755ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14765ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14775ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14785ca66696e734f963b613de51e3df3684395daf1cJim Grosbach OutStreamer.EmitInstruction(TmpInst); 14795ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 14805ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitJump2Table(MI); 14815ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Make sure the next instruction is 2-byte aligned. 14825ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitAlignment(1); 14835ca66696e734f963b613de51e3df3684395daf1cJim Grosbach return; 14845ca66696e734f963b613de51e3df3684395daf1cJim Grosbach } 14855ca66696e734f963b613de51e3df3684395daf1cJim Grosbach case ARM::t2TBH_JT: { 14865ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14875ca66696e734f963b613de51e3df3684395daf1cJim Grosbach MCInst TmpInst; 14885ca66696e734f963b613de51e3df3684395daf1cJim Grosbach 14895ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::t2TBH); 14905ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14915ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14925ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14935ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14945ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1495882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 14965ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 1497882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach EmitJump2Table(MI); 1498882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach return; 1499882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 1500f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach case ARM::tBR_JTr: 15012dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach case ARM::BR_JTr: { 15022dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 15032dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // mov pc, target 15042dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 15055ca66696e734f963b613de51e3df3684395daf1cJim Grosbach unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? 15062a7b41ba4d3eb3c6003f6768dc20b28d83eac265Jim Grosbach ARM::MOVr : ARM::tMOVr; 1507f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach TmpInst.setOpcode(Opc); 15082dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15092dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15102dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Add predicate operands. 15112dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15122dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1513a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1514a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach if (Opc == ARM::MOVr) 1515a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15162dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 15172dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach 1518f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach // Make sure the Thumb jump table is 4-byte aligned. 15192a7b41ba4d3eb3c6003f6768dc20b28d83eac265Jim Grosbach if (Opc == ARM::tMOVr) 1520f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach EmitAlignment(2); 1521f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach 15222dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Output the data for the jump table itself 15232dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach EmitJumpTable(MI); 15242dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach return; 15252dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } 15262dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach case ARM::BR_JTm: { 15272dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 15282dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // ldr pc, target 15292dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 15302dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach if (MI->getOperand(1).getReg() == 0) { 15312dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // literal offset 15322dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 15332dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15342dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15352dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); 15362dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } else { 15372dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::LDRrs); 15382dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15392dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15402dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 15412dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 15422dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } 15432dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Add predicate operands. 15442dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15452dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15462dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 15472dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach 15482dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Output the data for the jump table itself 1549a2244cb38781e596110023399c7902b5ee5087feJim Grosbach EmitJumpTable(MI); 1550a2244cb38781e596110023399c7902b5ee5087feJim Grosbach return; 1551a2244cb38781e596110023399c7902b5ee5087feJim Grosbach } 1552f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach case ARM::BR_JTadd: { 1553f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 1554f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // add pc, target, idx 15552dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 15562dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::ADDrr); 15572dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15582dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15592dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 1560f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Add predicate operands. 15612dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15622dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1563f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Add 's' bit operand (always reg0 for this) 15642dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15652dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1566f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach 1567f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Output the data for the jump table itself 1568f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach EmitJumpTable(MI); 1569f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach return; 1570f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach } 15712e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach case ARM::TRAP: { 15722e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // Non-Darwin binutils don't yet support the "trap" mnemonic. 15732e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // FIXME: Remove this special case when they do. 15742e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach if (!Subtarget->isTargetDarwin()) { 157578890f41f404fad3663408edd4adf2e13c1e13b5Jim Grosbach //.long 0xe7ffdefe @ trap 1576b2dda4bd346fe9a2795f83f659c0e60191b2e6a0Jim Grosbach uint32_t Val = 0xe7ffdefeUL; 15772e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.AddComment("trap"); 15782e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.EmitIntValue(Val, 4); 15792e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach return; 15802e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15812e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach break; 15822e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15832e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach case ARM::tTRAP: { 15842e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // Non-Darwin binutils don't yet support the "trap" mnemonic. 15852e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // FIXME: Remove this special case when they do. 15862e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach if (!Subtarget->isTargetDarwin()) { 158778890f41f404fad3663408edd4adf2e13c1e13b5Jim Grosbach //.short 57086 @ trap 1588c8ab9eb066f6d35880e3a24436baf21236c921caBenjamin Kramer uint16_t Val = 0xdefe; 15892e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.AddComment("trap"); 15902e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.EmitIntValue(Val, 2); 15912e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach return; 15922e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15932e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach break; 15942e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 1595433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach case ARM::t2Int_eh_sjlj_setjmp: 1596433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach case ARM::t2Int_eh_sjlj_setjmp_nofp: 1597a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::tInt_eh_sjlj_setjmp: { 1598433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Two incoming args: GPR:$src, GPR:$val 1599433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // mov $val, pc 1600433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // adds $val, #7 1601433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // str $val, [$src, #4] 1602433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // movs r0, #0 1603433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // b 1f 1604433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // movs r0, #1 1605433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 1: 1606433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1607433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach unsigned ValReg = MI->getOperand(1).getReg(); 1608433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCSymbol *Label = GetARMSJLJEHLabel(); 1609433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1610433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 16112a7b41ba4d3eb3c6003f6768dc20b28d83eac265Jim Grosbach TmpInst.setOpcode(ARM::tMOVr); 1612433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1613433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 161463b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach // Predicate. 161563b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 161663b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1617433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.AddComment("eh_setjmp begin"); 1618433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1619433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1620433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1621433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1622433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tADDi3); 1623433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1624433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 's' bit operand 1625433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1626433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1627433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(7)); 1628433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1629433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1630433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1631433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1632433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1633433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1634433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1635f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tSTRi); 1636433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1637433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1638433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // The offset immediate is #4. The operand value is scaled by 4 for the 1639433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // tSTR instruction. 1640433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1641433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1642433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1643433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1644433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1645433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1646433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1647433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1648433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVi8); 1649433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1650433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1651433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1652433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1653433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1654433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1655433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1656433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1657433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1658433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, OutContext); 1659433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1660433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tB); 1661433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr)); 1662433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1663433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1664433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1665433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1666433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVi8); 1667433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1668433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1669433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1670433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1671433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1672433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1673433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.AddComment("eh_setjmp end"); 1674433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1675433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1676433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitLabel(Label); 1677433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach return; 1678433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1679433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 1680453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach case ARM::Int_eh_sjlj_setjmp_nofp: 1681a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::Int_eh_sjlj_setjmp: { 1682453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Two incoming args: GPR:$src, GPR:$val 1683453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // add $val, pc, #8 1684453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // str $val, [$src, #+4] 1685453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // mov r0, #0 1686453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // add pc, pc, #0 1687453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // mov r0, #1 1688453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1689453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach unsigned ValReg = MI->getOperand(1).getReg(); 1690453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach 1691453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1692453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1693453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::ADDri); 1694453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1695453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1696453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(8)); 1697453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1698453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1699453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1700453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1701453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1702453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.AddComment("eh_setjmp begin"); 1703453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1704453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1705453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1706453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 17077e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach TmpInst.setOpcode(ARM::STRi12); 1708453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1709453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1710453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(4)); 1711453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1712453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1713453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1714453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1715453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1716453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1717453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1718453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::MOVi); 1719453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1720453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1721453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1722453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1723453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1724453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1725453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1726453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1727453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1728453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1729453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1730453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::ADDri); 1731453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1732453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1733453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1734453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1735453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1736453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1737453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1738453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1739453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1740453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1741453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1742453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1743453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::MOVi); 1744453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1745453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1746453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1747453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1748453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1749453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1750453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1751453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.AddComment("eh_setjmp end"); 1752453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1753453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1754453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach return; 1755453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 17565acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach case ARM::Int_eh_sjlj_longjmp: { 17575acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr sp, [$src, #8] 17585acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr $scratch, [$src, #4] 17595acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr r7, [$src] 17605acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // bx $scratch 17615acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 17625acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach unsigned ScratchReg = MI->getOperand(1).getReg(); 17635acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17645acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17653e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17665acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); 17675acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17685acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(8)); 17695acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17705acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17715acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17725acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17735acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17745acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17755acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17763e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17775acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 17785acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17795acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(4)); 17805acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17815acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17825acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17835acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17845acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17855acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17865acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17873e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17885acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); 17895acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17905acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 17915acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17925acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17935acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17945acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17955acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17965acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17975acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17986e46d84eea97792a66c0bb64f26aad3976a23365Bill Wendling TmpInst.setOpcode(ARM::BX); 17995acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 18005acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 18015acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 18025acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1803385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1804385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1805385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach return; 1806385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1807385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach case ARM::tInt_eh_sjlj_longjmp: { 1808385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr $scratch, [$src, #8] 1809385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // mov sp, $scratch 1810385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr $scratch, [$src, #4] 1811385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr r7, [$src] 1812385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // bx $scratch 1813385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1814385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach unsigned ScratchReg = MI->getOperand(1).getReg(); 1815385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1816385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1817f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRi); 1818385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1819385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1820385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // The offset immediate is #8. The operand value is scaled by 4 for the 1821f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling // tLDR instruction. 1822385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(2)); 1823385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1824385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1825385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1826385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1827385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1828385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1829385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 18302a7b41ba4d3eb3c6003f6768dc20b28d83eac265Jim Grosbach TmpInst.setOpcode(ARM::tMOVr); 1831385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); 1832385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1833385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1834385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1835385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1836385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1837385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1838385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1839385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1840f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRi); 1841385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1842385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1843385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1844385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1845385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1846385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1847385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1848385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1849385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1850385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1851f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRr); 1852385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); 1853385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1854385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1855385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1856385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1857385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1858385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1859385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1860385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1861385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1862421b106872d9c8adb4f14d77a8c6a1afeaaa29f6Cameron Zwarich TmpInst.setOpcode(ARM::tBX); 1863385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1864385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1865385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1866385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18675acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 18685acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18695acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach return; 18705acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18715edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Tail jump branches are really just branch instructions with additional 18727a2bdde0a0eebcd2125055e0eacaca040f0b766cChris Lattner // code-gen attributes. Convert them to the canonical form here. 18735edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPd: 18745edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPdND: { 18755edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst, TmpInst2; 18765edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Lower the instruction as-is to get the operands properly converted. 18775edf24efac40062766c643e08f11bc509d373370Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst2, *this); 18785edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(ARM::Bcc); 18795edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(TmpInst2.getOperand(0)); 18805edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Add predicate operands. 18815edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 18825edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18835edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 18845edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 18855edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 18865edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 18875edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPd: 18885edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPdND: { 18895edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst, TmpInst2; 18905edf24efac40062766c643e08f11bc509d373370Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst2, *this); 1891d34d429401187f4251c38323a1bc517bc96763b9Cameron Zwarich // The Darwin toolchain doesn't support tail call relocations of 16-bit 1892d34d429401187f4251c38323a1bc517bc96763b9Cameron Zwarich // branches. 1893d34d429401187f4251c38323a1bc517bc96763b9Cameron Zwarich TmpInst.setOpcode(Opc == ARM::tTAILJMPd ? ARM::t2B : ARM::tB); 18945edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(TmpInst2.getOperand(0)); 18955edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 18965edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 18975edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 18985edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 18995edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPrND: 19005edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPrND: 19015edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPr: 19025edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPr: { 19035edf24efac40062766c643e08f11bc509d373370Jim Grosbach unsigned newOpc = (Opc == ARM::TAILJMPr || Opc == ARM::TAILJMPrND) 1904106acd4158768ff1948accc654a1892caa9e010bCameron Zwarich ? ARM::BX : ARM::tBX; 19055edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst; 19065edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(newOpc); 19075edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 19085edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Predicate. 19095edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 19105edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 19115edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 19125edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 19135edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 19145edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 19155edf24efac40062766c643e08f11bc509d373370Jim Grosbach 19164d7286083537833880901953d29786cf831affc4Anton Korobeynikov // These are the pseudos created to comply with stricter operand restrictions 19174d7286083537833880901953d29786cf831affc4Anton Korobeynikov // on ARMv5. Lower them now to "normal" instructions, since all the 19184d7286083537833880901953d29786cf831affc4Anton Korobeynikov // restrictions are already satisfied. 19194d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::MULv5: 19204d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::MUL); 19214d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19224d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::MLAv5: 19234d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::MLA); 19244d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19254d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::SMULLv5: 19264d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::SMULL); 19274d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19284d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMULLv5: 19294d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMULL); 19304d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19314d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::SMLALv5: 19324d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::SMLAL); 19334d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19344d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMLALv5: 19354d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMLAL); 19364d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19374d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMAALv5: 19384d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMAAL); 19394d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 194097f06937449c593a248dbbb1365e6ae408fb9decChris Lattner } 1941b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 194297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner MCInst TmpInst; 194330e2cc254be72601b11383dda01f495741ffd56cChris Lattner LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 194457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 194557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Emit unwinding stuff for frame-related instructions 194657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (EnableARMEHABI && MI->getFlag(MachineInstr::FrameSetup)) 194757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov EmitUnwindingInstruction(MI); 194857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 1949850d2e2a1b58ea30abed10ca955259d60d07d97aChris Lattner OutStreamer.EmitInstruction(TmpInst); 195097f06937449c593a248dbbb1365e6ae408fb9decChris Lattner} 19512685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19522685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar//===----------------------------------------------------------------------===// 19532685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar// Target Registry Stuff 19542685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar//===----------------------------------------------------------------------===// 19552685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19562685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbarstatic MCInstPrinter *createARMMCInstPrinter(const Target &T, 19572685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar unsigned SyntaxVariant, 1958d374087be5360a353a4239a155b1227057145f48Chris Lattner const MCAsmInfo &MAI) { 19592685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar if (SyntaxVariant == 0) 1960b262799d49891b036daa00eddf51947487346c98Evan Cheng return new ARMInstPrinter(MAI); 19612685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar return 0; 19622685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar} 19632685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19642685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar// Force static initialization. 19652685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbarextern "C" void LLVMInitializeARMAsmPrinter() { 19662685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget); 19672685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget); 19682685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19692685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter); 19702685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter); 19712685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar} 19722685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 1973