131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
2d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//
3d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//                     The LLVM Compiler Infrastructure
4d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//
5d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov// This file is distributed under the University of Illinois Open Source
6d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov// License. See LICENSE.TXT for details.
7d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//
8d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//===----------------------------------------------------------------------===//
9d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//
10b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//
12d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov//===----------------------------------------------------------------------===//
13d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
14b9803a8fa65f043c96612fa9c5aeeee12739db2bEvan Cheng#include "Thumb1InstrInfo.h"
15d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov#include "ARM.h"
16d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov#include "llvm/CodeGen/MachineFrameInfo.h"
17d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov#include "llvm/CodeGen/MachineInstrBuilder.h"
182457f2c66184e978d4ed8fa9e2128effff26cb0bEvan Cheng#include "llvm/CodeGen/MachineRegisterInfo.h"
19e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng#include "llvm/CodeGen/MachineMemOperand.h"
20c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach#include "llvm/MC/MCInst.h"
21d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
22d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikovusing namespace llvm;
23d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
24f95215f551949d5e5adfbf4753aa833b9009b77aAnton KorobeynikovThumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
25f95215f551949d5e5adfbf4753aa833b9009b77aAnton Korobeynikov  : ARMBaseInstrInfo(STI), RI(*this, STI) {
26d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov}
27d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
28c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
29c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbachvoid Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
30c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach  NopInst.setOpcode(ARM::tMOVr);
31c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach  NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
32c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach  NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
33c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach  NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
34c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach  NopInst.addOperand(MCOperand::CreateReg(0));
35c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach}
36c01810eeb7227010f73cb39e3c4fa0197a3c4ef0Jim Grosbach
37446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Chengunsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
38334c26473bba3ad8b88341bb0d25d0ac2008bb8dDavid Goodwin  return 0;
39334c26473bba3ad8b88341bb0d25d0ac2008bb8dDavid Goodwin}
40334c26473bba3ad8b88341bb0d25d0ac2008bb8dDavid Goodwin
41ac2736670034e8942939b9fccf8e4618a0bda908Jakob Stoklund Olesenvoid Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
42ac2736670034e8942939b9fccf8e4618a0bda908Jakob Stoklund Olesen                                  MachineBasicBlock::iterator I, DebugLoc DL,
43ac2736670034e8942939b9fccf8e4618a0bda908Jakob Stoklund Olesen                                  unsigned DestReg, unsigned SrcReg,
44ac2736670034e8942939b9fccf8e4618a0bda908Jakob Stoklund Olesen                                  bool KillSrc) const {
452a7b41ba4d3eb3c6003f6768dc20b28d83eac265Jim Grosbach  AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
4663b46faeb8acae9b7e5f865b7417dc00b9b9dad3Jim Grosbach    .addReg(SrcReg, getKillRegState(KillSrc)));
47ac2736670034e8942939b9fccf8e4618a0bda908Jakob Stoklund Olesen  assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
48ac2736670034e8942939b9fccf8e4618a0bda908Jakob Stoklund Olesen         "Thumb1 can only copy GPR registers");
49d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov}
50d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
51b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1InstrInfo::
52d49ea77cbc24776142615fecf75f41e191c765bdAnton KorobeynikovstoreRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
53d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov                    unsigned SrcReg, bool isKill, int FI,
54746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng                    const TargetRegisterClass *RC,
55746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng                    const TargetRegisterInfo *TRI) const {
56420761a0f193e87d08ee1c51b26bba23ab4bac7fCraig Topper  assert((RC == &ARM::tGPRRegClass ||
5786e5f7b6f8cbe20ee564f3b566ce23419ac44ec4Evan Cheng          (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
5886e5f7b6f8cbe20ee564f3b566ce23419ac44ec4Evan Cheng           isARMLowRegister(SrcReg))) && "Unknown regclass!");
59d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
60420761a0f193e87d08ee1c51b26bba23ab4bac7fCraig Topper  if (RC == &ARM::tGPRRegClass ||
6198793b9468a242348879334c5821fb6b5c784517Jim Grosbach      (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
6298793b9468a242348879334c5821fb6b5c784517Jim Grosbach       isARMLowRegister(SrcReg))) {
63746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng    DebugLoc DL;
64746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng    if (I != MBB.end()) DL = I->getDebugLoc();
65746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng
66e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng    MachineFunction &MF = *MBB.getParent();
67e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng    MachineFrameInfo &MFI = *MF.getFrameInfo();
68e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng    MachineMemOperand *MMO =
69978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad      MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
7059db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner                              MachineMemOperand::MOStore,
71e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng                              MFI.getObjectSize(FI),
72e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng                              MFI.getObjectAlignment(FI));
7374472b4bf963c424da04f42dffdb94c85ef964bcJim Grosbach    AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
74446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng                   .addReg(SrcReg, getKillRegState(isKill))
75e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
76d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov  }
77d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov}
78d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
79b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1InstrInfo::
80d49ea77cbc24776142615fecf75f41e191c765bdAnton KorobeynikovloadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
81d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov                     unsigned DestReg, int FI,
82746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng                     const TargetRegisterClass *RC,
83746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng                     const TargetRegisterInfo *TRI) const {
84420761a0f193e87d08ee1c51b26bba23ab4bac7fCraig Topper  assert((RC == &ARM::tGPRRegClass ||
8586e5f7b6f8cbe20ee564f3b566ce23419ac44ec4Evan Cheng          (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
8686e5f7b6f8cbe20ee564f3b566ce23419ac44ec4Evan Cheng           isARMLowRegister(DestReg))) && "Unknown regclass!");
87d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov
88420761a0f193e87d08ee1c51b26bba23ab4bac7fCraig Topper  if (RC == &ARM::tGPRRegClass ||
8998793b9468a242348879334c5821fb6b5c784517Jim Grosbach      (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
9098793b9468a242348879334c5821fb6b5c784517Jim Grosbach       isARMLowRegister(DestReg))) {
91746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng    DebugLoc DL;
92746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng    if (I != MBB.end()) DL = I->getDebugLoc();
93746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng
94e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng    MachineFunction &MF = *MBB.getParent();
95e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng    MachineFrameInfo &MFI = *MF.getFrameInfo();
96e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng    MachineMemOperand *MMO =
97978e0dfe46e481bfb1281e683aa308329e879e95Jay Foad      MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
9859db5496f4fc2ef6111569e542f8b65480ef14c1Chris Lattner                              MachineMemOperand::MOLoad,
99e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng                              MFI.getObjectSize(FI),
100e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng                              MFI.getObjectAlignment(FI));
10174472b4bf963c424da04f42dffdb94c85ef964bcJim Grosbach    AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
102e3ce8aab0a6de939f8cfa4f8cb2e3a3bf4e1fe21Evan Cheng                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
103d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov  }
104d49ea77cbc24776142615fecf75f41e191c765bdAnton Korobeynikov}
105