Thumb1InstrInfo.cpp revision 63b46faeb8acae9b7e5f865b7417dc00b9b9dad3 
1//===- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "Thumb1InstrInfo.h"
15#include "ARM.h"
16#include "ARMMachineFunctionInfo.h"
17#include "llvm/CodeGen/MachineFrameInfo.h"
18#include "llvm/CodeGen/MachineInstrBuilder.h"
19#include "llvm/CodeGen/MachineRegisterInfo.h"
20#include "llvm/CodeGen/MachineMemOperand.h"
21#include "llvm/CodeGen/PseudoSourceValue.h"
22#include "llvm/ADT/SmallVector.h"
23#include "Thumb1InstrInfo.h"
24
25using namespace llvm;
26
27Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
28  : ARMBaseInstrInfo(STI), RI(*this, STI) {
29}
30
31unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
32  return 0;
33}
34
35void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
36                                  MachineBasicBlock::iterator I, DebugLoc DL,
37                                  unsigned DestReg, unsigned SrcReg,
38                                  bool KillSrc) const {
39  bool tDest = ARM::tGPRRegClass.contains(DestReg);
40  bool tSrc  = ARM::tGPRRegClass.contains(SrcReg);
41  unsigned Opc = ARM::tMOVgpr2gpr;
42  if (tDest && tSrc)
43    Opc = ARM::tMOVr;
44  else if (tSrc)
45    Opc = ARM::tMOVtgpr2gpr;
46  else if (tDest)
47    Opc = ARM::tMOVgpr2tgpr;
48
49  AddDefaultPred(BuildMI(MBB, I, DL, get(Opc), DestReg)
50    .addReg(SrcReg, getKillRegState(KillSrc)));
51  assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
52         "Thumb1 can only copy GPR registers");
53}
54
55void Thumb1InstrInfo::
56storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
57                    unsigned SrcReg, bool isKill, int FI,
58                    const TargetRegisterClass *RC,
59                    const TargetRegisterInfo *TRI) const {
60  assert((RC == ARM::tGPRRegisterClass ||
61          (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
62           isARMLowRegister(SrcReg))) && "Unknown regclass!");
63
64  if (RC == ARM::tGPRRegisterClass ||
65      (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
66       isARMLowRegister(SrcReg))) {
67    DebugLoc DL;
68    if (I != MBB.end()) DL = I->getDebugLoc();
69
70    MachineFunction &MF = *MBB.getParent();
71    MachineFrameInfo &MFI = *MF.getFrameInfo();
72    MachineMemOperand *MMO =
73      MF.getMachineMemOperand(
74                    MachinePointerInfo(PseudoSourceValue::getFixedStack(FI)),
75                              MachineMemOperand::MOStore,
76                              MFI.getObjectSize(FI),
77                              MFI.getObjectAlignment(FI));
78    AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
79                   .addReg(SrcReg, getKillRegState(isKill))
80                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
81  }
82}
83
84void Thumb1InstrInfo::
85loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
86                     unsigned DestReg, int FI,
87                     const TargetRegisterClass *RC,
88                     const TargetRegisterInfo *TRI) const {
89  assert((RC == ARM::tGPRRegisterClass ||
90          (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
91           isARMLowRegister(DestReg))) && "Unknown regclass!");
92
93  if (RC == ARM::tGPRRegisterClass ||
94      (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
95       isARMLowRegister(DestReg))) {
96    DebugLoc DL;
97    if (I != MBB.end()) DL = I->getDebugLoc();
98
99    MachineFunction &MF = *MBB.getParent();
100    MachineFrameInfo &MFI = *MF.getFrameInfo();
101    MachineMemOperand *MMO =
102      MF.getMachineMemOperand(
103                    MachinePointerInfo(PseudoSourceValue::getFixedStack(FI)),
104                              MachineMemOperand::MOLoad,
105                              MFI.getObjectSize(FI),
106                              MFI.getObjectAlignment(FI));
107    AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
108                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
109  }
110}
111