149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski//===- NVPTXInstrInfo.h - NVPTX Instruction Information----------*- C++ -*-===// 249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// 349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// The LLVM Compiler Infrastructure 449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// 549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// This file is distributed under the niversity of Illinois Open Source 649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// License. See LICENSE.TXT for details. 749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// 849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski//===----------------------------------------------------------------------===// 949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// 1049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// This file contains the NVPTX implementation of the TargetInstrInfo class. 1149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski// 1249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski//===----------------------------------------------------------------------===// 1349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 1449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#ifndef NVPTXINSTRUCTIONINFO_H 1549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#define NVPTXINSTRUCTIONINFO_H 1649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 1749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#include "NVPTX.h" 1849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#include "NVPTXRegisterInfo.h" 1949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#include "llvm/Target/TargetInstrInfo.h" 2049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 2149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#define GET_INSTRINFO_HEADER 2249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#include "NVPTXGenInstrInfo.inc" 2349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 2449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinskinamespace llvm { 2549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 2649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinskiclass NVPTXInstrInfo : public NVPTXGenInstrInfo 2749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski{ 2849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski NVPTXTargetMachine &TM; 2949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski const NVPTXRegisterInfo RegInfo; 3049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinskipublic: 3149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski explicit NVPTXInstrInfo(NVPTXTargetMachine &TM); 3249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 3349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual const NVPTXRegisterInfo &getRegisterInfo() const { return RegInfo; } 3449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 3549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski /* The following virtual functions are used in register allocation. 3649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * They are not implemented because the existing interface and the logic 3749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * at the caller side do not work for the elementized vector load and store. 3849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * 3949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 4049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * int &FrameIndex) const; 4149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 4249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * int &FrameIndex) const; 4349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 4449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * MachineBasicBlock::iterator MBBI, 4549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * unsigned SrcReg, bool isKill, int FrameIndex, 4649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * const TargetRegisterClass *RC) const; 4749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 4849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * MachineBasicBlock::iterator MBBI, 4949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * unsigned DestReg, int FrameIndex, 5049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski * const TargetRegisterClass *RC) const; 5149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski */ 5249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 5349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual void copyPhysReg(MachineBasicBlock &MBB, 5449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski MachineBasicBlock::iterator I, DebugLoc DL, 5549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski unsigned DestReg, unsigned SrcReg, 5649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski bool KillSrc) const ; 5749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual bool isMoveInstr(const MachineInstr &MI, 5849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski unsigned &SrcReg, 5949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski unsigned &DestReg) const; 6049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski bool isLoadInstr(const MachineInstr &MI, unsigned &AddrSpace) const; 6149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski bool isStoreInstr(const MachineInstr &MI, unsigned &AddrSpace) const; 6249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski bool isReadSpecialReg(MachineInstr &MI) const; 6349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 6449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual bool CanTailMerge(const MachineInstr *MI) const ; 6549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski // Branch analysis. 6649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 6749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski MachineBasicBlock *&FBB, 6849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski SmallVectorImpl<MachineOperand> &Cond, 6949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski bool AllowModify) const; 7049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 7149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski virtual unsigned InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, 7249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski MachineBasicBlock *FBB, 7349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski const SmallVectorImpl<MachineOperand> &Cond, 7449683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski DebugLoc DL) const; 7549683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski unsigned getLdStCodeAddrSpace(const MachineInstr &MI) const { 7649683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski return MI.getOperand(2).getImm(); 7749683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski } 7849683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 7949683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski}; 8049683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 8149683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski} // namespace llvm 8249683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski 8349683f3c961379fbc088871a5d6304950f1f1cbcJustin Holewinski#endif 84