PPCInstrInfo.h revision 0965217e74fe07f1451350a80114ab566ced5de0
12e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner//===- PPCInstrInfo.h - PowerPC Instruction Information ---------*- C++ -*-===// 23da94aec4d429b2ba0f65fa040c33650cade196bMisha Brukman// 32e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner// The LLVM Compiler Infrastructure 42e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner// 53060910e290949a9ac5eda8726d030790c4d60ffChris Lattner// This file is distributed under the University of Illinois Open Source 63060910e290949a9ac5eda8726d030790c4d60ffChris Lattner// License. See LICENSE.TXT for details. 73da94aec4d429b2ba0f65fa040c33650cade196bMisha Brukman// 82e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner//===----------------------------------------------------------------------===// 92e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner// 102e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner// This file contains the PowerPC implementation of the TargetInstrInfo class. 112e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner// 122e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner//===----------------------------------------------------------------------===// 132e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner 142e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner#ifndef POWERPC32_INSTRUCTIONINFO_H 152e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner#define POWERPC32_INSTRUCTIONINFO_H 16d32c02f3145c8d5114c9bd367e9ff15f4aed2e15Sean Callanan 172e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner#include "PPC.h" 18175580c0f36b026daf9de0adabdb7ddcf7619db6Chris Lattner#include "llvm/Target/TargetInstrInfo.h" 1944da5fbf97e31d5cf8ca6ebf99c613d116f51445Chris Lattner#include "PPCRegisterInfo.h" 20bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner 21bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattnernamespace llvm { 22615ed993e115f8bc97ff0678aa861629fec93880Jeff Cohen 232e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner/// PPCII - This namespace holds all of the PowerPC target-specific 242e1f51b8a583649d74cb666ca5e4cf680cc1ced9Chris Lattner/// per-instruction flags. These must match the corresponding definitions in 2538c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner/// PPC.td and PPCInstrFormats.td. 261a55180238dbcf11113f610aea010447e51f595bDaniel Dunbarnamespace PPCII { 2738c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattnerenum { 2838c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner // PPC970 Instruction Flags. These flags describe the characteristics of the 2938c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner // PowerPC 970 (aka G5) dispatch groups and how they are formed out of 3038c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner // raw machine instructions. 3138c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 3238c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// PPC970_First - This instruction starts a new dispatch group, so it will 3338c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// always be the first one in the group. 3438c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner PPC970_First = 0x1, 3538c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 3638c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// PPC970_Single - This instruction starts a new dispatch group and 3738c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// terminates it, so it will be the sole instruction in the group. 3838c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner PPC970_Single = 0x2, 3938c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 40bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner /// PPC970_Cracked - This instruction is cracked into two pieces, requiring 4138c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// two dispatch pipes to be available to issue. 4238c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner PPC970_Cracked = 0x4, 4338c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 44870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// PPC970_Mask/Shift - This is a bitmask that selects the pipeline type that 45870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// an instruction is issued to. 46870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_Shift = 3, 47870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_Mask = 0x07 << PPC970_Shift 481a55180238dbcf11113f610aea010447e51f595bDaniel Dunbar}; 49870c016934bacf43995d89531b166ae095ee3675Chris Lattnerenum PPC970_Unit { 50870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// These are the various PPC970 execution unit pipelines. Each instruction 51870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// is one of these. 52870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_Pseudo = 0 << PPC970_Shift, // Pseudo instruction 53870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_FXU = 1 << PPC970_Shift, // Fixed Point (aka Integer/ALU) Unit 54870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_LSU = 2 << PPC970_Shift, // Load Store Unit 55f876668518097413a904537ce9d249953987508cChris Lattner PPC970_FPU = 3 << PPC970_Shift, // Floating Point Unit 56f876668518097413a904537ce9d249953987508cChris Lattner PPC970_CRU = 4 << PPC970_Shift, // Control Register Unit 57870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_VALU = 5 << PPC970_Shift, // Vector ALU 58870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_VPERM = 6 << PPC970_Shift, // Vector Permute Unit 59870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPC970_BRU = 7 << PPC970_Shift // Branch Unit 60870c016934bacf43995d89531b166ae095ee3675Chris Lattner}; 61870c016934bacf43995d89531b166ae095ee3675Chris Lattner} 62f876668518097413a904537ce9d249953987508cChris Lattner 63870c016934bacf43995d89531b166ae095ee3675Chris Lattner 64870c016934bacf43995d89531b166ae095ee3675Chris Lattnerclass PPCInstrInfo : public TargetInstrInfoImpl { 65870c016934bacf43995d89531b166ae095ee3675Chris Lattner PPCTargetMachine &TM; 66870c016934bacf43995d89531b166ae095ee3675Chris Lattner const PPCRegisterInfo RI; 67870c016934bacf43995d89531b166ae095ee3675Chris Lattner 68870c016934bacf43995d89531b166ae095ee3675Chris Lattner bool StoreRegToStackSlot(MachineFunction &MF, 69a1e8a80b96d02c8667021049e7fba9050658f39bChris Lattner unsigned SrcReg, bool isKill, int FrameIdx, 70870c016934bacf43995d89531b166ae095ee3675Chris Lattner const TargetRegisterClass *RC, 71870c016934bacf43995d89531b166ae095ee3675Chris Lattner SmallVectorImpl<MachineInstr*> &NewMIs) const; 72a1e8a80b96d02c8667021049e7fba9050658f39bChris Lattner void LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, 73870c016934bacf43995d89531b166ae095ee3675Chris Lattner unsigned DestReg, int FrameIdx, 74870c016934bacf43995d89531b166ae095ee3675Chris Lattner const TargetRegisterClass *RC, 75870c016934bacf43995d89531b166ae095ee3675Chris Lattner SmallVectorImpl<MachineInstr*> &NewMIs) const; 76870c016934bacf43995d89531b166ae095ee3675Chris Lattnerpublic: 77bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner explicit PPCInstrInfo(PPCTargetMachine &TM); 78870c016934bacf43995d89531b166ae095ee3675Chris Lattner 79870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 80870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// such, whenever a client has an instance of instruction info, it should 81870c016934bacf43995d89531b166ae095ee3675Chris Lattner /// always be able to get register info as well (through this method). 8238c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// 83a1e8a80b96d02c8667021049e7fba9050658f39bChris Lattner virtual const PPCRegisterInfo &getRegisterInfo() const { return RI; } 8438c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 8538c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner /// Return true if the instruction is a register to register move and return 863da94aec4d429b2ba0f65fa040c33650cade196bMisha Brukman /// the source and dest operands and their sub-register indices by reference. 87870c016934bacf43995d89531b166ae095ee3675Chris Lattner virtual bool isMoveInstr(const MachineInstr &MI, 8838c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner unsigned &SrcReg, unsigned &DstReg, 89a1e8a80b96d02c8667021049e7fba9050658f39bChris Lattner unsigned &SrcSubIdx, unsigned &DstSubIdx) const; 9038c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 9138c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner unsigned isLoadFromStackSlot(const MachineInstr *MI, 92870c016934bacf43995d89531b166ae095ee3675Chris Lattner int &FrameIndex) const; 9338c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner unsigned isStoreToStackSlot(const MachineInstr *MI, 9438c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner int &FrameIndex) const; 9538c0751a128c0387c04c0f96a2f092340aaa7545Chris Lattner 96870c016934bacf43995d89531b166ae095ee3675Chris Lattner // commuteInstruction - We can commute rlwimi instructions, but only if the 97870c016934bacf43995d89531b166ae095ee3675Chris Lattner // rotate amt is zero. We also have to munge the immediates a bit. 98870c016934bacf43995d89531b166ae095ee3675Chris Lattner virtual MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI) const; 99870c016934bacf43995d89531b166ae095ee3675Chris Lattner 100870c016934bacf43995d89531b166ae095ee3675Chris Lattner virtual void insertNoop(MachineBasicBlock &MBB, 101870c016934bacf43995d89531b166ae095ee3675Chris Lattner MachineBasicBlock::iterator MI) const; 102b0b55e74a090454711b1bb17e4f872d62d6e6b65Chris Lattner 103bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner 1049255b8d349768a02b2d139a43984c9b544098122Jim Grosbach // Branch analysis. 10596c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 10696c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner MachineBasicBlock *&FBB, 107195bb4a7b0de2bb76ae064a5ab8776094d4fccbbChris Lattner SmallVectorImpl<MachineOperand> &Cond, 1089255b8d349768a02b2d139a43984c9b544098122Jim Grosbach bool AllowModify) const; 109bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 110bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 111bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner MachineBasicBlock *FBB, 112bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const SmallVectorImpl<MachineOperand> &Cond) const; 113bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner virtual bool copyRegToReg(MachineBasicBlock &MBB, 11496c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner MachineBasicBlock::iterator MI, 1159255b8d349768a02b2d139a43984c9b544098122Jim Grosbach unsigned DestReg, unsigned SrcReg, 116bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const TargetRegisterClass *DestRC, 117bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const TargetRegisterClass *SrcRC) const; 118b9449d663921fc27d503d048028937c5a19b6f8bBill Wendling 1199255b8d349768a02b2d139a43984c9b544098122Jim Grosbach virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 120bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner MachineBasicBlock::iterator MBBI, 121b84628679ad7240a63d267fc6388efbc1e91f588Chris Lattner unsigned SrcReg, bool isKill, int FrameIndex, 122bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const TargetRegisterClass *RC) const; 123191dd1f1860661f2e0bb99432d10da9b2aff1fc7Chris Lattner 124b84628679ad7240a63d267fc6388efbc1e91f588Chris Lattner virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 125191dd1f1860661f2e0bb99432d10da9b2aff1fc7Chris Lattner MachineBasicBlock::iterator MBBI, 126bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner unsigned DestReg, int FrameIndex, 127bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const TargetRegisterClass *RC) const; 128bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner 129bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF, 130bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner unsigned FrameIx, 131bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner uint64_t Offset, 132bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const MDNode *MDPtr, 133bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner DebugLoc DL) const; 134bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner 135bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into 136bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner /// copy instructions, turning them into load/store instructions. 137bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 138bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner MachineInstr* MI, 139bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner const SmallVectorImpl<unsigned> &Ops, 140bdff5f95b9cda9a6d24104201fa53204bd0c5a75Chris Lattner int FrameIndex) const; 14196c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner 14296c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 14396c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner MachineInstr* MI, 14496c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner const SmallVectorImpl<unsigned> &Ops, 14596c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner MachineInstr* LoadMI) const { 1469255b8d349768a02b2d139a43984c9b544098122Jim Grosbach return 0; 14796c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner } 14896c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner 14996c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner virtual bool canFoldMemoryOperand(const MachineInstr *MI, 15096c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner const SmallVectorImpl<unsigned> &Ops) const; 15196c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner 1529255b8d349768a02b2d139a43984c9b544098122Jim Grosbach virtual 15396c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 15496c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner 15596c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner /// GetInstSize - Return the number of bytes of code the specified 15696c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner /// instruction may be. This returns the maximum number of bytes. 15796c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner /// 15896c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const; 15996c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner}; 16096c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner 1619255b8d349768a02b2d139a43984c9b544098122Jim Grosbach} 16296c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner 16396c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner#endif 16496c1ade5c3927cb0e835af721cbf37f9605cc678Chris Lattner