PPCInstrInfo.h revision c50e2bcdf7bff1f9681ab80e52691f274950fab5
1c16257f05391b8aeccef62d6b543f1cb5a8185feChris Lattner//===- PPCInstrInfo.h - PowerPC Instruction Information ---------*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 5f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file was developed by the LLVM research group and is distributed under 6f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// the University of Illinois Open Source License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 14f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#ifndef POWERPC32_INSTRUCTIONINFO_H 15f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#define POWERPC32_INSTRUCTIONINFO_H 16f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 172668959b8879097db368aec7d76c455260abc75bChris Lattner#include "PPC.h" 18617742b1b8b7fbb07b4ab5db7c292bff78d709f6Chris Lattner#include "llvm/Target/TargetInstrInfo.h" 1916e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCRegisterInfo.h" 20f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 21f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmannamespace llvm { 2288d211f82304e53694ece666d4a2507b170e4582Chris Lattner 2388d211f82304e53694ece666d4a2507b170e4582Chris Lattner/// PPCII - This namespace holds all of the PowerPC target-specific 2488d211f82304e53694ece666d4a2507b170e4582Chris Lattner/// per-instruction flags. These must match the corresponding definitions in 2588d211f82304e53694ece666d4a2507b170e4582Chris Lattner/// PPC.td and PPCInstrFormats.td. 2688d211f82304e53694ece666d4a2507b170e4582Chris Lattnernamespace PPCII { 2788d211f82304e53694ece666d4a2507b170e4582Chris Lattnerenum { 2888d211f82304e53694ece666d4a2507b170e4582Chris Lattner // PPC970 Instruction Flags. These flags describe the characteristics of the 2988d211f82304e53694ece666d4a2507b170e4582Chris Lattner // PowerPC 970 (aka G5) dispatch groups and how they are formed out of 3088d211f82304e53694ece666d4a2507b170e4582Chris Lattner // raw machine instructions. 3188d211f82304e53694ece666d4a2507b170e4582Chris Lattner 3288d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// PPC970_First - This instruction starts a new dispatch group, so it will 3388d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// always be the first one in the group. 3488d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_First = 0x1, 3588d211f82304e53694ece666d4a2507b170e4582Chris Lattner 3688d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// PPC970_Single - This instruction starts a new dispatch group and 3788d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// terminates it, so it will be the sole instruction in the group. 3888d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_Single = 0x2, 3988d211f82304e53694ece666d4a2507b170e4582Chris Lattner 40fd97734f3636f54a86890918096d3d692df0b939Chris Lattner /// PPC970_Cracked - This instruction is cracked into two pieces, requiring 41fd97734f3636f54a86890918096d3d692df0b939Chris Lattner /// two dispatch pipes to be available to issue. 42fd97734f3636f54a86890918096d3d692df0b939Chris Lattner PPC970_Cracked = 0x4, 43fd97734f3636f54a86890918096d3d692df0b939Chris Lattner 4488d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// PPC970_Mask/Shift - This is a bitmask that selects the pipeline type that 4588d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// an instruction is issued to. 46fd97734f3636f54a86890918096d3d692df0b939Chris Lattner PPC970_Shift = 3, 47d74ea2bbd8bb630331f35ead42d385249bd42af8Chris Lattner PPC970_Mask = 0x07 << PPC970_Shift 4888d211f82304e53694ece666d4a2507b170e4582Chris Lattner}; 4988d211f82304e53694ece666d4a2507b170e4582Chris Lattnerenum PPC970_Unit { 5088d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// These are the various PPC970 execution unit pipelines. Each instruction 5188d211f82304e53694ece666d4a2507b170e4582Chris Lattner /// is one of these. 5288d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_Pseudo = 0 << PPC970_Shift, // Pseudo instruction 5388d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_FXU = 1 << PPC970_Shift, // Fixed Point (aka Integer/ALU) Unit 5488d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_LSU = 2 << PPC970_Shift, // Load Store Unit 5588d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_FPU = 3 << PPC970_Shift, // Floating Point Unit 5688d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_CRU = 4 << PPC970_Shift, // Control Register Unit 5788d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_VALU = 5 << PPC970_Shift, // Vector ALU 5888d211f82304e53694ece666d4a2507b170e4582Chris Lattner PPC970_VPERM = 6 << PPC970_Shift, // Vector Permute Unit 59d74ea2bbd8bb630331f35ead42d385249bd42af8Chris Lattner PPC970_BRU = 7 << PPC970_Shift // Branch Unit 6088d211f82304e53694ece666d4a2507b170e4582Chris Lattner}; 6188d211f82304e53694ece666d4a2507b170e4582Chris Lattner} 6288d211f82304e53694ece666d4a2507b170e4582Chris Lattner 63617742b1b8b7fbb07b4ab5db7c292bff78d709f6Chris Lattner 6421e463b2bf864671a87ebe386cb100ef9349a540Nate Begemanclass PPCInstrInfo : public TargetInstrInfo { 65b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner PPCTargetMachine &TM; 6621e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman const PPCRegisterInfo RI; 67f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanpublic: 68b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner PPCInstrInfo(PPCTargetMachine &TM); 69f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 70f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 71f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman /// such, whenever a client has an instance of instruction info, it should 72f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman /// always be able to get register info as well (through this method). 73f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman /// 74f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman virtual const MRegisterInfo &getRegisterInfo() const { return RI; } 75f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 76b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner /// getPointerRegClass - Return the register class to use to hold pointers. 77b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner /// This is used for addressing modes. 78b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner virtual const TargetRegisterClass *getPointerRegClass() const; 79b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 80f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Return true if the instruction is a register to register move and 81f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // leave the source and dest operands in the passed parameters. 82f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // 83f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman virtual bool isMoveInstr(const MachineInstr& MI, 84f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned& sourceReg, 85f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned& destReg) const; 86f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 87408396014742a05cad1c91949d2226169e3f9d80Chris Lattner unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; 886524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; 89408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 90043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // commuteInstruction - We can commute rlwimi instructions, but only if the 91043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // rotate amt is zero. We also have to munge the immediates a bit. 92043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner virtual MachineInstr *commuteInstruction(MachineInstr *MI) const; 93043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 94bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner virtual void insertNoop(MachineBasicBlock &MBB, 95bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const; 96bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 97c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 98c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Branch analysis. 99c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 100c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 101c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner std::vector<MachineOperand> &Cond) const; 102c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner virtual void RemoveBranch(MachineBasicBlock &MBB) const; 103c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 104c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *FBB, 105c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner const std::vector<MachineOperand> &Cond) const; 106c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; 107c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 108c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 109c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 110f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman static unsigned invertPPCBranchOpcode(unsigned Opcode) { 111f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman switch (Opcode) { 112f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman default: assert(0 && "Unknown PPC branch opcode!"); 113f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case PPC::BEQ: return PPC::BNE; 114f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case PPC::BNE: return PPC::BEQ; 115f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case PPC::BLT: return PPC::BGE; 116f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case PPC::BGE: return PPC::BLT; 117f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case PPC::BGT: return PPC::BLE; 118f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case PPC::BLE: return PPC::BGT; 119e44b2d16ee088c44ebbe6f21a2af8b5321b68e48Chris Lattner case PPC::BNU: return PPC::BUN; 120e44b2d16ee088c44ebbe6f21a2af8b5321b68e48Chris Lattner case PPC::BUN: return PPC::BNU; 121b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman } 122f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 123f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman}; 124f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 125f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 126f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 127f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#endif 128