Lines Matching refs:TII

148     if (!TII->isUnpredicatedTerminator(I))
182 TII = tii;
199 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
397 TII->ReplaceTailWithBranchTo(OldInst, NewDest);
410 if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
458 const TargetInstrInfo *TII) {
465 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
468 if (!TII->ReverseBranchCondition(Cond)) {
469 TII->RemoveBranch(*CurMBB);
470 TII->InsertBranch(*CurMBB, SuccBB, NULL, Cond, dl);
475 TII->InsertBranch(*CurMBB, SuccBB, NULL,
638 FixTail(CurMBB, SuccBB, TII);
888 if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {
893 if (TII->ReverseBranchCondition(NewCond))
926 TII->RemoveBranch(*PBB);
929 TII->InsertBranch(*PBB, (TBB == IBB) ? FBB : TBB, 0, NewCond, dl);
950 FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
1092 TII->AnalyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1103 TII->RemoveBranch(PrevBB);
1106 TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond, dl);
1151 TII->RemoveBranch(PrevBB);
1161 TII->RemoveBranch(PrevBB);
1162 TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond, dl);
1173 if (!TII->ReverseBranchCondition(NewPriorCond)) {
1175 TII->RemoveBranch(PrevBB);
1176 TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond, dl);
1208 if (!TII->ReverseBranchCondition(NewPriorCond)) {
1213 TII->RemoveBranch(PrevBB);
1214 TII->InsertBranch(PrevBB, MBB, 0, NewPriorCond, dl);
1229 bool CurUnAnalyzable= TII->AnalyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1241 if (!TII->ReverseBranchCondition(NewCond)) {
1243 TII->RemoveBranch(*MBB);
1244 TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
1260 TII->RemoveBranch(*MBB);
1300 TII->RemoveBranch(PrevBB);
1301 TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
1322 bool NewCurUnAnalyzable = TII->AnalyzeBranch(*PMBB, NewCurTBB,
1326 TII->RemoveBranch(*PMBB);
1328 TII->InsertBranch(*PMBB, NewCurTBB, 0, NewCurCond, pdl);
1348 TII->InsertBranch(*MBB, CurTBB, 0, CurCond, dl);
1372 !TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true)
1388 TII->InsertBranch(*MBB, NextBB, 0, CurCond, DebugLoc());
1424 !TII->AnalyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1474 const TargetInstrInfo *TII,
1479 if (!TII->isUnpredicatedTerminator(Loc))
1536 if (!PI->isSafeToMove(TII, 0, DontMoveAcrossStore) ||
1537 TII->isPredicated(PI))
1572 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1590 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
1618 if (TII->isPredicated(TIB))
1675 if (!TIB->isSafeToMove(TII, 0, DontMoveAcrossStore))