Lines Matching refs:MCID
521 if (MCID->ImplicitDefs)
522 for (const uint16_t *ImpDefs = MCID->getImplicitDefs(); *ImpDefs; ++ImpDefs)
524 if (MCID->ImplicitUses)
525 for (const uint16_t *ImpUses = MCID->getImplicitUses(); *ImpUses; ++ImpUses)
534 : MCID(&tid), Parent(0), Operands(0), NumOperands(0),
538 if (unsigned NumOps = MCID->getNumOperands() +
539 MCID->getNumImplicitDefs() + MCID->getNumImplicitUses()) {
551 : MCID(&MI.getDesc()), Parent(0), Operands(0), NumOperands(0),
623 assert(MCID && "Cannot add operands before providing an instr descriptor");
651 // instruction, only implicit regs are allowed beyond MCID->getNumOperands().
653 assert((isImpReg || Op.isRegMask() || MCID->isVariadic() ||
654 OpNo < MCID->getNumOperands()) &&
694 // The MCID operand information isn't accurate until we start adding
700 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
705 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1)
856 unsigned NumOperands = MCID->getNumOperands();
857 if (!MCID->isVariadic())
1080 // Don't call MCID.findFirstPredOperandIdx() because this variant
1082 // so the number of operands is less than the MCID indicates. In
1084 const MCInstrDesc &MCID = getDesc();
1085 if (MCID.isPredicable()) {
1087 if (MCID.OpInfo[i].isPredicate())
1367 if (hasProperty(MCID::UnmodeledSideEffects))