Lines Matching refs:MCID
760 const MCInstrDesc &MCID = MI->getDesc();
761 if (MI->getNumOperands() < MCID.getNumOperands()) {
763 *OS << MCID.getNumOperands() << " operands expected, but "
804 const MCInstrDesc &MCID = MI->getDesc();
806 // The first MCID.NumDefs operands must be explicit register defines
807 if (MONum < MCID.getNumDefs()) {
808 const MCOperandInfo &MCOI = MCID.OpInfo[MONum];
815 } else if (MONum < MCID.getNumOperands()) {
816 const MCOperandInfo &MCOI = MCID.OpInfo[MONum];
820 !(MI->isVariadic() && MONum == MCID.getNumOperands()-1)) {
827 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);
861 if (MONum < MCID.getNumDefs()) {
862 if (OtherIdx < MCID.getNumOperands()) {
863 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO))
881 if (MONum < MCID.getNumOperands() && !MO->isImplicit()) {
890 TII->getRegClass(MCID, MONum, TRI, *MF)) {
917 TII->getRegClass(MCID, MONum, TRI, *MF)) {