Cross Reference: /external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp

Lines Matching refs:Inst
66 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
69 DecodeGPR64xspRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
72 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
75 DecodeGPR32wspRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
78 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
80 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
82 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
84 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
86 static DecodeStatus DecodeFPR128RegisterClass(llvm::MCInst &Inst,
89 static DecodeStatus DecodeVPR128RegisterClass(llvm::MCInst &Inst,
93 static DecodeStatus DecodeAddrRegExtendOperand(llvm::MCInst &Inst,
99 static DecodeStatus DecodeBitfield32ImmOperand(llvm::MCInst &Inst,
104 static DecodeStatus DecodeCVT32FixedPosOperand(llvm::MCInst &Inst,
109 static DecodeStatus DecodeFPZeroOperand(llvm::MCInst &Inst,
115 static DecodeStatus DecodeMoveWideImmOperand(llvm::MCInst &Inst,
121 static DecodeStatus DecodeLogicalImmOperand(llvm::MCInst &Inst,
126 static DecodeStatus DecodeRegExtendOperand(llvm::MCInst &Inst,
131 static DecodeStatus Decode32BitShiftOperand(llvm::MCInst &Inst,
135 static DecodeStatus DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn,
139 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
143 static DecodeStatus DecodeLDSTPairInstruction(llvm::MCInst &Inst,
148 static DecodeStatus DecodeLoadPairExclusiveInstruction(llvm::MCInst &Inst,
154 static DecodeStatus DecodeNamedImmOperand(llvm::MCInst &Inst,
161                     llvm::MCInst &Inst, unsigned Val,
164 static DecodeStatus DecodeMRSOperand(llvm::MCInst &Inst,
169 static DecodeStatus DecodeMSROperand(llvm::MCInst &Inst,
175 static DecodeStatus DecodeSingleIndexedInstruction(llvm::MCInst &Inst,
240 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
246   Inst.addOperand(MCOperand::CreateReg(Register));
251 DecodeGPR64xspRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
257   Inst.addOperand(MCOperand::CreateReg(Register));
261 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
268   Inst.addOperand(MCOperand::CreateReg(Register));
273 DecodeGPR32wspRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
279   Inst.addOperand(MCOperand::CreateReg(Register));
284 DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
290   Inst.addOperand(MCOperand::CreateReg(Register));
295 DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
301   Inst.addOperand(MCOperand::CreateReg(Register));
307 DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
313   Inst.addOperand(MCOperand::CreateReg(Register));
318 DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
324   Inst.addOperand(MCOperand::CreateReg(Register));
330 DecodeFPR128RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
336   Inst.addOperand(MCOperand::CreateReg(Register));
341 DecodeVPR128RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
347   Inst.addOperand(MCOperand::CreateReg(Register));
351 static DecodeStatus DecodeAddrRegExtendOperand(llvm::MCInst &Inst,
360   Inst.addOperand(MCOperand::CreateImm(OptionHiS));
364 static DecodeStatus DecodeBitfield32ImmOperand(llvm::MCInst &Inst,
373   Inst.addOperand(MCOperand::CreateImm(Imm6Bits));
377 static DecodeStatus DecodeCVT32FixedPosOperand(llvm::MCInst &Inst,
385   Inst.addOperand(MCOperand::CreateImm(Imm6Bits));
389 static DecodeStatus DecodeFPZeroOperand(llvm::MCInst &Inst,
395   Inst.addOperand(MCOperand::CreateImm(0));
402 static DecodeStatus DecodeMoveWideImmOperand(llvm::MCInst &Inst,
411   Inst.addOperand(MCOperand::CreateImm(Imm16));
412   Inst.addOperand(MCOperand::CreateImm(Shift));
417 static DecodeStatus DecodeLogicalImmOperand(llvm::MCInst &Inst,
425   Inst.addOperand(MCOperand::CreateImm(Bits));
430 static DecodeStatus DecodeRegExtendOperand(llvm::MCInst &Inst,
438   Inst.addOperand(MCOperand::CreateImm(ShiftAmount));
442 static DecodeStatus Decode32BitShiftOperand(llvm::MCInst &Inst,
450   Inst.addOperand(MCOperand::CreateImm(ShiftAmount));
454 static DecodeStatus DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn,
475     DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
477     if (Opc == BFM) DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
478     DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder);
480     DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder);
482     if (Opc == BFM) DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder);
483     DecodeGPR32RegisterClass(Inst, Rn, Address, Decoder);
504       Inst.setOpcode(AArch64::LSLxxi);
505       Inst.addOperand(MCOperand::CreateImm(63 - ImmS));
508       Inst.setOpcode(AArch64::LSLwwi);
509       Inst.addOperand(MCOperand::CreateImm(31 - ImmS));
534   Inst.addOperand(MCOperand::CreateImm(ImmR));
535   Inst.addOperand(MCOperand::CreateImm(ImmS));
539     Inst.setOpcode(InsertOp);
541     Inst.setOpcode(ExtractOp);
546 static DecodeStatus DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn,
556     DecodeVPR128RegisterClass(Inst, Rd, Address, Decoder);
557     DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder);
559     DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
560     DecodeVPR128RegisterClass(Inst, Rn, Address, Decoder);
564   Inst.addOperand(MCOperand::CreateImm(1));
570 static DecodeStatus DecodeLDSTPairInstruction(llvm::MCInst &Inst,
590     DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
610       DecodeFPR32RegisterClass(Inst, Rt, Address, Decoder);
611       DecodeFPR32RegisterClass(Inst, Rt2, Address, Decoder);
614       DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder);
615       DecodeFPR64RegisterClass(Inst, Rt2, Address, Decoder);
618       DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
619       DecodeFPR128RegisterClass(Inst, Rt2, Address, Decoder);
626       DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder);
627       DecodeGPR32RegisterClass(Inst, Rt2, Address, Decoder);
631       DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
632       DecodeGPR64RegisterClass(Inst, Rt2, Address, Decoder);
635       DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
636       DecodeGPR64RegisterClass(Inst, Rt2, Address, Decoder);
644     DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
648   DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
649   Inst.addOperand(MCOperand::CreateImm(SImm7));
654 static DecodeStatus DecodeLoadPairExclusiveInstruction(llvm::MCInst &Inst,
668       if (!Check(S, DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder)))
670       if (!Check(S, DecodeGPR32RegisterClass(Inst, Rt2, Address, Decoder)))
674       if (!Check(S, DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder)))
676       if (!Check(S, DecodeGPR64RegisterClass(Inst, Rt2, Address, Decoder)))
683   if (!Check(S, DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder)))
690 static DecodeStatus DecodeNamedImmOperand(llvm::MCInst &Inst,
698     Inst.addOperand(MCOperand::CreateImm(Val));
706                                         llvm::MCInst &Inst,
713   Inst.addOperand(MCOperand::CreateImm(Val));
718 static DecodeStatus DecodeMRSOperand(llvm::MCInst &Inst,
722   return DecodeSysRegOperand(A64SysReg::MRSMapper(), Inst, Val, Address,
726 static DecodeStatus DecodeMSROperand(llvm::MCInst &Inst,
730   return DecodeSysRegOperand(A64SysReg::MSRMapper(), Inst, Val, Address,
734 static DecodeStatus DecodeSingleIndexedInstruction(llvm::MCInst &Inst,
748     DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
752     DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
754     DecodeGPR32RegisterClass(Inst, Rt, Address, Decoder);
756     DecodeFPR128RegisterClass(Inst, Rt, Address, Decoder);
760       DecodeFPR8RegisterClass(Inst, Rt, Address, Decoder);
763       DecodeFPR16RegisterClass(Inst, Rt, Address, Decoder);
766       DecodeFPR32RegisterClass(Inst, Rt, Address, Decoder);
769       DecodeFPR64RegisterClass(Inst, Rt, Address, Decoder);
776     DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
779   DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder);
781   Inst.addOperand(MCOperand::CreateImm(Imm9));