Cross Reference: /external/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Lines Matching defs:MIB
383   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
391   MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
393     MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
395     MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
397     MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
400     MIB.addOperand(MI.getOperand(OpIdx++));
403   MIB.addOperand(MI.getOperand(OpIdx++));
404   MIB.addOperand(MI.getOperand(OpIdx++));
407     MIB.addOperand(MI.getOperand(OpIdx++));
417   MIB.addOperand(MI.getOperand(OpIdx++));
418   MIB.addOperand(MI.getOperand(OpIdx++));
425     MIB.addOperand(MO);
428   MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
429   TransferImpOps(MI, MIB, MIB);
432   MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
448   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
452     MIB.addOperand(MI.getOperand(OpIdx++));
455   MIB.addOperand(MI.getOperand(OpIdx++));
456   MIB.addOperand(MI.getOperand(OpIdx++));
459     MIB.addOperand(MI.getOperand(OpIdx++));
466   MIB.addReg(D0, getUndefRegState(SrcIsUndef));
468     MIB.addReg(D1, getUndefRegState(SrcIsUndef));
470     MIB.addReg(D2, getUndefRegState(SrcIsUndef));
472     MIB.addReg(D3, getUndefRegState(SrcIsUndef));
475   MIB.addOperand(MI.getOperand(OpIdx++));
476   MIB.addOperand(MI.getOperand(OpIdx++));
479     MIB->addRegisterKilled(SrcReg, TRI, true);
480   TransferImpOps(MI, MIB, MIB);
483   MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
500   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
522     MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
524       MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
526       MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
528       MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
532     MIB.addOperand(MI.getOperand(OpIdx++));
535   MIB.addOperand(MI.getOperand(OpIdx++));
536   MIB.addOperand(MI.getOperand(OpIdx++));
539     MIB.addOperand(MI.getOperand(OpIdx++));
549   MIB.addReg(D0, SrcFlags);
551     MIB.addReg(D1, SrcFlags);
553     MIB.addReg(D2, SrcFlags);
555     MIB.addReg(D3, SrcFlags);
558   MIB.addImm(Lane);
562   MIB.addOperand(MI.getOperand(OpIdx++));
563   MIB.addOperand(MI.getOperand(OpIdx++));
567   MIB.addOperand(MO);
570     MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
571   TransferImpOps(MI, MIB, MIB);
573   MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
584   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
588   MIB.addOperand(MI.getOperand(OpIdx++));
590     MIB.addOperand(MI.getOperand(OpIdx++));
596   MIB.addReg(D0);
599   MIB.addOperand(MI.getOperand(OpIdx++));
602   MIB.addOperand(MI.getOperand(OpIdx++));
603   MIB.addOperand(MI.getOperand(OpIdx++));
606     MIB->addRegisterKilled(SrcReg, TRI, true);
607   TransferImpOps(MI, MIB, MIB);
839       MachineInstrBuilder MIB =
845       TransferImpOps(MI, MIB, MIB);
851       MachineInstrBuilder MIB =
856       MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
857       TransferImpOps(MI, MIB, MIB);
943       MachineInstrBuilder MIB =
952       MIB.addOperand(MI.getOperand(OpIdx++));
955       MIB.addOperand(MI.getOperand(OpIdx++));
956       MIB.addOperand(MI.getOperand(OpIdx++));
961       MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead))
965       MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
966       TransferImpOps(MI, MIB, MIB);
967       MIB.setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
974       MachineInstrBuilder MIB =
983       MIB.addOperand(MI.getOperand(OpIdx++));
986       MIB.addOperand(MI.getOperand(OpIdx++));
987       MIB.addOperand(MI.getOperand(OpIdx++));
992       MIB.addReg(D0).addReg(D1);
995         MIB->addRegisterKilled(SrcReg, TRI, true);
997       TransferImpOps(MI, MIB, MIB);
998       MIB.setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
1006       MachineInstrBuilder MIB =
1016       MIB.addOperand(MI.getOperand(OpIdx++));
1017       MIB.addReg(DReg);
1020       MIB.addImm(Lane);
1022       MIB.addOperand(MI.getOperand(OpIdx++));
1023       MIB.addOperand(MI.getOperand(OpIdx++));
1025       TransferImpOps(MI, MIB, MIB);