Lines Matching refs:VA
1916 CCValAssign &VA = ArgLocs[i];
1917 MVT ArgVT = ArgVTs[VA.getValNo()];
1924 if (VA.isRegLoc() && !VA.needsCustom()) {
1926 } else if (VA.needsCustom()) {
1928 if (VA.getLocVT() != MVT::f64 ||
1930 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc())
1966 CCValAssign &VA = ArgLocs[i];
1967 unsigned Arg = ArgRegs[VA.getValNo()];
1968 MVT ArgVT = ArgVTs[VA.getValNo()];
1974 switch (VA.getLocInfo()) {
1977 MVT DestVT = VA.getLocVT();
1986 MVT DestVT = VA.getLocVT();
1993 unsigned BC = FastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg,
1997 ArgVT = VA.getLocVT();
2004 if (VA.isRegLoc() && !VA.needsCustom()) {
2006 VA.getLocReg())
2008 RegArgs.push_back(VA.getLocReg());
2009 } else if (VA.needsCustom()) {
2011 assert(VA.getLocVT() == MVT::f64 &&
2016 assert(VA.isRegLoc() && NextVA.isRegLoc() &&
2020 TII.get(ARM::VMOVRRD), VA.getLocReg())
2023 RegArgs.push_back(VA.getLocReg());
2026 assert(VA.isMemLoc());
2031 Addr.Offset = VA.getLocMemOffset();
2126 CCValAssign &VA = ValLocs[0];
2129 if (VA.getLocInfo() != CCValAssign::Full)
2132 if (!VA.isRegLoc())
2135 unsigned SrcReg = Reg + VA.getValNo();
2139 MVT DestVT = VA.getValVT();
2156 unsigned DstReg = VA.getLocReg();
2165 RetRegs.push_back(VA.getLocReg());