Cross Reference: /external/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp

Lines Matching refs:TII
78   BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
95                               const TargetInstrInfo &TII,
117       AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
120       AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
122       AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
131       BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
171                                      int NumBytes, const TargetInstrInfo &TII,
231                              TII, MRI, MIFlags);
241       const MCInstrDesc &MCID = TII.get(isSub ? ARM::tSUBi3 : ARM::tADDi3);
247       AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), DestReg)
261       MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
269       MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
291     const MCInstrDesc &MCID = TII.get(ExtraOpc);
304                               const TargetInstrInfo &TII,
313   AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8),
317     emitThumbRegPlusImmediate(MBB, MBBI, dl, DestReg, DestReg, Imm, TII, MRI);
319     const MCInstrDesc &MCID = TII.get(ARM::tRSB);
348                   const ARMBaseInstrInfo &TII) const {
376       MI.setDesc(TII.get(ARM::tMOVr));
388         MI.setDesc(TII.get(Opcode));
405       emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,
416         MI.setDesc(TII.get(Opcode));
425       emitThumbRegPlusImmediate(MBB, NII, dl, DestReg, DestReg, Offset, TII,
431       emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl);
433       MI.setDesc(TII.get(ARM::tADDhirr));
464         MI.setDesc(TII.get(NewOpc));
498   bool Done = rewriteFrameIndex(MI, i, BaseReg, Off, TII);
517   AddDefaultPred(BuildMI(MBB, I, DL, TII.get(ARM::tMOVr))
547   AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
611   if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
633                                  Offset, false, TII, *this);
639       emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,
643     MI.setDesc(TII.get(UseRR ? ARM::tLDRr : ARM::tLDRi));
657                                    Offset, false, TII, *this);
663         emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,
665       MI.setDesc(TII.get(UseRR ? ARM::tSTRr : ARM::tSTRi));