Lines Matching refs:TM
81 AMDGPUPassConfig(AMDGPUTargetMachine *TM, PassManagerBase &PM)
82 : TargetPassConfig(TM, PM) {
83 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
109 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
118 addPass(createAMDGPUPeepholeOpt(*TM));
121 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
124 addPass(createAMDGPUIndirectAddressingPass(*TM));
130 addPass(createAMDGPUConvertToISAPass(*TM));
135 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
138 addPass(createSIInsertWaits(*TM));
150 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
152 addPass(createAMDGPUCFGPreparationPass(*TM));
153 addPass(createAMDGPUCFGStructurizerPass(*TM));
154 addPass(createR600ExpandSpecialInstrsPass(*TM));
157 addPass(createSILowerControlFlowPass(*TM));