Lines Matching refs:MIB
78 MachineInstrBuilder MIB(*MF, MI);
79 MIB.addReg(DstReg, RegState::Define);
80 MIB.addReg(AMDGPU::ALU_LITERAL_X);
81 MIB.addImm(Imm);
82 MIB.addReg(0); // PREDICATE_BIT
515 MachineInstrBuilder MIB(*MI->getParent()->getParent(), MI);
516 MIB.addReg(AMDGPU::PREDICATE_BIT, RegState::Implicit);
655 MachineInstrBuilder MIB = BuildMI(MBB, I, MBB.findDebugLoc(I), get(Opcode),
659 MIB.addImm(0) // $update_exec_mask
662 MIB.addImm(1) // $write
673 MIB.addReg(Src1Reg) // $src1
682 MIB.addImm(1) // $last
686 return MIB;