Cross Reference: /external/llvm/lib/Target/Sparc/SparcISelLowering.cpp

Lines Matching defs:VA
105     CCValAssign &VA = RVLocs[i];
106     assert(VA.isRegLoc() && "Can only return in registers!");
108     Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
113     RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
166     CCValAssign &VA = ArgLocs[i];
179     if (VA.isRegLoc()) {
180       if (VA.needsCustom()) {
181         assert(VA.getLocVT() == MVT::f64);
183         MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
209       MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
211       if (VA.getLocVT() == MVT::f32)
213       else if (VA.getLocVT() != MVT::i32) {
215                           DAG.getValueType(VA.getLocVT()));
216         Arg = DAG.getNode(ISD::TRUNCATE, dl, VA.getLocVT(), Arg);
222     assert(VA.isMemLoc());
224     unsigned Offset = VA.getLocMemOffset()+StackOffset;
226     if (VA.needsCustom()) {
227       assert(VA.getValVT() == MVT::f64);
234         SDValue Load = DAG.getLoad(VA.getValVT(), dl, Chain, FIPtr,
269     if (VA.getValVT() == MVT::i32 || VA.getValVT() == MVT::f32) {
270       Load = DAG.getLoad(VA.getValVT(), dl, Chain, FIPtr,
276       unsigned Offset = 4-std::max(1U, VA.getValVT().getSizeInBits()/8);
281                             VA.getValVT(), false, false,0);
282       Load = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Load);
408     CCValAssign &VA = ArgLocs[i];
418     switch (VA.getLocInfo()) {
422       Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
425       Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
428       Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
431       Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
436       assert(VA.needsCustom());
448     if (VA.needsCustom()) {
449       assert(VA.getLocVT() == MVT::f64);
451       if (VA.isMemLoc()) {
452         unsigned Offset = VA.getLocMemOffset() + StackOffset;
479       if (VA.isRegLoc()) {
480         RegsToPass.push_back(std::make_pair(VA.getLocReg(), Hi));
496         unsigned Offset = VA.getLocMemOffset() + StackOffset;
516     if (VA.isRegLoc()) {
517       if (VA.getLocVT() != MVT::f32) {
518         RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
522       RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
526     assert(VA.isMemLoc());
530     SDValue PtrOff = DAG.getIntPtrConstant(VA.getLocMemOffset()+StackOffset);