Cross Reference: /external/llvm/lib/Target/X86/X86ISelLowering.cpp

Lines Matching refs:NewOp
6266   SDValue NewOp = Compact8x32ShuffleNode(SVOp, DAG);
6267   if (NewOp.getNode())
6268     return NewOp;
6743   SDValue NewOp = LowerVectorIntExtend(Op, DAG);
6744   if (NewOp.getNode())
6745     return NewOp;
6751     SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG);
6752     if (NewOp.getNode())
6753       return DAG.getNode(ISD::BITCAST, dl, VT, NewOp);
6759       SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG);
6760       if (NewOp.getNode()) {
6761         MVT NewVT = NewOp.getValueType().getSimpleVT();
6762         if (isCommutedMOVLMask(cast<ShuffleVectorSDNode>(NewOp)->getMask(),
6764           return getVZextMovL(VT, NewVT, NewOp.getOperand(0),
6768       SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG);
6769       if (NewOp.getNode()) {
6770         MVT NewVT = NewOp.getValueType().getSimpleVT();
6771         if (isMOVLMask(cast<ShuffleVectorSDNode>(NewOp)->getMask(), NewVT))
6772           return getVZextMovL(VT, NewVT, NewOp.getOperand(1),
6823   SDValue NewOp = NormalizeVectorShuffle(Op, DAG);
6824   if (NewOp.getNode())
6825     return NewOp;
7066     SDValue NewOp = LowerVECTOR_SHUFFLEv8i16(Op, Subtarget, DAG);
7067     if (NewOp.getNode())
7068       return NewOp;
7072     SDValue NewOp = LowerVECTOR_SHUFFLEv16i8(SVOp, DAG, *this);
7073     if (NewOp.getNode())
7074       return NewOp;
7078     SDValue NewOp = LowerVECTOR_SHUFFLEv32i8(SVOp, Subtarget, DAG);
7079     if (NewOp.getNode())
7080       return NewOp;
12205                         SelectionDAG &DAG, unsigned NewOp) {
12219     DAG.getMemIntrinsicNode(NewOp, dl, Tys, Ops, 4, MVT::i64,
15013   SDValue NewOp = XFormVExtractWithShuffleIntoLoad(N, DAG, DCI);
15014   if (NewOp.getNode())
15015     return NewOp;
17131   unsigned NewOp = 0;
17134     case X86ISD::FMIN:  NewOp = X86ISD::FMINC; break;
17135     case X86ISD::FMAX:  NewOp = X86ISD::FMAXC; break;
17138   return DAG.getNode(NewOp, N->getDebugLoc(), N->getValueType(0),