Lines Matching defs:addInstr
156 static void addInstr(ISelEnv * env, MIPSInstr * instr)
192 addInstr(env, MIPSInstr_Alu(Malu_ADD, sp, sp, MIPSRH_Imm(True,
200 addInstr(env, MIPSInstr_Alu(Malu_SUB, sp, sp,
272 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, irrm,
274 addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
275 addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp, MIPSRH_Imm(False, 3)));
277 addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
282 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64));
285 addInstr(env, MIPSInstr_MtFCSR(irrm));
295 addInstr(env, MIPSInstr_Load(4, fcsr, am_addr, mode64));
300 addInstr(env, MIPSInstr_MtFCSR(fcsr));
350 addInstr(env, MIPSInstr_Store(4, am_addr0, r_srcLo, mode64));
351 addInstr(env, MIPSInstr_Store(4, am_addr1, r_srcHi, mode64));
354 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, fr_dst, am_addr0));
429 addInstr(env, MIPSInstr_Store(4, MIPSAMode_IR(0, StackPointer(mode64)),
439 addInstr(env, mk_iMOVds_RR(argregs[argreg],
450 addInstr(env, mk_iMOVds_RR(argregs[argreg], iselWordExpr_R(env,
455 addInstr(env, mk_iMOVds_RR(argregs[argreg], iselWordExpr_R(env,
469 addInstr(env, mk_iMOVds_RR(tmpregs[argreg],
507 addInstr(env, mk_iMOVds_RR(argregs[i], tmpregs[i]));
516 addInstr(env, MIPSInstr_CallAlways(cc, target, argiregs));
518 addInstr(env, MIPSInstr_Call(cc, target, argiregs, src));
520 addInstr(env, MIPSInstr_CallAlways(cc, (Addr32) target, argiregs));
522 addInstr(env, MIPSInstr_Call(cc, (Addr32) target, argiregs, src));
525 addInstr(env, MIPSInstr_Load(4, GuestStatePointer(mode64),
655 addInstr(env, MIPSInstr_Load(toUChar(sizeofIRType(ty)),
719 addInstr(env, MIPSInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR));
763 addInstr(env, MIPSInstr_Shft(shftOp, False/*64bit shift */,
766 addInstr(env, MIPSInstr_Shft(shftOp, True /*32bit shift */,
841 addInstr(env, MIPSInstr_Cmp(syned, size32, dst, r1, r2, cc));
858 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp, argL, argR));
859 addInstr(env, MIPSInstr_MovCond(dst, argL, argR, tmp, MIPScc_MI));
869 addInstr(env, MIPSInstr_Mul(False/*Unsigned or Signed */ ,
889 addInstr(env, MIPSInstr_Mul(syned /*Unsigned or Signed */ ,
894 addInstr(env, MIPSInstr_Mfhi(tHi));
895 addInstr(env, MIPSInstr_Mflo(tLo));
897 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1,
900 addInstr(env, MIPSInstr_LI(mask, 0xffffffff));
901 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
904 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
925 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP, tmp, r_srcL, r_srcR,
927 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, r_ccMIPS, tmp,
930 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP, tmp, r_srcL, r_srcR,
932 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp, tmp,
934 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS,
937 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP, tmp, r_srcL, r_srcR,
939 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp,
941 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS,
944 addInstr(env, MIPSInstr_FpCompare(Mfp_CMP, tmp, r_srcL, r_srcR,
946 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp, tmp,
949 addInstr(env, MIPSInstr_Alu(Malu_NOR, tmp, tmp, MIPSRH_Reg(tmp)));
950 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, tmp,
952 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS,
966 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_ccIR_b0, r_ccMIPS,
968 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR_b0, r_ccMIPS,
970 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b0, r_ccIR_b0,
974 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_ccIR_b2, r_ccMIPS,
976 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b2, r_ccIR_b2,
980 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_ccIR_b6,
982 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR_b6, r_ccMIPS,
984 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_ccIR_b6, r_ccIR_b6,
986 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b6, r_ccIR_b6,
990 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR, r_ccIR_b0,
992 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR, r_ccIR,
1010 addInstr(env, MIPSInstr_Div(syned, True, r_srcL, r_srcR));
1011 addInstr(env, MIPSInstr_Mfhi(tHi));
1012 addInstr(env, MIPSInstr_Mflo(tLo));
1014 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1, tHi,
1017 addInstr(env, MIPSInstr_LI(mask, 0xffffffff));
1018 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1021 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1036 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False, tHi_1, tHi,
1039 addInstr(env, MIPSInstr_LI(mask, 0xffffffff));
1040 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
1042 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1055 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTWD, valS, valD));
1062 addInstr(env, MIPSInstr_FpLdSt(False/*store */ , 4, valS, am_addr));
1064 addInstr(env, MIPSInstr_Load(4, r_dst, am_addr, mode64));
1118 addInstr(env, MIPSInstr_Shft(Mshft_SLL, sz32, r_dst, r_src,
1120 addInstr(env, MIPSInstr_Shft(Mshft_SRA, sz32, r_dst, r_dst,
1131 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
1132 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
1142 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_dst, r_srcL, r_srcR));
1155 addInstr(env, MIPSInstr_FpLdSt(False/*store */ , 4, fr_src,
1158 addInstr(env, MIPSInstr_Load(4, r_dst, am_addr, mode64));
1174 addInstr(env, MIPSInstr_FpLdSt(False/*store */ , 8, fr_src,
1177 addInstr(env, MIPSInstr_Load(8, r_dst, am_addr, mode64));
1192 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1218 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_dst, r_src,
1220 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_dst, r_dst,
1233 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1242 addInstr(env, MIPSInstr_Shft(Mshft_SLL, False/*!32bit shift */,
1244 addInstr(env, MIPSInstr_Shft(Mshft_SRL, False/*!32bit shift */,
1276 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True/*!32bit shift */,
1289 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, r_src,
1291 addInstr(env, MIPSInstr_Cmp(False, True, r_dst, tmp,
1304 addInstr(env, MIPSInstr_Cmp(False, True, r_dst, r_src,
1313 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
1316 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1318 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, r_dst, r_dst,
1330 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
1332 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1340 addInstr(env, MIPSInstr_Unary(Mun_CLZ, r_dst, r_src));
1350 addInstr(env, MIPSInstr_Alu(Malu_OR, r_src, lo, MIPSRH_Reg(hi)));
1355 addInstr(env, MIPSInstr_Cmp(False, !(env->mode64), r_dst, r_src,
1366 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, hregMIPS_GPR0(mode64),
1369 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp2, tmp2, MIPSRH_Reg(tmp1)));
1370 addInstr(env, MIPSInstr_Shft(Mshft_SRA, False, tmp2, tmp2,
1403 addInstr(env, MIPSInstr_Load(toUChar(sizeofIRType(ty)), r_dst, am_addr,
1429 addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp, r_cond, MIPSRH_Reg(rX)));
1430 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_cond_neg, r_cond,
1432 addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp1, r_cond_neg,
1434 addInstr(env, MIPSInstr_Alu(Malu_ADD, r_dst, r_tmp,
1466 addInstr(env, MIPSInstr_LI(r_dst, (ULong) l));
1482 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
1702 addInstr(env, MIPSInstr_Cmp(syned, size32, dst, r1, r2, cc));
1706 addInstr(env, MIPSInstr_Store(4,
1716 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
1717 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
1721 addInstr(env, MIPSInstr_Store(4,
1731 addInstr(env, MIPSInstr_Store(4,
1793 addInstr(env, MIPSInstr_Mul(syned, True, False /*64bit mul */ ,
1795 addInstr(env, MIPSInstr_Mfhi(tHi));
1796 addInstr(env, MIPSInstr_Mflo(tLo));
1815 addInstr(env, MIPSInstr_Div(syned, False, r_srcL, r_srcR));
1816 addInstr(env, MIPSInstr_Mfhi(tHi));
1817 addInstr(env, MIPSInstr_Mflo(tLo));
1833 addInstr(env, MIPSInstr_Div(syned, False, rLo1, r_srcR));
1834 addInstr(env, MIPSInstr_Mfhi(tHi));
1835 addInstr(env, MIPSInstr_Mflo(tLo));
1884 addInstr(env, MIPSInstr_Load(4, tHi, MIPSAMode_IR(0, r_addr), mode64));
1885 addInstr(env, MIPSInstr_Load(4, tLo, MIPSAMode_IR(4, r_addr), mode64));
1902 addInstr(env, MIPSInstr_LI(tLo, (ULong) wLo));
1906 addInstr(env, MIPSInstr_LI(tHi, (ULong) wHi));
1907 addInstr(env, MIPSInstr_LI(tLo, (ULong) wLo));
1922 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
1923 addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeInt(am_addr), mode64));
1947 addInstr(env, MIPSInstr_Alu(Malu_AND, tmpLo, r_cond,
1949 addInstr(env, MIPSInstr_Alu(Malu_AND, tmpHi, r_cond,
1951 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_cond_neg, r_cond,
1953 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp1Lo, r_cond_neg,
1955 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp1Hi, r_cond_neg,
1957 addInstr(env, MIPSInstr_Alu(Malu_ADD, desLo, tmpLo,
1959 addInstr(env, MIPSInstr_Alu(Malu_ADD, desHi, tmpHi,
1978 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, xHi, MIPSRH_Reg(yHi)));
1979 addInstr(env, MIPSInstr_Alu(Malu_ADD, tLo, xLo, MIPSRH_Reg(yLo)));
1993 addInstr(env, MIPSInstr_Mul(syned/*Unsigned or Signed */ ,
1996 addInstr(env, MIPSInstr_Mfhi(tHi));
1997 addInstr(env, MIPSInstr_Mflo(tLo));
2012 addInstr(env, MIPSInstr_Div(syned, True, r_sLo, r_srcR));
2013 addInstr(env, MIPSInstr_Mfhi(tHi));
2014 addInstr(env, MIPSInstr_Mflo(tLo));
2038 addInstr(env, MIPSInstr_Alu(op, tHi, xHi, MIPSRH_Reg(yHi)));
2039 addInstr(env, MIPSInstr_Alu(op, tLo, xLo, MIPSRH_Reg(yLo)));
2060 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, src,
2062 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp, src,
2065 addInstr(env, mk_iMOVds_RR(tHi, tmp));
2066 addInstr(env, mk_iMOVds_RR(tLo, tmp));
2078 addInstr(env, mk_iMOVds_RR(tHi, src));
2079 addInstr(env, mk_iMOVds_RR(tLo, src));
2080 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tHi, tHi,
2092 addInstr(env, mk_iMOVds_RR(tLo, src));
2093 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64),
2107 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp1, srcLo,
2111 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, hregMIPS_GPR0(mode64),
2114 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp2, tmp2, MIPSRH_Reg(tmp1)));
2115 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, tmp2, tmp2,
2132 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
2135 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64));
2136 addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeFloat(am_addr),
2189 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, r_dst, am_addr));
2197 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, r_dst, am_addr));
2212 addInstr(env, MIPSInstr_Store(4, am_addr, fr_src, mode64));
2215 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, r_dst, am_addr));
2230 addInstr(env, MIPSInstr_Store(4,
2234 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, src, am_addr));
2237 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, dst, am_addr));
2253 addInstr(env, MIPSInstr_Store(8, am_addr, fr_src, mode64));
2256 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2266 addInstr(env, MIPSInstr_FpUnary(sz32 ? Mfp_ABSS : Mfp_ABSD, dst, src));
2274 addInstr(env, MIPSInstr_FpUnary(sz32 ? Mfp_NEGS : Mfp_NEGD, dst, src));
2312 addInstr(env, MIPSInstr_FpBinary(op, dst, argL, argR));
2327 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSD, valS, valD));
2337 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTWS, valS, valF));
2354 addInstr(env, MIPSInstr_Store(4, am_addr, fr_src, mode64));
2357 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, tmp, am_addr));
2362 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSW, r_dst, tmp));
2375 addInstr(env, MIPSInstr_FpUnary(sz32 ? Mfp_SQRTS : Mfp_SQRTD, dst,
2421 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, fsrc, zero_r1));
2423 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, fdst, zero_r1));
2458 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2468 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2489 addInstr(env, MIPSInstr_Load(4, irrm, am_addr1, mode64));
2496 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, irrm,
2498 addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
2499 addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp,
2502 addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
2507 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64));
2510 addInstr(env, MIPSInstr_MtFCSR(irrm));
2513 addInstr(env, MIPSInstr_FpUnary(Mfp_CVTD, dst, src));
2536 addInstr(env, MIPSInstr_Store(4, am_addr, r_src, mode64));
2539 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, tmp1, am_addr));
2547 addInstr(env, MIPSInstr_Load(4, irrm, am_addr1, mode64));
2553 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, irrm,
2555 addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
2556 addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp,
2559 addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
2564 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64));
2567 addInstr(env, MIPSInstr_MtFCSR(irrm));
2570 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp1));
2582 addInstr(env, MIPSInstr_FpUnary(fpop, dst, src));
2595 addInstr(env, MIPSInstr_FpConvert(Mfp_TRULD, valD1, valD));
2597 addInstr(env, MIPSInstr_FpConvert(Mfp_CEILLD, valD1, valD));
2607 addInstr(env, MIPSInstr_FpUnary(Mfp_SQRTD, dst, src));
2644 addInstr(env, MIPSInstr_FpBinary(op, dst, argL, argR));
2676 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, r0, am_addr));
2679 addInstr(env, MIPSInstr_Load(4, r_r0_lo, am_addr, mode64));
2680 addInstr(env, MIPSInstr_Load(4, r_r0_hi, nextMIPSAModeFloat(am_addr),
2685 addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp_lo, r_cond,
2687 addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp_hi, r_cond,
2690 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_cond_neg, r_cond,
2697 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, rX, am_addr));
2700 addInstr(env, MIPSInstr_Load(4, r_rX_lo, am_addr, mode64));
2701 addInstr(env, MIPSInstr_Load(4, r_rX_hi, nextMIPSAModeFloat(am_addr),
2706 addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp1_lo, r_cond_neg,
2708 addInstr(env, MIPSInstr_Alu(Malu_AND, r_tmp1_hi, r_cond_neg,
2711 addInstr(env, MIPSInstr_Alu(Malu_ADD, r_dst_lo, r_tmp_lo,
2713 addInstr(env, MIPSInstr_Alu(Malu_ADD, r_dst_hi, r_tmp_hi,
2720 addInstr(env, MIPSInstr_Store(4, am_addr, r_dst_lo, mode64));
2721 addInstr(env, MIPSInstr_Store(4, nextMIPSAModeFloat(am_addr),
2725 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2763 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(tyd)),
2773 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
2775 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
2781 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, fr_src,
2798 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(ty)),
2810 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
2812 addInstr(env, MIPSInstr_Store(toUChar(sizeofIRType(Ity_I32)),
2822 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 4, fr_src,
2832 addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
2847 addInstr(env, mk_iMOVds_RR(r_dst, r_src));
2855 addInstr(env, mk_iMOVds_RR(dstHi, rHi));
2856 addInstr(env, mk_iMOVds_RR(dstLo, rLo));
2863 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVS, fr_dst, fr_src));
2870 addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, dst, src));
2905 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
2931 addInstr(env, MIPSInstr_Load(4, r_dst, r_addr, mode64));
2934 addInstr(env, MIPSInstr_Load(8, r_dst, r_addr, mode64));
2948 addInstr(env, MIPSInstr_Store(4, r_addr, r_src, mode64));
2949 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
2952 addInstr(env, MIPSInstr_Store(8, r_addr, r_src, mode64));
2953 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
3002 addInstr(env, MIPSInstr_XDirect(
3011 addInstr(env, MIPSInstr_XAssisted(r, amPC, cc, Ijk_Boring));
3030 addInstr(env, MIPSInstr_XAssisted(r, amPC, cc,
3083 addInstr(env, MIPSInstr_XDirect(
3092 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL,
3106 addInstr(env, MIPSInstr_XIndir(r, amPC, MIPScc_AL));
3108 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL,
3131 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL, jk));
3239 addInstr(env, MIPSInstr_EvCheck(amCounter, amFailAddr));
3246 addInstr(env, MIPSInstr_ProfInc());