Lines Matching refs:r14
39 register HWord_t r14 __asm__ ("r14");
1150 __asm__ __volatile__ ("lxsdx %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15));
1156 __asm__ __volatile__ ("lxvd2x %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15));
1161 __asm__ __volatile__ ("lxvdsx %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15));
1166 __asm__ __volatile__ ("lxvw4x %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15));
1171 __asm__ __volatile__ ("stxsdx %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15));
1176 __asm__ __volatile__ ("stxvd2x %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15));
1181 __asm__ __volatile__ ("stxvw4x %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15));
1512 r14 = (HWord_t)viargs;
1519 __asm__ __volatile__ ("ldbrx %0, %1, %2" : "=r" (reg_out): "b" (r14),"r" (r15));
1520 byteIn = ((unsigned char *)(r14 + r15));
1549 r14 = src;
1550 __asm__ __volatile__ ("popcntd %0, %1" : "=r" (res): "r" (r14));
1552 answer += (r14 & 1ULL);
1553 r14 = r14 >> 1;
1570 r14 = (HWord_t)viargs;
1575 __asm__ __volatile__ ("lfiwzx %0, %1, %2" : "=d" (reg_out): "b" (r14),"r" (r15));
1576 src = ((unsigned int *)(r14 + r15));
1818 for (i = 0, r14 = (HWord_t) loadTest.base_addr; i < NUM_VIARGS_VECS; i++) {
1821 r14 += i * 16;
1835 src = (unsigned int*) (((unsigned char *)r14) + j);
1874 r14 = (HWord_t) storeTest.base_addr;
1887 dst = (unsigned int*) (((unsigned char *) r14) + storeTest.offset);