Lines Matching refs:isLoad
265 void ARMAssembler::dataTransfer32(bool isLoad, RegisterID srcDst, RegisterID base, int32_t offset, bool bytes)
270 dtr_u(isLoad, srcDst, base, offset | transferFlag);
273 dtr_u(isLoad, srcDst, ARMRegisters::S0, (offset & 0xfff) | transferFlag);
276 dtr_ur(isLoad, srcDst, base, ARMRegisters::S0 | transferFlag);
281 dtr_d(isLoad, srcDst, base, offset | transferFlag);
284 dtr_d(isLoad, srcDst, ARMRegisters::S0, (offset & 0xfff) | transferFlag);
287 dtr_dr(isLoad, srcDst, base, ARMRegisters::S0 | transferFlag);
292 void ARMAssembler::baseIndexTransfer32(bool isLoad, RegisterID srcDst, RegisterID base, RegisterID index, int scale, int32_t offset)
301 dtr_u(isLoad, srcDst, ARMRegisters::S0, offset);
306 dtr_d(isLoad, srcDst, ARMRegisters::S0, -offset);
312 dtr_ur(isLoad, srcDst, base, ARMRegisters::S0);
315 void ARMAssembler::doubleTransfer(bool isLoad, FPRegisterID srcDst, RegisterID base, int32_t offset)
319 fdtr_u(isLoad, srcDst, base, offset >> 2);
324 fdtr_u(isLoad, srcDst, ARMRegisters::S0, (offset >> 2) & 0xff);
330 fdtr_d(isLoad, srcDst, base, offset >> 2);
335 fdtr_d(isLoad, srcDst, ARMRegisters::S0, (offset >> 2) & 0xff);
343 fdtr_u(isLoad, srcDst, ARMRegisters::S0, 0);