/external/clang/test/Parser/ |
H A D | cxx-default-args.cpp | 10 typedef struct Inst { struct
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/external/llvm/lib/MC/ |
H A D | MCInstrAnalysis.cpp | 13 uint64_t MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, argument 15 if (Inst.getNumOperands() == 0 || 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) 19 int64_t Imm = Inst.getOperand(0).getImm();
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsDirectObjLower.cpp | 23 void Mips::LowerLargeShift(MCInst& Inst) { argument 25 assert(Inst.getNumOperands() == 3 && "Invalid no. of operands for shift!"); 26 assert(Inst.getOperand(2).isImm()); 28 int64_t Shift = Inst.getOperand(2).getImm(); 34 Inst.getOperand(2).setImm(Shift); 36 switch (Inst.getOpcode()) { 41 Inst.setOpcode(Mips::DSLL32); 44 Inst.setOpcode(Mips::DSRL32); 47 Inst.setOpcode(Mips::DSRA32);
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H A D | MipsAsmBackend.cpp | 208 /// \param Inst - The instruction to test. 209 bool mayNeedRelaxation(const MCInst &Inst) const { 227 /// \param Inst - The instruction to relax, which may be the same 230 void relaxInstruction(const MCInst &Inst, MCInst &Res) const { argument
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/external/llvm/include/llvm/MC/ |
H A D | MCInstBuilder.h | 23 MCInst Inst; member in class:llvm::MCInstBuilder 28 Inst.setOpcode(Opcode); 33 Inst.addOperand(MCOperand::CreateReg(Reg)); 39 Inst.addOperand(MCOperand::CreateImm(Val)); 45 Inst.addOperand(MCOperand::CreateFPImm(Val)); 51 Inst.addOperand(MCOperand::CreateExpr(Val)); 57 Inst.addOperand(MCOperand::CreateInst(Val)); 62 return Inst;
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/external/llvm/lib/Target/Mips/ |
H A D | MipsAnalyzeImmediate.h | 19 struct Inst { struct in class:llvm::MipsAnalyzeImmediate 21 Inst(unsigned Opc, unsigned ImmOpnd); 23 typedef SmallVector<Inst, 7 > InstSeq; 33 void AddInstr(InstSeqLs &SeqLs, const Inst &I);
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H A D | MipsAnalyzeImmediate.cpp | 15 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {} function in class:MipsAnalyzeImmediate::Inst 18 void MipsAnalyzeImmediate::AddInstr(InstSeqLs &SeqLs, const Inst &I) { 32 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL)); 38 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL)); 45 AddInstr(SeqLs, Inst(SLL, Shamt)); 58 AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
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/external/llvm/lib/Transforms/ObjCARC/ |
H A D | ObjCARCExpand.cpp | 98 Instruction *Inst = &*I; local 100 DEBUG(dbgs() << "ObjCARCExpand: Visiting: " << *Inst << "\n"); 102 switch (GetBasicInstructionClass(Inst)) { 114 Value *Value = cast<CallInst>(Inst)->getArgOperand(0); 115 DEBUG(dbgs() << "ObjCARCExpand: Old = " << *Inst << "\n" 117 Inst->replaceAllUsesWith(Value);
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H A D | ObjCARCAPElim.cpp | 98 Instruction *Inst = I++; local 99 switch (GetBasicInstructionClass(Inst)) { 101 Push = Inst; 106 if (Push && cast<CallInst>(Inst)->getArgOperand(0) == Push) { 110 " Pop: " << *Inst << "\n" 112 Inst->eraseFromParent(); 118 if (MayAutorelease(ImmutableCallSite(Inst)))
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H A D | DependencyAnalysis.cpp | 35 llvm::objcarc::CanAlterRefCount(const Instruction *Inst, const Value *Ptr, argument 47 ImmutableCallSite CS = static_cast<const Value *>(Inst); 71 llvm::objcarc::CanUse(const Instruction *Inst, const Value *Ptr, argument 79 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(Inst)) { 85 } else if (ImmutableCallSite CS = static_cast<const Value *>(Inst)) { 94 } else if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) { 104 for (User::const_op_iterator OI = Inst->op_begin(), OE = Inst->op_end(); 113 /// Test if there can be dependencies on Inst through Arg. This function only 116 llvm::objcarc::Depends(DependenceKind Flavor, Instruction *Inst, argument 236 Instruction *Inst = --LocalStartPos; local [all...] |
/external/llvm/lib/Transforms/Scalar/ |
H A D | DCE.cpp | 12 // Dead Inst Elimination performs a single pass over the function removing 45 Instruction *Inst = DI++; local 46 if (isInstructionTriviallyDead(Inst, TLI)) { 47 Inst->eraseFromParent();
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H A D | LowerAtomic.cpp | 117 Instruction *Inst = DI++; local 118 if (FenceInst *FI = dyn_cast<FenceInst>(Inst)) 120 else if (AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(Inst)) 122 else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(Inst)) 124 else if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) { 127 } else if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
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H A D | Sink.cpp | 58 bool AllUsesDominatedByBlock(Instruction *Inst, BasicBlock *BB) const; 59 bool IsAcceptableTarget(Instruction *Inst, BasicBlock *SuccToSinkTo) const; 74 bool Sinking::AllUsesDominatedByBlock(Instruction *Inst, argument 80 for (Value::use_iterator I = Inst->use_begin(), 81 E = Inst->use_end(); I != E; ++I) { 136 Instruction *Inst = I; // The instruction to sink. local 144 if (isa<DbgInfoIntrinsic>(Inst)) 147 if (SinkInstruction(Inst, Stores)) 156 static bool isSafeToMove(Instruction *Inst, AliasAnalysis *AA, argument 159 if (Inst 180 IsAcceptableTarget(Instruction *Inst, BasicBlock *SuccToSinkTo) const argument 219 SinkInstruction(Instruction *Inst, SmallPtrSet<Instruction *, 8> &Stores) argument [all...] |
/external/llvm/lib/Analysis/ |
H A D | Loads.cpp | 156 Instruction *Inst = --ScanFrom; local 157 if (isa<DbgInfoIntrinsic>(Inst)) 170 if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) 176 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) { 205 if (Inst->mayWriteToMemory()) { 209 (AA->getModRefInfo(Inst, Ptr, AccessSize) & AliasAnalysis::Mod) == 0)
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H A D | CostModel.cpp | 215 Instruction *Inst = it; local 216 unsigned Cost = getInstructionCost(Inst); 222 OS << " for instruction: "<< *Inst << "\n"; local
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H A D | MemDepPrinter.cpp | 102 Instruction *Inst = &*I; local 104 if (!Inst->mayReadFromMemory() && !Inst->mayWriteToMemory()) 107 MemDepResult Res = MDA.getDependency(Inst); 109 Deps[Inst].insert(std::make_pair(getInstTypePair(Res), 111 } else if (CallSite CS = cast<Value>(Inst)) { 115 DepSet &InstDeps = Deps[Inst]; 123 if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) { 126 Deps[Inst].insert(std::make_pair(getInstTypePair(0, Unknown), 132 } else if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) { 162 const Instruction *Inst = &*I; local [all...] |
H A D | PHITransAddr.cpp | 25 static bool CanPHITrans(Instruction *Inst) { argument 26 if (isa<PHINode>(Inst) || 27 isa<GetElementPtrInst>(Inst)) 30 if (isa<CastInst>(Inst) && 31 isSafeToSpeculativelyExecute(Inst)) 34 if (Inst->getOpcode() == Instruction::Add && 35 isa<ConstantInt>(Inst->getOperand(1))) 118 Instruction *Inst = dyn_cast<Instruction>(Addr); local 119 return Inst == 0 || CanPHITrans(Inst); 149 Instruction *Inst = dyn_cast<Instruction>(V); local [all...] |
H A D | SparsePropagation.cpp | 78 void SparseSolver::UpdateState(Instruction &Inst, LatticeVal V) { argument 79 DenseMap<Value*, LatticeVal>::iterator I = ValueState.find(&Inst); 84 ValueState[&Inst] = V; 85 InstWorkList.push_back(&Inst); 309 if (BBExecutable.count(U->getParent())) // Inst is executable?
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/external/llvm/tools/llvm-objdump/ |
H A D | MCFunction.cpp | 55 MCInst Inst; local 56 if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())){ 57 Instructions.push_back(MCDecodedInst(Index, Size, Inst)); 58 if (Ana->isBranch(Inst)) { 59 uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); 72 } else if (Ana->isReturn(Inst)) { 76 } else if (Ana->isCall(Inst)) { 77 uint64_t targ = Ana->evaluateBranch(Inst, Index, Size); 116 const MCDecodedInst &Inst = BB.getInsts().back(); local 118 if (Ana->isBranch(Inst [all...] |
H A D | MCFunction.h | 35 MCInst Inst; member in struct:llvm::MCDecodedInst 38 MCDecodedInst(uint64_t Address, uint64_t Size, MCInst Inst) argument 39 : Address(Address), Size(Size), Inst(Inst) {} 61 void addInst(const MCDecodedInst &Inst) { Insts.push_back(Inst); } argument
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64ELFStreamer.cpp | 79 virtual void EmitInstruction(const MCInst& Inst) { argument 81 MCELFStreamer::EmitInstruction(Inst);
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/external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
H A D | MBlazeAsmBackend.cpp | 53 bool mayNeedRelaxation(const MCInst &Inst) const; 60 void relaxInstruction(const MCInst &Inst, MCInst &Res) const; 78 bool MBlazeAsmBackend::mayNeedRelaxation(const MCInst &Inst) const { 79 if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode()) 83 for (unsigned i = 0; i < Inst.getNumOperands(); ++i) 84 hasExprOrImm |= Inst.getOperand(i).isExpr(); 101 void MBlazeAsmBackend::relaxInstruction(const MCInst &Inst, MCInst &Res) const { argument 102 Res = Inst; 103 Res.setOpcode(getRelaxedOpcode(Inst [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | AMDGPUAsmBackend.cpp | 56 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const { argument 59 virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
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/external/llvm/lib/Transforms/Utils/ |
H A D | LCSSA.cpp | 77 bool ProcessInstruction(Instruction *Inst, 188 bool LCSSA::ProcessInstruction(Instruction *Inst, argument 192 BasicBlock *InstBB = Inst->getParent(); 194 for (Value::use_iterator UI = Inst->use_begin(), E = Inst->use_end(); 214 BasicBlock *DomBB = Inst->getParent(); 215 if (InvokeInst *Inv = dyn_cast<InvokeInst>(Inst)) 223 SSAUpdate.Initialize(Inst->getType(), Inst->getName()); 235 PHINode *PN = PHINode::Create(Inst [all...] |
/external/llvm/tools/llvm-mc/ |
H A D | Disassembler.cpp | 63 MCInst Inst; local 66 S = DisAsm.getInstruction(Inst, Size, memoryObject, Index, 84 Streamer.EmitInstruction(Inst);
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