Searched defs:NextVA (Results 1 - 4 of 4) sorted by relevance

/external/clang/lib/AST/
H A DStmtIterator.cpp33 void StmtIteratorBase::NextVA() { function in class:StmtIteratorBase
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp187 CCValAssign &NextVA = ArgLocs[++i]; local
190 if (NextVA.isMemLoc()) {
192 CreateFixedObject(4, StackOffset+NextVA.getLocMemOffset(),true);
198 unsigned loReg = MF.addLiveIn(NextVA.getLocReg(),
482 CCValAssign &NextVA = ArgLocs[++i]; local
483 if (NextVA.isRegLoc()) {
484 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Lo));
487 unsigned Offset = NextVA.getLocMemOffset() + StackOffset;
/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2014 CCValAssign &NextVA = ArgLocs[++i]; local
2016 assert(VA.isRegLoc() && NextVA.isRegLoc() &&
2021 .addReg(NextVA.getLocReg(), RegState::Define)
2024 RegArgs.push_back(NextVA.getLocReg());
H A DARMISelLowering.cpp1317 CCValAssign &VA, CCValAssign &NextVA,
1326 if (NextVA.isRegLoc())
1327 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1)));
1329 assert(NextVA.isMemLoc());
1334 dl, DAG, NextVA,
2545 ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, argument
2562 if (NextVA.isMemLoc()) {
2564 int FI = MFI->CreateFixedObject(4, NextVA.getLocMemOffset(), true);
2572 Reg = MF.addLiveIn(NextVA.getLocReg(), RC);
1314 PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVector<SDValue, 8> &MemOpChains, ISD::ArgFlagsTy Flags) const argument

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