Searched defs:X0100 (Results 1 - 1 of 1) sorted by relevance
| /external/valgrind/main/VEX/priv/ |
| H A D | host_arm_defs.c | 2693 #define X0100 BITS4(0,1,0,0) macro
2953 case ARMalu_ADD: subopc = X0100; break;
3422 case ARMvfp_MUL: pqrs = X0100; break;
3447 case ARMvfp_MUL: pqrs = X0100; break;
3468 insn = XXXXXXXX(0xE, X1110,X1011,X0000,dD,X1011,X0100,dM);
3474 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X0100,dM);
3519 UInt insn = XXXXXXXX(0xE, X1110, X1011, X0100, dD, X1011, X0100, dM);
3529 UInt insn = XXXXXXXX(cc, X1110,X1011,X0000,dD,X1011,X0100,dM);
3624 X1011, X0100, reg
4713 #undef X0100 macro
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