Searched refs:set (Results 251 - 262 of 262) sorted by relevance
<<11
| /bionic/libdl/ |
| H A D | Android.mk | 33 # with missing symbols. Since this library is just a bunch of stubs, we set
|
| /bionic/libc/arch-mips/bionic/ |
| H A D | setjmp.S | 64 .set reorder
147 .set reorder
157 .set noreorder
|
| H A D | _setjmp.S | 62 .set noreorder
127 .set noreorder
|
| /bionic/libc/kernel/tools/ |
| H A D | clean_header.py | 52 statics = statics.union( kernel_known_statics.get( arch, set() ) )
|
| /bionic/libc/private/ |
| H A D | bionic_atomic_arm.h | 91 # error ANDROID_SMP should not be set to 1 for an ARM architecture less than 6
|
| /bionic/libc/tools/ |
| H A D | generate-NOTICE.py | 34 copyrights = set()
|
| H A D | gensyscalls.py | 125 .set noreorder
137 .set reorder
250 # set the call id (%ebx)
253 # set the pointer to the rest of the args into %ecx
318 syscalls = set() # MIPS defines everything three times; work around that.
|
| /bionic/libc/kernel/arch-mips/asm/sibyte/ |
| H A D | sb1250_scd.h | 119 #define SYS_SOC_TYPE(dest, sysrev) .set push ; .set reorder ; dsrl dest, sysrev, S_SYS_SOC_TYPE ; andi dest, dest, (M_SYS_SOC_TYPE >> S_SYS_SOC_TYPE); beq dest, K_SYS_SOC_TYPE_BCM1250_ALT, 991f ; beq dest, K_SYS_SOC_TYPE_BCM1250_ALT2, 991f ; b 992f ; 991: li dest, K_SYS_SOC_TYPE_BCM1250 ; 992: .set pop
|
| /bionic/libc/include/ |
| H A D | pthread.h | 267 int pthread_sigmask(int how, const sigset_t *set, sigset_t *oset);
|
| /bionic/libc/kernel/common/linux/ |
| H A D | fb.h | 396 __u16 set; member in struct:fb_cursor
|
| /bionic/libc/ |
| H A D | Android.mk | 374 # can set breakpoints in them without messing
484 # To customize dlmalloc's alignment, set BOARD_MALLOC_ALIGNMENT in
833 # set -DPTHREAD_DEBUG -DPTHREAD_DEBUG_ENABLED=1 to enable support for
|
| /bionic/libc/kernel/arch-mips/asm/ |
| H A D | mipsregs.h | 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; })
480 #define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; })
481 #define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : : "Jr" ((unsigned int)(value))); } while (0)
482 #define __write_64bit_c0_register(register, sel, value) do { if (sizeof(unsigned long) == 4) __write_64bit_c0_split(register, sel, value); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmtc0\t%z0, " #register "\n\t" ".set\tmips
[all...] |
Completed in 5002 milliseconds
<<11