Searched refs:Dst (Results 76 - 100 of 105) sorted by relevance

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/external/clang/lib/StaticAnalyzer/Core/
H A DBugReporter.cpp627 const CFGBlock *Dst = BE->getDst(); local
664 if (const Stmt *S = Dst->getLabel()) {
736 if (*(Src->succ_begin()+1) == Dst)
764 if (*(Src->succ_begin()+1) == Dst) {
784 if (*(Src->succ_begin()+1) == Dst) {
805 if (*(Src->succ_begin()) == Dst) {
833 if (*(Src->succ_begin()+1) == Dst) {
863 if (*(Src->succ_begin()+1) == Dst)
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.h450 const MachineBasicBlock *Dst) const;
451 void addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst,
H A DSelectionDAGBuilder.cpp1346 const MachineBasicBlock *Dst) const {
1351 const BasicBlock *DstBB = Dst->getBasicBlock();
1356 addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst, argument
1359 Weight = getEdgeWeight(Src, Dst);
1360 Src->addSuccessor(Dst, Weight);
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DExplodedGraph.h232 virtual void AddEdge(ExplodedNode *Src, ExplodedNode *Dst) = 0;
H A DCoreEngine.h129 ExplodedNodeSet &Dst);
/external/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h158 void moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps);
H A DSelectionDAG.h594 SDValue getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
599 SDValue getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
604 SDValue getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
/external/llvm/lib/CodeGen/
H A DTailDuplication.cpp282 unsigned Dst = Copy->getOperand(0).getReg(); local
285 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) {
287 MRI->replaceRegWith(Dst, Src);
H A DMachineInstr.cpp601 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping
603 static void moveOperands(MachineOperand *Dst, MachineOperand *Src, argument
606 return MRI->moveOperands(Dst, Src, NumOps);
610 if (Dst < Src)
612 new (Dst + i) MachineOperand(Src[i]);
615 new (Dst + i - 1) MachineOperand(Src[i - 1]);
/external/llvm/include/llvm/IR/
H A DIRBuilder.h296 CallInst *CreateMemCpy(Value *Dst, Value *Src, uint64_t Size, unsigned Align, argument
299 return CreateMemCpy(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag,
303 CallInst *CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align,
312 CallInst *CreateMemMove(Value *Dst, Value *Src, uint64_t Size, unsigned Align, argument
314 return CreateMemMove(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag);
317 CallInst *CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align,
/external/bison/src/
H A Dparse-gram.c572 # define YYCOPY(Dst, Src, Count) \
573 __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src)))
575 # define YYCOPY(Dst, Src, Count) \
580 (Dst)[yyi] = (Src)[yyi]; \
/external/llvm/lib/MC/
H A DMCDwarf.cpp1326 const MachineLocation &Dst = local
1331 if (Dst.isReg()) {
1332 assert(Dst.getReg() == MachineLocation::VirtualFP);
1340 int Offset = Dst.getOffset();
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp103 const MCOperand &Dst = MI->getOperand(0); local
113 printRegName(O, Dst.getReg());
126 const MCOperand &Dst = MI->getOperand(0); local
135 printRegName(O, Dst.getReg());
/external/clang/lib/CodeGen/
H A DCodeGenFunction.h2207 void EmitStoreThroughLValue(RValue Src, LValue Dst, bool isInit=false);
2208 void EmitStoreThroughExtVectorComponentLValue(RValue Src, LValue Dst);
2210 /// EmitStoreThroughLValue - Store Src into Dst with same constraints as
2216 void EmitStoreThroughBitfieldLValue(RValue Src, LValue Dst,
2712 /// from function arguments into \arg Dst. See ABIArgInfo::Expand.
2718 ExpandTypeFromArgs(QualType Ty, LValue Dst,
H A DCGCall.cpp1258 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy); local
1260 Builder.CreateMemCpy(Dst,
H A DCGExprCXX.cpp1728 const CXXRecordDecl *Dst) {
1732 // If Dst is not derived from Src we can skip the whole computation below and
1733 // return that Src is not a public base of Dst. Record all inheritance paths.
1734 if (!Dst->isDerivedFrom(Src, Paths))
1763 // -2: Src is not a public base of Dst.
1771 // Otherwise, the Src type is a unique public nonvirtual base type of Dst.
1772 // Return the offset of Src from the origin of Dst.
1726 computeOffsetHint(ASTContext &Context, const CXXRecordDecl *Src, const CXXRecordDecl *Dst) argument
/external/iproute2/doc/
H A Dapi-ip6-flowlabels.tex388 Label S Owner Users Linger Expires Dst Opt
401 \item \verb|Dst| is IPv6 destination address.
/external/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp189 VectorParts createEdgeMask(BasicBlock *Src, BasicBlock *Dst);
1785 InnerLoopVectorizer::createEdgeMask(BasicBlock *Src, BasicBlock *Dst) { argument
1786 assert(std::find(pred_begin(Dst), pred_end(Dst), Src) != pred_end(Dst) &&
1798 if (BI->getSuccessor(0) != Dst)
/external/llvm/lib/Transforms/Scalar/
H A DGVN.cpp2000 /// isOnlyReachableViaThisEdge - There is an edge from 'Src' to 'Dst'. Return
2001 /// true if every path from the entry block to 'Dst' passes via this edge. In
2002 /// particular 'Dst' must not be reachable via another edge from 'Src'.
2005 // While in theory it is interesting to consider the case in which Dst has
2006 // more than one predecessor, because Dst might be part of a loop which is
2008 // GVN runs all such loops have preheaders, which means that Dst will have
2221 BasicBlock *Dst = i.getCaseSuccessor(); local
2223 if (SwitchEdges.lookup(Dst) == 1) {
2224 BasicBlockEdge E(Parent, Dst);
H A DScalarReplAggregates.cpp730 // Noop transfer. Src == Dst
2323 Value *Dst = SROADest ? EltPtr : OtherElt; // Dest ptr local
2327 Builder.CreateMemCpy(Dst, Src, EltSize, OtherEltAlign,MI->isVolatile());
2329 Builder.CreateMemMove(Dst, Src, EltSize,OtherEltAlign,MI->isVolatile());
/external/llvm/lib/Transforms/Instrumentation/
H A DAddressSanitizer.cpp576 Value *Dst = MI->getDest(); local
594 instrumentMemIntrinsicParam(MI, Dst, Length, InsertBefore, true);
/external/clang/include/clang/Analysis/
H A DCFG.h462 const CFGBlock *Dst);
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp730 unsigned Dst = TRI->getSubReg(DestReg, BeginIdx + i*Spacing); local
732 assert(Dst && Src && "Bad sub-register");
735 DstRegs.insert(Dst);
737 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst)
/external/llvm/lib/Support/
H A DAPInt.cpp765 /// Perform a logical right-shift from Src to Dst, which must be equal or
767 static void lshrNear(uint64_t *Dst, uint64_t *Src, unsigned Words,
772 Dst[I] = (Tmp >> Shift) | Carry;
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp281 /// by "Src" to address "Dst" of size "Size". Alignment information is
286 CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain, argument
291 return DAG.getMemcpy(Chain, dl, Dst, Src, SizeNode, Flags.getByValAlign(),

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