/external/webkit/Source/WebCore/rendering/ |
H A D | RenderRubyRun.cpp | 217 RenderRubyText* rt = rubyText(); local 218 if (!rt) 221 rt->setChildNeedsLayout(true, false); 222 rt->layoutIfNeeded(); 223 return rt; 231 RenderRubyText* rt = rubyText(); local 232 if (!rt) 235 int lastLineRubyTextBottom = rt->logicalHeight(); 237 RootInlineBox* rootBox = rt->lastRootBox(); 240 firstLineRubyTextTop = rt [all...] |
/external/valgrind/main/VEX/priv/ |
H A D | guest_mips_toIR.c | 11 mips-valgrind@rt-rk.com 298 getIReg(rt), \ 309 putIReg(rd, binop(op, getIReg(rt), mkU8(sa))); 312 putIReg(rd, binop(op, getIReg(rs), getIReg(rt))); 315 putIReg(rt, binop(op, getIReg(rs), mkU32(imm))); 318 putIReg(rt, binop(op, getIReg(rs), mkU64(imm))); 463 UInt rt = get_rt(cins); local 473 if (opcode == 0x01 && rt == 0x01) { 478 if (opcode == 0x01 && rt == 0x11) { 483 if (opcode == 0x01 && rt 518 UInt rt = get_rt(cins); local 548 UInt rt = get_rt(cins); local 1201 UInt opcode, cins, rs, rt, rd, sa, ft, fs, fd, fmt, tf, nd, function, local [all...] |
/external/v8/src/mips/ |
H A D | assembler-mips.h | 677 void beq(Register rs, Register rt, int16_t offset); 678 void beq(Register rs, Register rt, Label* L) { argument 679 beq(rs, rt, branch_offset(L, false) >> 2); 687 void bne(Register rs, Register rt, int16_t offset); 688 void bne(Register rs, Register rt, Label* L) { argument 689 bne(rs, rt, branch_offset(L, false)>>2); 707 void addu(Register rd, Register rs, Register rt); 708 void subu(Register rd, Register rs, Register rt); 709 void mult(Register rs, Register rt); 710 void multu(Register rs, Register rt); [all...] |
H A D | assembler-mips.cc | 364 Register rt; local 365 rt.code_ = (instr & kRtFieldMask) >> kRtShift; 366 return rt; 582 uint32_t rt = GetRt(instr); 591 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && 855 Register rt, 859 ASSERT(rd.is_valid() && rs.is_valid() && rt.is_valid() && is_uint5(sa)); 860 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) 868 Register rt, 872 ASSERT(rs.is_valid() && rt 853 GenInstrRegister(Opcode opcode, Register rs, Register rt, Register rd, uint16_t sa, SecondaryField func) argument 866 GenInstrRegister(Opcode opcode, Register rs, Register rt, uint16_t msb, uint16_t lsb, SecondaryField func) argument 893 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPURegister fs, FPURegister fd, SecondaryField func) argument 907 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPUControlRegister fs, SecondaryField func) argument 922 GenInstrImmediate(Opcode opcode, Register rs, Register rt, int32_t j) argument 1070 beq(Register rs, Register rt, int16_t offset) argument 1121 bne(Register rs, Register rt, int16_t offset) argument 1199 addu(Register rd, Register rs, Register rt) argument 1209 subu(Register rd, Register rs, Register rt) argument 1214 mul(Register rd, Register rs, Register rt) argument 1219 mult(Register rs, Register rt) argument 1224 multu(Register rs, Register rt) argument 1229 div(Register rs, Register rt) argument 1234 divu(Register rs, Register rt) argument 1241 and_(Register rd, Register rs, Register rt) argument 1246 andi(Register rt, Register rs, int32_t j) argument 1252 or_(Register rd, Register rs, Register rt) argument 1257 ori(Register rt, Register rs, int32_t j) argument 1263 xor_(Register rd, Register rs, Register rt) argument 1268 xori(Register rt, Register rs, int32_t j) argument 1274 nor(Register rd, Register rs, Register rt) argument 1280 sll(Register rd, Register rt, uint16_t sa, bool coming_from_nop) argument 1293 sllv(Register rd, Register rt, Register rs) argument 1298 srl(Register rd, Register rt, uint16_t sa) argument 1303 srlv(Register rd, Register rt, Register rs) argument 1308 sra(Register rd, Register rt, uint16_t sa) argument 1313 srav(Register rd, Register rt, Register rs) argument 1318 rotr(Register rd, Register rt, uint16_t sa) argument 1328 rotrv(Register rd, Register rt, Register rs) argument 1489 tge(Register rs, Register rt, uint16_t code) argument 1497 tgeu(Register rs, Register rt, uint16_t code) argument 1505 tlt(Register rs, Register rt, uint16_t code) argument 1513 tltu(Register rs, Register rt, uint16_t code) argument 1522 teq(Register rs, Register rt, uint16_t code) argument 1530 tne(Register rs, Register rt, uint16_t code) argument 1551 slt(Register rd, Register rs, Register rt) argument 1556 sltu(Register rd, Register rs, Register rt) argument 1561 slti(Register rt, Register rs, int32_t j) argument 1566 sltiu(Register rt, Register rs, int32_t j) argument 1572 movz(Register rd, Register rs, Register rt) argument 1577 movn(Register rd, Register rs, Register rt) argument 1583 Register rt; local 1590 Register rt; local 1603 ins_(Register rt, Register rs, uint16_t pos, uint16_t size) argument 1611 ext_(Register rt, Register rs, uint16_t pos, uint16_t size) argument 1652 mtc1(Register rt, FPURegister fs) argument 1657 mfc1(Register rt, FPURegister fs) argument 1662 ctc1(Register rt, FPUControlRegister fs) argument 1667 cfc1(Register rt, FPUControlRegister fs) argument [all...] |
H A D | macro-assembler-mips.cc | 543 void MacroAssembler::Addu(Register rd, Register rs, const Operand& rt) { argument 544 if (rt.is_reg()) { 545 addu(rd, rs, rt.rm()); 547 if (is_int16(rt.imm32_) && !MustUseReg(rt.rmode_)) { 548 addiu(rd, rs, rt.imm32_); 552 li(at, rt); 559 void MacroAssembler::Subu(Register rd, Register rs, const Operand& rt) { argument 560 if (rt.is_reg()) { 561 subu(rd, rs, rt 575 Mul(Register rd, Register rs, const Operand& rt) argument 597 Mult(Register rs, const Operand& rt) argument 609 Multu(Register rs, const Operand& rt) argument 621 Div(Register rs, const Operand& rt) argument 633 Divu(Register rs, const Operand& rt) argument 645 And(Register rd, Register rs, const Operand& rt) argument 661 Or(Register rd, Register rs, const Operand& rt) argument 677 Xor(Register rd, Register rs, const Operand& rt) argument 693 Nor(Register rd, Register rs, const Operand& rt) argument 705 Neg(Register rs, const Operand& rt) argument 714 Slt(Register rd, Register rs, const Operand& rt) argument 730 Sltu(Register rd, Register rs, const Operand& rt) argument 746 Ror(Register rd, Register rs, const Operand& rt) argument 927 Ext(Register rt, Register rs, uint16_t pos, uint16_t size) argument 4326 Assert(Condition cc, const char* msg, Register rs, Operand rt) argument 4361 Check(Condition cc, const char* msg, Register rs, Operand rt) argument [all...] |
/external/compiler-rt/ |
H A D | Android.mk | 201 define get-libcompiler-rt-source-files 202 $(if $(findstring $(1),arm),$(call get-libcompiler-rt-arm-source-files), 203 $(if $(findstring $(1),mips),$(call get-libcompiler-rt-mips-source-files), 204 $(if $(findstring $(1),x86),$(call get-libcompiler-rt-x86-source-files), 214 define filter-libcompiler-rt-common-source-files 218 define get-libcompiler-rt-arm-common-source-files 219 $(call filter-libcompiler-rt-common-source-files, 227 define add-libcompiler-rt-arm-vfp-source-files 236 define get-libcompiler-rt-arm-source-files 238 $(call add-libcompiler-rt [all...] |
/external/skia/src/gpu/ |
H A D | GrSoftwarePathRenderer.cpp | 49 // compute bounds as intersection of rt size, clip, and path 50 const GrRenderTarget* rt = target->getDrawState().getRenderTarget(); local 51 if (NULL == rt) { 54 *devPathBounds = GrIRect::MakeWH(rt->width(), rt->height()); 56 target->getClip()->getConservativeBounds(rt, devClipBounds);
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H A D | GrGpu.cpp | 142 bool GrGpu::attachStencilBufferToRenderTarget(GrRenderTarget* rt) { argument 143 GrAssert(NULL == rt->getStencilBuffer()); 145 this->getContext()->findStencilBuffer(rt->width(), 146 rt->height(), 147 rt->numSamples()); 149 rt->setStencilBuffer(sb); 150 bool attached = this->attachStencilBufferToRenderTarget(sb, rt); 152 rt->setStencilBuffer(NULL); 156 if (this->createStencilBufferForRenderTarget(rt, 157 rt [all...] |
/external/skia/src/image/ |
H A D | SkSurface_Gpu.cpp | 69 GrRenderTarget* rt = (GrRenderTarget*) fDevice->accessRenderTarget(); local 70 int sampleCount = rt->numSamples(); 76 GrRenderTarget* rt = (GrRenderTarget*) fDevice->accessRenderTarget(); local 78 return SkImage::NewTexture(rt->asTexture()); 90 GrRenderTarget* rt = (GrRenderTarget*) fDevice->accessRenderTarget(); local 93 if (rt->asTexture() == SkTextureImageGetTexture(image)) { 108 fDevice->context()->copyTexture(rt->asTexture(), tex->asRenderTarget());
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/external/ppp/pppd/ |
H A D | sys-linux.c | 236 static int read_route_table (struct rtentry *rt); 237 static int defaultroute_exists (struct rtentry *rt); 1426 static int read_route_table (struct rtentry *rt); 1501 static int read_route_table(struct rtentry *rt) argument 1506 memset (rt, '\0', sizeof (struct rtentry)); 1519 SIN_ADDR(rt->rt_dst) = strtoul(cols[route_dest_col], NULL, 16); 1520 SIN_ADDR(rt->rt_gateway) = strtoul(cols[route_gw_col], NULL, 16); 1521 SIN_ADDR(rt->rt_genmask) = strtoul(cols[route_mask_col], NULL, 16); 1523 rt->rt_flags = (short) strtoul(cols[route_flags_col], NULL, 16); 1524 rt 1534 defaultroute_exists(struct rtentry *rt) argument 1566 struct rtentry rt; local 1592 struct rtentry rt; local 1634 struct rtentry rt; local 2305 struct rtentry rt; local 2410 struct rtentry rt; local [all...] |
/external/kernel-headers/original/asm-mips/ |
H A D | asm.h | 169 #define MOVN(rd, rs, rt) \ 172 beqz rt, 9f; \ 176 #define MOVZ(rd, rs, rt) \ 179 bnez rt, 9f; \ 185 #define MOVN(rd, rs, rt) \ 188 bnezl rt, 9f; \ 192 #define MOVZ(rd, rs, rt) \ 195 beqzl rt, 9f; \ 202 #define MOVN(rd, rs, rt) \ 203 movn rd, rs, rt [all...] |
H A D | mipsmtregs.h | 260 #define mftc0(rt,sel) \ 268 " # mftc0 $1, $" #rt ", " #sel " \n" \ 269 " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" \ 277 #define mftgpr(rt) \ 285 " # mftgpr $1," #rt " \n" \ 286 " .word 0x41000820 | (" #rt " << 16) \n" \ 294 #define mftr(rt, u, sel) \ 299 " mftr %0, " #rt ", " #u ", " #sel " \n" \
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/external/qemu/target-mips/ |
H A D | translate.c | 70 OPC_BEQ = (0x04 << 26), /* Unconditional if rs = rt = 0 (B) */ 225 /* REGIMM (rt field) opcodes */ 941 static inline void op_ldst_##insn(TCGv arg1, TCGv arg2, int rt, DisasContext *ctx) \ 954 tcg_gen_movi_tl(t0, rt | ((almask << 3) & 0x20)); \ 960 gen_store_gpr(t0, rt); \ 965 static inline void op_ldst_##insn(TCGv arg1, TCGv arg2, int rt, DisasContext *ctx) \ 969 gen_store_gpr(t0, rt); \ 980 static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, argument 1002 gen_store_gpr(t0, rt); 1008 gen_store_gpr(t0, rt); 1137 gen_st_cond(DisasContext *ctx, uint32_t opc, int rt, int base, int16_t offset) argument 1250 gen_arith_imm(CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int rs, int16_t imm) argument 1337 gen_logic_imm(CPUState *env, uint32_t opc, int rt, int rs, int16_t imm) argument 1379 gen_slt_imm(CPUState *env, uint32_t opc, int rt, int rs, int16_t imm) argument 1407 gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int rs, int16_t imm) argument 1546 gen_arith(CPUState *env, DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument 1727 gen_cond_move(CPUState *env, uint32_t opc, int rd, int rs, int rt) argument 1764 gen_logic(CPUState *env, uint32_t opc, int rd, int rs, int rt) argument 1824 gen_slt(CPUState *env, uint32_t opc, int rd, int rs, int rt) argument 1855 gen_shift(CPUState *env, DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument 2002 gen_muldiv(DisasContext *ctx, uint32_t opc, int rs, int rt) argument 2237 gen_mul_vr54xx(DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument 2355 gen_trap(DisasContext *ctx, uint32_t opc, int rs, int rt, int16_t imm) argument 2468 gen_compute_branch(DisasContext *ctx, uint32_t opc, int rs, int rt, int32_t offset) argument 2704 gen_bitops(DisasContext *ctx, uint32_t opc, int rt, int rs, int lsb, int msb) argument 2796 gen_bshfl(DisasContext *ctx, uint32_t op2, int rt, int rd) argument 5224 gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, int u, int sel, int h) argument 5388 gen_mttr(CPUState *env, DisasContext *ctx, int rd, int rt, int u, int sel, int h) argument 5552 gen_cp0(CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int rd) argument 5793 gen_cp1(DisasContext *ctx, uint32_t opc, int rt, int fs) argument 7631 int rs, rt, rd, sa; local [all...] |
/external/android-clat/ |
H A D | netlink_msg.h | 24 struct nl_msg *nlmsg_alloc_rtmsg(uint16_t type, uint16_t flags, struct rtmsg *rt);
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H A D | netlink_msg.c | 100 * rt - rtmsg to copy into the new netlink message 102 struct nl_msg *nlmsg_alloc_rtmsg(uint16_t type, uint16_t flags, struct rtmsg *rt) { argument 103 return nlmsg_alloc_generic(type, flags, rt, sizeof(*rt));
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/external/proguard/examples/ |
H A D | proguardgui.pro | 17 -libraryjars <java.home>/lib/rt.jar 33 #-libraryjars <java.home>/lib/rt.jar
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H A D | applets.pro | 12 -libraryjars <java.home>/lib/rt.jar
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H A D | applications.pro | 12 -libraryjars <java.home>/lib/rt.jar
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H A D | servlets.pro | 12 -libraryjars <java.home>/lib/rt.jar
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/external/dhcpcd/ |
H A D | if-options.c | 337 struct rt *rt; local 657 rt = ifo->routes = xmalloc(sizeof(*rt)); 659 rt = ifo->routes; 660 while (rt->next) 661 rt = rt->next; 662 rt->next = xmalloc(sizeof(*rt)); [all...] |
/external/apache-harmony/luni/src/test/api/common/org/apache/harmony/luni/tests/java/net/ |
H A D | AuthenticatorTest.java | 46 RequestorType rt = Authenticator.RequestorType.valueOf("BADNAME"); 67 RequestorType[] rt = RequestorType.values(); 68 assertEquals(RequestorType.PROXY, rt[0]); 69 assertEquals(RequestorType.SERVER, rt[1]);
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/external/emma/core/java12/com/vladium/emma/rt/ |
H A D | RTCoverageDataPersister.java | 9 package com.vladium.emma.rt;
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/external/llvm/utils/release/ |
H A D | tag.sh | 35 for proj in llvm cfe dragonegg test-suite compiler-rt ; do 52 for proj in llvm cfe dragonegg test-suite compiler-rt ; do
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/external/proguard/examples/annotations/ |
H A D | examples.pro | 15 -libraryjars <java.home>/lib/rt.jar
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/external/icu4c/test/intltest/ |
H A D | itrbnfrt.cpp | 305 double rt = (parseResult.getType() == Formattable::kDouble) ? local 309 if (rt != i) { 310 sprintf(buf, "Round-trip failed: %.12g -> %.12g", i, rt); 332 double rt = (parseResult.getType() == Formattable::kDouble) ? local 336 if (rt != d) { 341 sprintf(buf, " -> %.12g", rt);
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